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From: Jeff Law <jeffreyalaw@gmail.com>
To: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>,
	Palmer Dabbelt <palmer@rivosinc.com>
Cc: Evan Green <evan@rivosinc.com>,
	libc-alpha@sourceware.org, slewis@rivosinc.com,
	Vineet Gupta <vineetg@rivosinc.com>
Subject: Re: [PATCH v2 0/3] RISC-V: ifunced memcpy using new kernel hwprobe interface
Date: Fri, 31 Mar 2023 12:07:02 -0600	[thread overview]
Message-ID: <343d75ee-69f9-94b0-aa35-d5cd645ba0d3@gmail.com> (raw)
In-Reply-To: <0fe9357f-b960-065c-a3a7-8abfbbd5017c@linaro.org>



On 3/30/23 13:38, Adhemerval Zanella Netto wrote:
> 
> 
> On 30/03/23 03:20, Jeff Law wrote:
>>
>>
>> On 3/29/23 13:45, Palmer Dabbelt wrote:
>>
>>> It's not in for-next yet, but various patch sets / proposals have been on the lists for a few months and it seems like discussion on the kernel side has pretty much died down.  That's why I was pinging the glibc side of things, if anyone here has comments on the interface then it's time to chime in.  If there's no comments then we're likely to end up with this in the next release (so queue into for-next soon, Linus' master in a month or so).
>> Right.  And I've suggested that we at least try to settle on the various mem* and str* implementations independently of the kernel->glibc interface question.
>>
>> I don't much care how we break down the problem of selecting implementations, just that we get started.   That can and probably should be happening in parallel with the kernel->glibc API work.
>>
>> I've got some performance testing to do in this space (primarily of the VRULL implementations).  It's just going to take a long time to get the data.  And that implementation probably needs some revamping after all the work on the mem* and str* infrastructure that landed earlier this year.
>>
> 
> I don't think glibc is the right place for code dump, specially for implementations
> that does not have representative performance numbers in real hardware and might
> require further tuning.  It can be even tricky if you require different build config
> to testing as used to have for some ABI (for instance on powerpc with --with-cpu),
> at least for ifunc we have some mechanism to test multiple variants assuming the
> chips at least support (which should be case for unaligned).
It's not meant to be "code dump".  It's "these are the recommended 
implementation and we're just waiting for the final ifunc wiring to use 
them automatically."

But I understand your point. Even if we just agree on the 
implementations without committing until the ifunc interface is settled 
is a major step forward.

My larger point is that we need to work through the str* and mem* 
implementations and settle on those implementations and that can happen 
in independently of the interface discussion with the kernel team.  If 
we've settled on specific implementations, why not go ahead and put them 
into the repo with the expectation that we can trivially wire them into 
the ifunc resolver once the abi interface is sorted out.




> 
> So for experimental routines, where you expect to have frequent tuning based on
> once you have tested and benchmarks on different chips; an external project
> might a better idea; and sync with glibc once the routines are tested and validate.
> And these RISCV does seemed to be still very experimental, where performance numbers
> are still synthetic ones from emulators.
I think we're actually a lot closer than you might think :-)  My goal 
would be that we're not doing frequent tuning and avoid uarch specific 
versions if we at all can.  There's a reasonable chance we can do that 
if we have good baseline, zbb and vector versions.  I'm not including 
cboz memory clear right now -- there's already evidence that uarch 
considerations around cboz may be significant.


> 
> Another possibility might to improve the generic implementation, as we have done
> recently where RISCV bitmanip was a matter to add just 2 files and 4 functions
> to optimize multiple string functions [2].  I have some WIP patches to add support
> for unaligned memcpy/memmove with a very simple strategy.
As I noted elsewhere.  I was on the fence with pushing for improvements 
to the generic strcmp bits, but could be easily swayed to that position.

jeff

  reply	other threads:[~2023-03-31 18:07 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-21 19:15 Evan Green
2023-02-21 19:15 ` [PATCH v2 1/3] riscv: Add Linux hwprobe syscall support Evan Green
2023-03-29 18:38   ` Adhemerval Zanella Netto
2023-02-21 19:15 ` [PATCH v2 2/3] riscv: Add hwprobe vdso call support Evan Green
2023-03-29 18:39   ` Adhemerval Zanella Netto
2023-02-21 19:15 ` [PATCH v2 3/3] riscv: Add and use alignment-ignorant memcpy Evan Green
2023-03-28 22:54 ` [PATCH v2 0/3] RISC-V: ifunced memcpy using new kernel hwprobe interface Palmer Dabbelt
2023-03-28 23:41   ` Adhemerval Zanella Netto
2023-03-29  0:01     ` Palmer Dabbelt
2023-03-29 19:16       ` Adhemerval Zanella Netto
2023-03-29 19:45         ` Palmer Dabbelt
2023-03-29 20:13           ` Adhemerval Zanella Netto
2023-03-30 18:31             ` Evan Green
2023-03-30 19:43               ` Adhemerval Zanella Netto
2023-03-30  6:20           ` Jeff Law
2023-03-30 18:43             ` Evan Green
2023-03-31  5:09               ` Jeff Law
2023-03-30 19:38             ` Adhemerval Zanella Netto
2023-03-31 18:07               ` Jeff Law [this message]
2023-03-31 18:34                 ` Palmer Dabbelt
2023-03-31 19:32                   ` Adhemerval Zanella Netto
2023-03-31 20:19                     ` Jeff Law
2023-03-31 21:03                       ` Palmer Dabbelt
2023-03-31 21:35                         ` Jeff Law
2023-03-31 21:38                           ` Palmer Dabbelt
2023-03-31 22:10                             ` Jeff Law
2023-04-07 15:36                               ` Palmer Dabbelt

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