public inbox for libc-alpha@sourceware.org
 help / color / mirror / Atom feed
From: Manjunath S Matti <mmatti@linux.vnet.ibm.com>
To: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>,
	Manjunath Matti <mmatti@linux.ibm.com>,
	libc-alpha@sourceware.org
Cc: rajis@linux.ibm.com, Carl Love <cel@us.ibm.com>
Subject: Re: [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC.
Date: Wed, 20 Sep 2023 16:58:04 +0530	[thread overview]
Message-ID: <866d7459-b031-883b-f356-b05fa2e5ad71@linux.vnet.ibm.com> (raw)
In-Reply-To: <526f2aac-a06c-d1cf-4c7b-1339846a1711@linaro.org>


On 12/09/23 6:57 pm, Adhemerval Zanella Netto wrote:
>
> On 12/09/23 05:27, Manjunath Matti wrote:
>> On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the
>> prologue get/save/set rounding mode operations for POWER9 and
>> later by using 'mffscrn' where possible, this was introduced by
>> commit f1c56cdff09f650ad721fae026eb6a3651631f3d.
>>
>> GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
>> which now returns the FPSCR fields in a double. This feature is
>> available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
>> is defined along with __builtin_set_fpscr_rn enabled.
>> GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds
>> this feature.
>>
>> Changes are done to use __builtin_set_fpscr_rn instead of mffscrn
>> or mffscrni in __fe_mffscrn(rn).
>>
>> Suggested-by: Carl Love <cel@us.ibm.com>
>> ---
>>   sysdeps/powerpc/fpu/fenv_libc.h | 23 ++++++++++++++++++++---
>>   1 file changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
>> index fa5e1c697e..55484eb229 100644
>> --- a/sysdeps/powerpc/fpu/fenv_libc.h
>> +++ b/sysdeps/powerpc/fpu/fenv_libc.h
>> @@ -84,8 +84,15 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
>>       __fr.fenv;								\
>>     })
>>   
>> +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
>> +   now returns the FPSCR fields in a double. This support is available
>> +   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
>> +   To retain backward compatibility with older GCC, we still retain the
>> +   old inline assembly implementation.  */
>> +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
>> +#define fegetenv_and_set_rn(rn) __builtin_set_fpscr_rn (rn)
>> +#elif defined _ARCH_PWR9
>>   /* Like fegetenv_control, but also sets the rounding mode.  */
>> -#ifdef _ARCH_PWR9
>>   #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn)
>>   #else
>>   /* 'mffscrn' will decode to 'mffs' on ARCH < 3_00, which is still necessary
> I think the macro would be better defined as:
>
> #ifdef __SET_FPSCR_RN_RETURNS_FPSCR__
> # define __fe_mffscrn(rn)  __builtin_set_fpscr_rn (rn)
> #else
> # define __fe_mffscrn(rn) [...]
> #endif
>
> Then there is no need to redefine fegetenv_and_set_rn nor __fesetround_inline.

So this is what you are asking me to do right ?

--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -89,22 +89,11 @@ extern const fenv_t *__fe_mask_env (void) 
attribute_hidden;
     on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
     To retain backward compatibility with older GCC, we still retain the
     old inline assembly implementation.  */
-#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
+#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__
  #define fegetenv_and_set_rn(rn) __builtin_set_fpscr_rn (rn)
-#elif defined _ARCH_PWR9
+#else
  /* Like fegetenv_control, but also sets the rounding mode.  */
  #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn)
-#else
-/* 'mffscrn' will decode to 'mffs' on ARCH < 3_00, which is still necessary
-   but not sufficient, because it does not set the rounding mode.
-   Explicitly set the rounding mode when 'mffscrn' actually doesn't.  */
-#define fegetenv_and_set_rn(rn) \
-  ({register fenv_union_t 
__fr;                                                \
-    __fr.fenv = __fe_mffscrn (rn);                                     \
-    if (__glibc_unlikely (!(GLRO(dl_hwcap2) & 
PPC_FEATURE2_ARCH_3_00)))        \
-      __fesetround_inline 
(rn);                                                \
- __fr.fenv; \
-  })
  #endif


I was under the impression that the redefine of fegetenv_and_set_rn and 
__fesetround_inline

was needed for architectures below POWE9, i.e POWER8, 7, etc.

Please correct me if I am wrong.

>> @@ -148,7 +155,12 @@ typedef union
>>   static inline int
>>   __fesetround_inline (int round)
>>   {
>> -#ifdef _ARCH_PWR9
>> +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
>> +   now returns the FPSCR fields in a double. This support is available
>> +   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.  */
>> +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
>> +  __builtin_set_fpscr_rn (round);
>> +#elif defined _ARCH_PWR9
>>     __fe_mffscrn (round);
>>   #else
>>     if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
>> @@ -178,7 +190,12 @@ __fesetround_inline (int round)
>>   static inline void
>>   __fesetround_inline_nocheck (const int round)
>>   {
>> -#ifdef _ARCH_PWR9
>> +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
>> +   now returns the FPSCR fields in a double. This support is available
>> +   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.  */
>> +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
>> +  __builtin_set_fpscr_rn (round);
>> +#elif defined _ARCH_PWR9
>>     __fe_mffscrn (round);
>>   #else
>>     if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))


So the rest it OK ? I will update the patch with suggested changes.


  reply	other threads:[~2023-09-20 11:28 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-12  8:27 Manjunath Matti
2023-09-12 13:27 ` Adhemerval Zanella Netto
2023-09-20 11:28   ` Manjunath S Matti [this message]
2023-09-20 13:33     ` Adhemerval Zanella Netto
2023-10-19  1:25     ` Peter Bergner
2023-09-23 15:49 Manjunath Matti
2023-09-27 16:56 ` Adhemerval Zanella Netto
2023-10-19  1:47 ` Peter Bergner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=866d7459-b031-883b-f356-b05fa2e5ad71@linux.vnet.ibm.com \
    --to=mmatti@linux.vnet.ibm.com \
    --cc=adhemerval.zanella@linaro.org \
    --cc=cel@us.ibm.com \
    --cc=libc-alpha@sourceware.org \
    --cc=mmatti@linux.ibm.com \
    --cc=rajis@linux.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).