Re: [PATCH v2] powerpc64le: Optimize memset for POWER10

[Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>]

Raoni Fassina Firmino via Libc-alpha <libc-alpha@sourceware.org> writes:

> This implementation is based on __memset_power8 and integrates a lot
> of suggestions from Anton Blanchard.
>
> The biggest difference is that it makes extensive use of stxvl to
> alignment and tail code to avoid branches and small stores.  It has
> three main execution paths:
>
> a) "Short lengths" for lengths up to 64 bytes, avoiding as many
>    branches as possible.
>
> b) "General case" for larger lengths, it has an alignment section
>    using stxvl to avoid branches, a 128 bytes loop and then a tail
>    code, again using stxvl with few branches.
>
> c) "Zeroing cache blocks" for lengths from 256 bytes upwards and set
>    value being zero.  It is mostly the __memset_power8 code but the
>    alignment phase was simplified because, at this point, address is
>    already 16-bytes aligned and also changed to use vector stores.
>    The tail code was also simplified to reuse the general case tail.
>
> All unaligned stores use stxvl instructions that do not generate
> alignment interrupts on POWER10, making it safe to use on
> caching-inhibited memory.
>
> On average, this implementation provides something around 30%
> improvement when compared to __memset_power8.

LGTM.
Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>

Pushed as 23fdf8178cce3c2ec320dd5eca8b544245bcaef0.

Thanks!

-- 
Tulio Magno