From: Florian Weimer <fweimer@redhat.com>
To: Jan Kratochvil <jkratochvil@azul.com>
Cc: libc-alpha@sourceware.org, Anton Kozlov <akozlov@azul.com>,
Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Subject: Re: [PATCH] RFC: Provide a function to reset IFUNC PLTs
Date: Wed, 08 Mar 2023 11:44:45 +0100 [thread overview]
Message-ID: <87fsafsesi.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <ZAhiO4szSzu+DLSq@host1.jankratochvil.net> (Jan Kratochvil's message of "Wed, 8 Mar 2023 18:23:55 +0800")
* Jan Kratochvil:
> On Tue, 07 Mar 2023 16:40:46 +0800, Florian Weimer wrote:
>> Use of <sys/platform/x86.h> is somewhat rare. Not even GCC uses it
>> AFAIK. It has its own cached CPU data used for target clones and
>> similar features. Re-running those IFUNC resolvers will just give the
>> same results.
>
> I do not use <sys/platform/x86.h> anywhere, why do you mention it?
> I am doing there
> memset((volatile uint8_t *)cpu_features, 0, sizeof(*cpu_features));
> ...
> _dl_x86_init_cpu_features();
> to prevent the cache of CPU data. And it does work.
This code resets the data queried by <sys/platform/x86.h>. But GCC and
others do not use these interfaces, they use CPUID/XGETBV directly and
cache the result, so this reset does not alter the outcome of their
IFUNC resolvers.
>> Distributions have started to deploy alternate builds in
>> glibc-hwcaps/x86-64-v3 directories:
>>
>> openSUSE Tumbleweed gains optional x86-64-v3 optimization
>> <https://news.opensuse.org/2023/03/02/tw-gains-optional-optimizations/>
>>
>> This might be a common situation fairly soon. This is not IFUNC-based
>> at all, so any IFUNC-based approach is not going to help with that.
>
> What about some "dlreopen" to replace the variant of glibc?
The trivial implementation is not going to work because most of the
function and data addresses will change as a result of the reload. Most
checkpoints probably occur in a blocking system call, and that would
need some form of on-stack replacement to work properly.
>> Practically speaking, I think cluster heterogeneity needs to be hidden
>> at the cluster level.
>
> The question is how to implement it. I have found
> https://github.com/ddcc/libcpuidoverride
> but it is not compatible with latest glibc (maybe its loader code needs to
> implement ELF relocations, it would be definitely fixable).
It needs kernel support for sure. I do not know to what extent CPUID
can be context-switched at the silicon level, maybe the masking is
system-wide (or per-guest in a virtualized configuration).
> Another option is GLIBC_TUNABLES=glibc.cpu.hwcaps=... although then one has to
> translate cpuid feature bits into the glibc names like SSE4_2 etc.
> Also re-exec() after setenv("GLIBC_TUNABLES") is not too nice.
Again, that's not going to work in practice because libraries and
applications do not use <sys/platform/x86.h>.
Thanks,
Florian
next prev parent reply other threads:[~2023-03-08 10:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-06 8:04 Jan Kratochvil
2023-03-07 8:40 ` Florian Weimer
2023-03-07 13:07 ` Adhemerval Zanella Netto
2023-03-08 10:21 ` Jan Kratochvil
2023-03-08 13:04 ` Adhemerval Zanella Netto
2023-03-09 11:32 ` Jan Kratochvil
2023-03-09 15:47 ` Adhemerval Zanella Netto
2023-03-09 17:43 ` Adhemerval Zanella Netto
2023-03-16 14:38 ` Jan Kratochvil
2023-03-20 16:47 ` Adhemerval Zanella Netto
2023-03-29 12:12 ` Jan Kratochvil
2023-03-29 13:14 ` Adhemerval Zanella Netto
2023-03-13 13:59 ` Florian Weimer
2023-03-14 12:55 ` Jan Kratochvil
2023-03-14 14:49 ` Florian Weimer
2023-03-14 15:06 ` Jan Kratochvil
2023-03-08 10:23 ` Jan Kratochvil
2023-03-08 10:44 ` Florian Weimer [this message]
2023-03-08 11:03 ` Jan Kratochvil
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