From: Noah Goldstein <goldstein.w.n@gmail.com>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: libc-alpha@sourceware.org, "H . J . Lu" <hjl.tools@gmail.com>,
Sunil K Pandey <skpgkp2@gmail.com>
Subject: Re: [PATCH 2/4] x86-64: Require BMI2 for AVX2 strn(case)cmp and wcsncmp implementations
Date: Sat, 1 Oct 2022 15:18:54 -0700 [thread overview]
Message-ID: <CAFUsyfKEmDoJzOWKMD67zrdKXO09bDtgyu=pG1Z8+eny4FtO+A@mail.gmail.com> (raw)
In-Reply-To: <CAFUsyfKat-x5bZo+wnsw=27XqGThmnnA7MQ9BMcN4y=kkyqKMw@mail.gmail.com>
On Sat, Oct 1, 2022 at 3:15 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Sat, Oct 1, 2022 at 12:09 PM Aurelien Jarno <aurelien@aurel32.net> wrote:
> >
> > The AVX2 strncmp, strncasecmp and wcsncmp implementations use the bzhil
> > instructions, which belongs to the BMI2 CPU feature.
> >
> > Fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S")
> > Partially resolves: BZ #29611
> > ---
> > sysdeps/x86_64/multiarch/ifunc-impl-list.c | 25 +++++++++++++++------
> > sysdeps/x86_64/multiarch/ifunc-strcasecmp.h | 1 +
> > sysdeps/x86_64/multiarch/strncmp.c | 4 ++--
>
> The ifunc change in strncmp.c and ifunc-strcasecmp.h need to be backport
> to 2.33, 2.34, 2.35.
>
> Also separate changes for ifunc need to be backport to strncmp.c:
> 2.32, 2.31, 2.30, 2.29, 2.28 for a `tzcnt` usage that needs
> BMI1.
>
> Finally a corresponding fix is needed for strcmp.c as well (there is
> missing BMI2 check in strcmp.c ifunc selection as well as missing
> checks in the impl list).
Don't reply here. Reply (if needed) in main the [0/4] patch thread just
to keep the conversation contained.
>
> > 3 files changed, 21 insertions(+), 9 deletions(-)
> >
> > diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
> > index a71444eccb..ec1a8bff5e 100644
> > --- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
> > +++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
> > @@ -638,13 +638,16 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> > IFUNC_IMPL (i, name, strncasecmp,
> > X86_IFUNC_IMPL_ADD_V4 (array, i, strncasecmp,
> > (CPU_FEATURE_USABLE (AVX512VL)
> > - && CPU_FEATURE_USABLE (AVX512BW)),
> > + && CPU_FEATURE_USABLE (AVX512BW)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __strncasecmp_evex)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncasecmp,
> > - CPU_FEATURE_USABLE (AVX2),
> > + (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __strncasecmp_avx2)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncasecmp,
> > (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)
> > && CPU_FEATURE_USABLE (RTM)),
> > __strncasecmp_avx2_rtm)
> > X86_IFUNC_IMPL_ADD_V2 (array, i, strncasecmp,
> > @@ -660,13 +663,16 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> > IFUNC_IMPL (i, name, strncasecmp_l,
> > X86_IFUNC_IMPL_ADD_V4 (array, i, strncasecmp,
> > (CPU_FEATURE_USABLE (AVX512VL)
> > - && CPU_FEATURE_USABLE (AVX512BW)),
> > + & CPU_FEATURE_USABLE (AVX512BW)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __strncasecmp_l_evex)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncasecmp,
> > - CPU_FEATURE_USABLE (AVX2),
> > + (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2),
> > __strncasecmp_l_avx2)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncasecmp,
> > (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)
> > && CPU_FEATURE_USABLE (RTM)),
> > __strncasecmp_l_avx2_rtm)
> > X86_IFUNC_IMPL_ADD_V2 (array, i, strncasecmp_l,
> > @@ -816,10 +822,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> > && CPU_FEATURE_USABLE (BMI2)),
> > __wcsncmp_evex)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, wcsncmp,
> > - CPU_FEATURE_USABLE (AVX2),
> > + (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __wcsncmp_avx2)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, wcsncmp,
> > (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)
> > && CPU_FEATURE_USABLE (RTM)),
> > __wcsncmp_avx2_rtm)
> > /* ISA V2 wrapper for GENERIC implementation because the
> > @@ -1162,13 +1170,16 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> > IFUNC_IMPL (i, name, strncmp,
> > X86_IFUNC_IMPL_ADD_V4 (array, i, strncmp,
> > (CPU_FEATURE_USABLE (AVX512VL)
> > - && CPU_FEATURE_USABLE (AVX512BW)),
> > + && CPU_FEATURE_USABLE (AVX512BW)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __strncmp_evex)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncmp,
> > - CPU_FEATURE_USABLE (AVX2),
> > + (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)),
> > __strncmp_avx2)
> > X86_IFUNC_IMPL_ADD_V3 (array, i, strncmp,
> > (CPU_FEATURE_USABLE (AVX2)
> > + && CPU_FEATURE_USABLE (BMI2)
> > && CPU_FEATURE_USABLE (RTM)),
> > __strncmp_avx2_rtm)
> > X86_IFUNC_IMPL_ADD_V2 (array, i, strncmp,
> > diff --git a/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h b/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
> > index 68646ef199..7622af259c 100644
> > --- a/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
> > +++ b/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
> > @@ -34,6 +34,7 @@ IFUNC_SELECTOR (void)
> > const struct cpu_features *cpu_features = __get_cpu_features ();
> >
> > if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX2)
> > + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2)
> > && X86_ISA_CPU_FEATURES_ARCH_P (cpu_features,
> > AVX_Fast_Unaligned_Load, ))
> > {
> > diff --git a/sysdeps/x86_64/multiarch/strncmp.c b/sysdeps/x86_64/multiarch/strncmp.c
> > index 4ebe4bde30..c4f8b6bbb5 100644
> > --- a/sysdeps/x86_64/multiarch/strncmp.c
> > +++ b/sysdeps/x86_64/multiarch/strncmp.c
> > @@ -41,12 +41,12 @@ IFUNC_SELECTOR (void)
> > const struct cpu_features *cpu_features = __get_cpu_features ();
> >
> > if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX2)
> > + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2)
> > && X86_ISA_CPU_FEATURES_ARCH_P (cpu_features,
> > AVX_Fast_Unaligned_Load, ))
> > {
> > if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
> > - && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
> > - && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2))
> > + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW))
> > return OPTIMIZE (evex);
> >
> > if (CPU_FEATURE_USABLE_P (cpu_features, RTM))
> > --
> > 2.35.1
> >
next prev parent reply other threads:[~2022-10-01 22:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-01 19:09 [PATCH 0/4] x86: Fix AVX2 string functions requiring BMI2 or LZCNT (BZ #29611) Aurelien Jarno
2022-10-01 19:09 ` [PATCH 1/4] x86: include BMI1 and BMI2 in x86-64-v3 level Aurelien Jarno
2022-10-01 19:09 ` [PATCH 2/4] x86-64: Require BMI2 for AVX2 strn(case)cmp and wcsncmp implementations Aurelien Jarno
2022-10-01 22:15 ` Noah Goldstein
2022-10-01 22:18 ` Noah Goldstein [this message]
2022-10-01 19:09 ` [PATCH 3/4] x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations Aurelien Jarno
2022-10-01 19:09 ` [PATCH 4/4] x86-64: Require LZCNT for AVX2 memrchr implementation Aurelien Jarno
2022-10-01 22:06 ` Noah Goldstein
2022-10-01 22:14 ` Aurelien Jarno
2022-10-01 22:30 ` Noah Goldstein
2022-10-01 22:11 ` [PATCH 0/4] x86: Fix AVX2 string functions requiring BMI2 or LZCNT (BZ #29611) Noah Goldstein
2022-10-01 22:17 ` Aurelien Jarno
2022-10-01 22:17 ` Noah Goldstein
2022-10-02 9:35 ` Aurelien Jarno
2022-10-02 16:19 ` Noah Goldstein
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