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From: Noah Goldstein <goldstein.w.n@gmail.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: libc-alpha@sourceware.org
Subject: Re: [PATCH 03/19] <sys/platform/x86.h>: Add LA57 support
Date: Wed, 5 Apr 2023 16:02:49 -0500	[thread overview]
Message-ID: <CAFUsyfL1q+11h5yZzJGYVxMo2VQq2wW9BMSJxHH5d5hmjFD=+w@mail.gmail.com> (raw)
In-Reply-To: <CAMe9rOrErMQ7i0-BR9YR0Lnhc1q9tU59xzuqdz6Q=ih4UCiB-A@mail.gmail.com>

On Wed, Apr 5, 2023 at 1:39 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Wed, Apr 5, 2023 at 11:20 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > On Wed, Apr 5, 2023 at 11:22 AM H.J. Lu via Libc-alpha
> > <libc-alpha@sourceware.org> wrote:
> > >
> > > Add 57-bit linear addresses and five-level paging (LA57) support to
> > > <sys/platform/x86.h>.
> > > ---
> > >  manual/platform.texi               | 3 +++
> > >  sysdeps/x86/bits/platform/x86.h    | 2 +-
> > >  sysdeps/x86/tst-get-cpu-features.c | 1 +
> > >  3 files changed, 5 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/manual/platform.texi b/manual/platform.texi
> > > index c1cef570d2..9251b63e47 100644
> > > --- a/manual/platform.texi
> > > +++ b/manual/platform.texi
> > > @@ -394,6 +394,9 @@ the indirect branch predictor barrier (IBPB).
> > >  @item
> > >  @code{L1D_FLUSH} -- IA32_FLUSH_CMD MSR.
> > >
> > > +@item
> > > +@code{LA57} -- 57-bit linear addresses and five-level paging.
> > > +
> > >  @item
> > >  @code{LAHF64_SAHF64} -- LAHF/SAHF available in 64-bit mode.
> > >
> > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
> > > index 1ed24d7024..c9189fa248 100644
> > > --- a/sysdeps/x86/bits/platform/x86.h
> > > +++ b/sysdeps/x86/bits/platform/x86.h
> > > @@ -182,7 +182,7 @@ enum
> > >    x86_cpu_INDEX_7_ECX_13       = x86_cpu_index_7_ecx + 13,
> > >    x86_cpu_AVX512_VPOPCNTDQ     = x86_cpu_index_7_ecx + 14,
> > >    x86_cpu_INDEX_7_ECX_15       = x86_cpu_index_7_ecx + 15,
> > > -  x86_cpu_INDEX_7_ECX_16       = x86_cpu_index_7_ecx + 16,
> > > +  x86_cpu_LA57                 = x86_cpu_index_7_ecx + 16,
> > >  /* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX
> > >     instructions in 64-bit mode.  */
> > >    x86_cpu_RDPID                        = x86_cpu_index_7_ecx + 22,
> > > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
> > > index 1954698df8..5f5cd3e448 100644
> > > --- a/sysdeps/x86/tst-get-cpu-features.c
> > > +++ b/sysdeps/x86/tst-get-cpu-features.c
> > > @@ -144,6 +144,7 @@ do_test (void)
> > >    CHECK_CPU_FEATURE_PRESENT (AVX512_VNNI);
> > >    CHECK_CPU_FEATURE_PRESENT (AVX512_BITALG);
> > >    CHECK_CPU_FEATURE_PRESENT (AVX512_VPOPCNTDQ);
> > > +  CHECK_CPU_FEATURE_PRESENT (LA57);
> > >    CHECK_CPU_FEATURE_PRESENT (RDPID);
> > >    CHECK_CPU_FEATURE_PRESENT (KL);
> > >    CHECK_CPU_FEATURE_PRESENT (CLDEMOTE);
> > > --
> > > 2.39.2
> > >
> > Rename:
> > `#define bit_cpu_INDEX_7_ECX_16`
> > in cpu-features.h?
>
> cpu-features.h is used internally in glibc.   Changes in
> cpu-features.h are needed only if we need to use
> CPU_FEATURE_SET_ACTIVE to mark a feature active.
>
> --
> H.J.

LGTM
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>

  reply	other threads:[~2023-04-05 21:03 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-05 16:21 [PATCH 00/19] <sys/platform/x86.h>: Update CPUID features H.J. Lu
2023-04-05 16:21 ` [PATCH 01/19] <bits/platform/x86.h>: Rename to x86_cpu_INDEX_7_ECX_15 H.J. Lu
2023-04-05 21:02   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 02/19] platform.texi: Move LAM after LAHF64_SAHF64 H.J. Lu
2023-04-05 21:02   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 03/19] <sys/platform/x86.h>: Add LA57 support H.J. Lu
2023-04-05 18:19   ` Noah Goldstein
2023-04-05 18:38     ` H.J. Lu
2023-04-05 21:02       ` Noah Goldstein [this message]
2023-04-05 16:21 ` [PATCH 04/19] <sys/platform/x86.h>: Add BUS_LOCK_DETECT support H.J. Lu
2023-04-05 18:20   ` Noah Goldstein
2023-04-05 21:03     ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 05/19] <sys/platform/x86.h>: Add SGX-KEYS support H.J. Lu
2023-04-05 18:21   ` Noah Goldstein
2023-04-05 18:39     ` H.J. Lu
2023-04-05 21:03       ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 06/19] <sys/platform/x86.h>: Add RTM_FORCE_ABORT support H.J. Lu
2023-04-05 21:03   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 07/19] <sys/platform/x86.h>: Add LBR support H.J. Lu
2023-04-05 21:03   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 08/19] <sys/platform/x86.h>: Add RAO-INT support H.J. Lu
2023-04-05 21:03   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 09/19] <sys/platform/x86.h>: Add LASS support H.J. Lu
2023-04-05 21:04   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 10/19] <sys/platform/x86.h>: Add CMPCCXADD support H.J. Lu
2023-04-05 21:04   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 11/19] <sys/platform/x86.h>: Add ArchPerfmonExt support H.J. Lu
2023-04-05 21:04   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 12/19] <sys/platform/x86.h>: Add WRMSRNS support H.J. Lu
2023-04-05 21:04   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 13/19] <sys/platform/x86.h>: Add AMX-FP16 support H.J. Lu
2023-04-05 21:04   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 14/19] <sys/platform/x86.h>: Add AVX-IFMA support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 15/19] <sys/platform/x86.h>: Add MSRLIST support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 16/19] <sys/platform/x86.h>: Add AVX-VNNI-INT8 support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 17/19] <sys/platform/x86.h>: Add AVX-NE-CONVERT support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 18/19] <sys/platform/x86.h>: Add AMX-COMPLEX support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein
2023-04-05 16:21 ` [PATCH 19/19] <sys/platform/x86.h>: Add PREFETCHI support H.J. Lu
2023-04-05 21:05   ` Noah Goldstein

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