public inbox for libc-alpha@sourceware.org
 help / color / mirror / Atom feed
From: "H.J. Lu" <hjl.tools@gmail.com>
To: Noah Goldstein <goldstein.w.n@gmail.com>,
	Thiago Macieira <thiago.macieira@intel.com>,
	 Arjan van de Ven <arjan@linux.intel.com>
Cc: GNU C Library <libc-alpha@sourceware.org>
Subject: Re: [PATCH] x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI
Date: Tue, 7 Dec 2021 04:53:57 -0800	[thread overview]
Message-ID: <CAMe9rOquRNm6_a1LZ8+u0czifb8Gm9iVGu8jRPxYt5+RJjbsxQ@mail.gmail.com> (raw)
In-Reply-To: <CAFUsyfLjNsvhg9yAvyRr69c8M5Ra7RDbPgwFJoEMvXa-MJUjSw@mail.gmail.com>

On Mon, Dec 6, 2021 at 11:47 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Sun, Dec 5, 2021 at 9:23 PM H.J. Lu via Libc-alpha
> <libc-alpha@sourceware.org> wrote:
> >
> > Don't set Prefer_No_AVX512 on processors with AVX512 and AVX-VNNI since
> > they won't lower CPU frequency when ZMM load and store instructions are
> > used.
> > ---
> >  sysdeps/x86/cpu-features.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> > index be2498b2e7..311ade1f26 100644
> > --- a/sysdeps/x86/cpu-features.c
> > +++ b/sysdeps/x86/cpu-features.c
> > @@ -538,8 +538,11 @@ init_cpu_features (struct cpu_features *cpu_features)
> >           |= bit_arch_Prefer_No_VZEROUPPER;
> >        else
> >         {
> > -         cpu_features->preferred[index_arch_Prefer_No_AVX512]
> > -           |= bit_arch_Prefer_No_AVX512;
> > +         /* Processors with AVX512 and AVX-VNNI won't lower CPU frequency
> > +            when ZMM load and store instructions are used.  */
> > +         if (!CPU_FEATURES_CPU_P (cpu_features, AVX_VNNI))
> > +           cpu_features->preferred[index_arch_Prefer_No_AVX512]
> > +             |= bit_arch_Prefer_No_AVX512;
> >
> >           /* Avoid RTM abort triggered by VZEROUPPER inside a
> >              transactionally executing RTM region.  */
> > --
> > 2.33.1
> >
>
> Should we also do Rocket Lake?
> According to Travis Downs at least downclocking is an issue there ether:
> https://travisdowns.github.io/blog/2020/08/19/icl-avx512-freq.html#rocket-lake

Thiago, Arjan,

Is this true that Rocket Lake can use ZMM load/store?

-- 
H.J.

  reply	other threads:[~2021-12-07 12:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-06  3:23 H.J. Lu
2021-12-07  7:47 ` Noah Goldstein
2021-12-07 12:53   ` H.J. Lu [this message]
2021-12-07 13:17     ` Arjan van de Ven
2021-12-07 13:34       ` H.J. Lu
2021-12-07 14:05         ` Florian Weimer
2021-12-07 14:15           ` H.J. Lu
2021-12-07 15:47             ` Florian Weimer
2021-12-07 15:52               ` H.J. Lu
2021-12-07 16:22                 ` Thiago Macieira
2021-12-07 19:32                 ` Noah Goldstein
2022-04-23  1:51                   ` Sunil Pandey

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAMe9rOquRNm6_a1LZ8+u0czifb8Gm9iVGu8jRPxYt5+RJjbsxQ@mail.gmail.com \
    --to=hjl.tools@gmail.com \
    --cc=arjan@linux.intel.com \
    --cc=goldstein.w.n@gmail.com \
    --cc=libc-alpha@sourceware.org \
    --cc=thiago.macieira@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).