* [PATCH] AArch64: Improve strchrnul
@ 2023-01-12 16:00 Wilco Dijkstra
2023-01-13 12:29 ` Szabolcs Nagy
0 siblings, 1 reply; 2+ messages in thread
From: Wilco Dijkstra @ 2023-01-12 16:00 UTC (permalink / raw)
To: 'GNU C Library'; +Cc: Szabolcs Nagy
Unroll the main loop, which improves performance slightly.
Passes regress.
---
diff --git a/sysdeps/aarch64/strchrnul.S b/sysdeps/aarch64/strchrnul.S
index 4ca1e58c36ac903fad83c4470ed7f4abd6c74e27..aa8c9a4363051b4098c2f60ee830bab7326a54a7 100644
--- a/sysdeps/aarch64/strchrnul.S
+++ b/sysdeps/aarch64/strchrnul.S
@@ -70,14 +70,22 @@ ENTRY (__strchrnul)
.p2align 4
L(loop):
- ldr qdata, [src, 16]!
+ ldr qdata, [src, 16]
+ cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
+ cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b
+ umaxp vend.16b, vhas_chr.16b, vhas_chr.16b
+ fmov tmp1, dend
+ cbnz tmp1, L(end)
+ ldr qdata, [src, 32]!
cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b
umaxp vend.16b, vhas_chr.16b, vhas_chr.16b
fmov tmp1, dend
cbz tmp1, L(loop)
-
+ sub src, src, 16
+L(end):
shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */
+ add src, src, 16
fmov tmp1, dend
#ifndef __AARCH64EB__
rbit tmp1, tmp1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] AArch64: Improve strchrnul
2023-01-12 16:00 [PATCH] AArch64: Improve strchrnul Wilco Dijkstra
@ 2023-01-13 12:29 ` Szabolcs Nagy
0 siblings, 0 replies; 2+ messages in thread
From: Szabolcs Nagy @ 2023-01-13 12:29 UTC (permalink / raw)
To: Wilco Dijkstra; +Cc: 'GNU C Library'
The 01/12/2023 16:00, Wilco Dijkstra wrote:
> Unroll the main loop, which improves performance slightly.
> Passes regress.
please commit it, thanks.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
>
> ---
>
> diff --git a/sysdeps/aarch64/strchrnul.S b/sysdeps/aarch64/strchrnul.S
> index 4ca1e58c36ac903fad83c4470ed7f4abd6c74e27..aa8c9a4363051b4098c2f60ee830bab7326a54a7 100644
> --- a/sysdeps/aarch64/strchrnul.S
> +++ b/sysdeps/aarch64/strchrnul.S
> @@ -70,14 +70,22 @@ ENTRY (__strchrnul)
>
> .p2align 4
> L(loop):
> - ldr qdata, [src, 16]!
> + ldr qdata, [src, 16]
> + cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
> + cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b
> + umaxp vend.16b, vhas_chr.16b, vhas_chr.16b
> + fmov tmp1, dend
> + cbnz tmp1, L(end)
> + ldr qdata, [src, 32]!
> cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
> cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b
> umaxp vend.16b, vhas_chr.16b, vhas_chr.16b
> fmov tmp1, dend
> cbz tmp1, L(loop)
> -
> + sub src, src, 16
> +L(end):
> shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */
> + add src, src, 16
> fmov tmp1, dend
> #ifndef __AARCH64EB__
> rbit tmp1, tmp1
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-01-12 16:00 [PATCH] AArch64: Improve strchrnul Wilco Dijkstra
2023-01-13 12:29 ` Szabolcs Nagy
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