From: "Tang, Jun" <juntangc@amazon.com>
To: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: 'GNU C Library' <libc-alpha@sourceware.org>
Subject: RE: patch for hp-timing.h
Date: Mon, 6 Feb 2023 19:34:16 +0000 [thread overview]
Message-ID: <aa3b37b204d44bd98070cfc5566d65f4@amazon.com> (raw)
In-Reply-To: <PAWPR08MB8982B302524135CB13539B7C83DA9@PAWPR08MB8982.eurprd08.prod.outlook.com>
Wilco,
Thanks for the suggestion,
There are 7 zero bits at the end of freq (1050000000). So the time can be extended to 2048 second before losing resolution. Below is the updated patch for 1024 sec -
- (Diff) = ((End) - (Start)) * (UINT64_C(1000000000) / freq); \
+ (Diff) = (((End) - (Start)) * UINT64_C(1000000000>>6)) / (freq>>6); \
Regards,
Jun
-----Original Message-----
From: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Sent: Monday, February 6, 2023 10:54 AM
To: Tang, Jun <juntangc@amazon.com>
Cc: 'GNU C Library' <libc-alpha@sourceware.org>
Subject: RE: [EXTERNAL]patch for hp-timing.h
CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe.
Hi Jun,
> Removing zero bits from multiply and making shifts afterwards can
> extend the time before overflow. Does it also reduce the resolution of the timer?
It wouldn't if we shift out zero bits. For example 1000000 has 6 zero bits at the bottom, so assuming every implementation uses a multiple of 1MHz then there is no loss of accuracy. And 6 extra bits would mean 1024 seconds before overflow at 1GHz which seems long enough.
Cheers,
Wilco
next prev parent reply other threads:[~2023-02-06 19:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 13:29 Wilco Dijkstra
2023-02-03 13:38 ` Adhemerval Zanella Netto
2023-02-03 14:02 ` Tang, Jun
2023-02-06 16:53 ` Wilco Dijkstra
2023-02-06 19:34 ` Tang, Jun [this message]
2023-02-08 14:58 ` Wilco Dijkstra
-- strict thread matches above, loose matches on Subject: below --
2023-01-31 23:20 Tang, Jun
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