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From: Matheus Almeida <>
To: "" <>
Cc: Doug Gilmore <>
Subject: RE: [Patch, mips]: Add support for FR=1/o32. Update implementation of setjmp/longjmp
Date: Tue, 26 Nov 2013 14:52:00 -0000	[thread overview]
Message-ID: <> (raw)

Fixed typo in subject line.

-----Original Message-----
From: Matheus Almeida 
Sent: 26 November 2013 11:14
Cc: Doug Gilmore
Subject: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp

Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit:
FR=0 -> 32-bit FPU registers
FR=1 -> 64-bit FPU registers
This can be controlled by -mfp32/-mfp64 command line options.

This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored. 

We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library.


Matheus Almeida
MIPS processor IP

                 reply	other threads:[~2013-11-26 11:34 UTC|newest]

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