From: "Måns Rullgård" <mans@mansr.com>
To: Richard Henderson <rth@twiddle.net>
Cc: "Måns Rullgård" <mans@mansr.com>,
libc-ports@sourceware.org,
"Joseph Myers" <joseph@codesourcery.com>
Subject: Re: [PATCH 24/26] arm: Add optimized addmul_1
Date: Thu, 28 Feb 2013 19:37:00 -0000 [thread overview]
Message-ID: <yw1xobf46xhp.fsf@unicorn.mansr.com> (raw)
In-Reply-To: <512F9FA4.1080500@twiddle.net> (Richard Henderson's message of "Thu, 28 Feb 2013 10:19:16 -0800")
Richard Henderson <rth@twiddle.net> writes:
> On 02/28/2013 05:58 AM, Måns Rullgård wrote:
>>> > +0:
>>> > + ldr r6, [r1], #4 /* load next ul */
>>> > + adds r4, r4, r5 /* (out, c) = cl + lpl */
>>> > + ldr r5, [r0, #4] /* load next rl */
>>> > + str r4, [r0], #4
>>> > + adc r4, ip, #0 /* cl = hpl + c */
>> You might gain a cycle here on some cores by replacing r4 by something
>> else in the adds/str sequence and reversing the order of the last two
>> insns to better exploit dual-issue. On most semi-modern cores you can
>> get another register for free by pushing one more to the stack
>> (load/store multiple instructions transfer registers pairwise).
>>
>> I'd expect this to benefit the A8 and maybe A9. On A15 it should make
>> no difference.
>>
>
> To swap the adc and str, I'd have to add another move insn too. I guess the
> intent is that would dual-issue with the store, giving us 6 insns in 3 cycles
> as opposed to 5 insns in 4 cycles?
I meant like this:
ldr r6, [r1], #4 /* load next ul */
adds r7, r4, r5 /* (out, c) = cl + lpl */
ldr r5, [r0, #4] /* load next rl */
adc r4, ip, #0 /* cl = hpl + c */
str r7, [r0], #4
It seems to me this leaves everything with the same values as your
version. r7 can be pushed/popped for free since you're currently
preserving and odd number of registers.
> Fair enough.
>
> I'm not willing to work *too* hard on this. If someone cares about the last
> cycle of performance on A[89], they should work on getting the real libgmp
> routines re-licensed for glibc. I'm not willing to do politics.
Nor am I.
--
Måns Rullgård
mans@mansr.com
next prev parent reply other threads:[~2013-02-28 19:37 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-27 3:16 [PATCH 00/26] ARM improvements Richard Henderson
2013-02-27 3:16 ` [PATCH 05/26] arm: Introduce thumb helpers s and pc_ofs Richard Henderson
2013-02-28 0:20 ` Joseph S. Myers
2013-02-28 0:36 ` Richard Henderson
2013-02-28 1:45 ` Måns Rullgård
2013-02-27 3:16 ` [PATCH 01/26] Sync config.guess and config.sub with upstream Richard Henderson
2013-02-27 17:03 ` Joseph S. Myers
2013-02-27 3:16 ` [PATCH 09/26] arm: Mark assembly files that will not use thumb mode Richard Henderson
2013-02-28 0:58 ` Joseph S. Myers
2013-02-27 3:16 ` [PATCH 04/26] arm: Include libc-do-syscall in sysdep-rtld-routines Richard Henderson
2013-02-28 0:15 ` Joseph S. Myers
2013-02-27 3:16 ` [PATCH 03/26] arm: Handle armv6 in preconfigure Richard Henderson
2013-02-27 18:02 ` Joseph S. Myers
2013-02-27 18:04 ` Roland McGrath
2013-02-27 18:08 ` Richard Henderson
2013-02-27 18:34 ` Richard Henderson
2013-02-27 19:57 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 15/26] arm: Delete LOADREGS macro Richard Henderson
2013-02-28 1:24 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 12/26] arm: Enable thumb2 mode in assembly files Richard Henderson
2013-02-27 3:17 ` [PATCH 08/26] arm: Add IT insns for thumb mode Richard Henderson
2013-02-28 0:41 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 16/26] arm: Commonize BX conditionals Richard Henderson
2013-02-28 21:51 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 22/26] arm: Implement armv6t2 optimized strchr, strrchr, rawmemchr Richard Henderson
2013-02-28 1:31 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 24/26] arm: Add optimized addmul_1 Richard Henderson
2013-02-28 13:58 ` Måns Rullgård
2013-02-28 18:19 ` Richard Henderson
2013-02-28 19:37 ` Måns Rullgård [this message]
2013-02-27 3:17 ` [PATCH 21/26] arm: Implement armv6t2 optimized strcpy Richard Henderson
2013-02-27 3:17 ` [PATCH 02/26] arm: Update preconfigure fragment for gcc 4.8 Richard Henderson
2013-02-27 17:54 ` Joseph S. Myers
2013-02-27 18:11 ` Richard Henderson
2013-02-27 3:17 ` [PATCH 06/26] arm: Use pc_ofs Richard Henderson
2013-02-28 0:21 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 10/26] arm: Introduce and use LDST_PCREL Richard Henderson
2013-02-28 1:00 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 26/26] arm: Add optimized add_n and sub_n Richard Henderson
2013-02-27 3:17 ` [PATCH 25/26] arm: Add optimized submul_1 Richard Henderson
2013-02-27 3:17 ` [PATCH 20/26] arm: Implement armv6t2 optimized strlen Richard Henderson
2013-02-27 17:12 ` Måns Rullgård
2013-02-27 17:44 ` Richard Henderson
2013-02-27 3:17 ` [PATCH 07/26] arm: Introduce and use GET_TLS Richard Henderson
2013-02-28 0:34 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 14/26] arm: Use push/pop mnemonics Richard Henderson
2013-02-28 1:03 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 23/26] arm: Rewrite armv6t2 memchr with uqadd8 Richard Henderson
2013-02-27 7:04 ` Richard Henderson
2013-02-27 3:17 ` [PATCH 17/26] arm: Unless arm4t, pop return address directly into pc Richard Henderson
2013-02-28 21:57 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 11/26] arm: Introduce and use NEGOFF series of macros Richard Henderson
2013-02-27 3:17 ` [PATCH 19/26] arm: Add optimized ffs for armv6t2 Richard Henderson
2013-02-27 15:51 ` Måns Rullgård
2013-02-27 16:34 ` Richard Henderson
2013-02-27 17:49 ` Roland McGrath
2013-02-27 3:17 ` [PATCH 18/26] arm: Use GET_TLS more often Richard Henderson
2013-02-28 21:59 ` Joseph S. Myers
2013-02-27 3:17 ` [PATCH 13/26] arm: Store lr in r2 around GET_TLS Richard Henderson
2013-02-27 15:41 ` [PATCH 00/26] ARM improvements Måns Rullgård
2013-02-27 16:59 ` Joseph S. Myers
2013-02-27 17:34 ` Richard Henderson
2013-02-28 22:05 ` Joseph S. Myers
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