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* [gcc(refs/vendors/ibm/heads/gcc-8-branch)] ibm: Merge up to top of releases/gcc-8
@ 2020-10-19 13:08 Peter Bergner
0 siblings, 0 replies; 2+ messages in thread
From: Peter Bergner @ 2020-10-19 13:08 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:a44d17ec0f5ef4d4476daae350498aed4da38f02
commit a44d17ec0f5ef4d4476daae350498aed4da38f02
Merge: e25f27eea47 03a38ad5820
Author: Peter Bergner <bergner@linux.ibm.com>
Date: Fri Oct 9 13:14:06 2020 -0500
ibm: Merge up to top of releases/gcc-8
2020-10-09 Peter Bergner <bergner@linux.ibm.com>
Merge up to releases/gcc-8 03a38ad58202b465f90e1795ba8f52100c3dc4f4
Diff:
ChangeLog | 4 +
contrib/ChangeLog | 50 +
contrib/gcc-changelog/git_check_commit.py | 49 +
contrib/gcc-changelog/git_commit.py | 677 ++
contrib/gcc-changelog/git_email.py | 107 +
contrib/gcc-changelog/git_repository.py | 78 +
contrib/gcc-changelog/git_update_version.py | 145 +
contrib/gcc-changelog/test_email.py | 367 ++
contrib/gcc-changelog/test_patches.txt | 3197 ++++++++++
contrib/git-backport.py | 65 +
gcc/ChangeLog | 1516 +++++
gcc/ChangeLog.ibm | 4 +
gcc/DATESTAMP | 2 +-
gcc/ada/ChangeLog | 10 +
gcc/ada/gcc-interface/trans.c | 18 +-
gcc/ada/mingw32.h | 1 +
gcc/asan.c | 22 +-
gcc/attribs.c | 3 +-
gcc/c-family/ChangeLog | 20 +
gcc/c-family/c-common.c | 11 +-
gcc/c/ChangeLog | 41 +
gcc/c/c-decl.c | 65 +-
gcc/c/c-parser.c | 19 +-
gcc/c/c-tree.h | 12 +-
gcc/c/c-typeck.c | 3 +-
gcc/cfgexpand.c | 3 +
gcc/cfgrtl.c | 20 +-
gcc/combine.c | 1 +
gcc/common/config/aarch64/aarch64-common.c | 7 +
gcc/config.in | 14 +
gcc/config/aarch64/aarch64-builtins.c | 285 +-
gcc/config/aarch64/aarch64-c.c | 4 +
gcc/config/aarch64/aarch64-cores.def | 9 +
gcc/config/aarch64/aarch64-option-extensions.def | 3 +
gcc/config/aarch64/aarch64-simd-builtins.def | 49 +-
gcc/config/aarch64/aarch64-simd.md | 311 +-
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/aarch64/aarch64-tuning-flags.def | 3 +
gcc/config/aarch64/aarch64.c | 61 +-
gcc/config/aarch64/aarch64.h | 11 +
gcc/config/aarch64/aarch64.md | 33 +
gcc/config/aarch64/arm_acle.h | 28 +
gcc/config/aarch64/arm_neon.h | 6575 +++++++++++++-------
gcc/config/aarch64/atomics.md | 2 +-
gcc/config/aarch64/driver-aarch64.c | 146 +-
gcc/config/aarch64/iterators.md | 32 +
gcc/config/alpha/alpha.c | 8 +-
gcc/config/arm/arm-builtins.c | 9 +-
gcc/config/arm/arm-cpus.in | 23 +
gcc/config/arm/arm-tables.opt | 6 +
gcc/config/arm/arm-tune.md | 4 +-
gcc/config/arm/arm.c | 28 +-
gcc/config/arm/driver-arm.c | 10 +-
gcc/config/arm/types.md | 3 +
gcc/config/i386/avx2intrin.h | 354 +-
gcc/config/i386/avx512bwintrin.h | 6 +-
gcc/config/i386/avx512fintrin.h | 418 +-
gcc/config/i386/avx512pfintrin.h | 69 +-
gcc/config/i386/avx512vlbwintrin.h | 10 +-
gcc/config/i386/avx512vlintrin.h | 344 +-
gcc/config/i386/driver-i386.c | 25 +-
gcc/config/i386/f16cintrin.h | 4 +-
gcc/config/i386/i386.c | 39 +-
gcc/config/i386/i386.md | 23 +-
gcc/config/i386/pconfigintrin.h | 23 +
gcc/config/i386/shaintrin.h | 4 +-
gcc/config/i386/sse.md | 60 +-
gcc/config/i386/wbnoinvdintrin.h | 23 +
gcc/config/i386/xopintrin.h | 8 +-
gcc/config/pdp11/pdp11.c | 3 +-
gcc/config/riscv/riscv-builtins.c | 4 +-
gcc/config/rs6000/altivec.h | 3 +-
gcc/config/rs6000/altivec.md | 43 +
gcc/config/rs6000/rs6000-builtin.def | 4 +
gcc/config/rs6000/rs6000-c.c | 8 +
gcc/config/rs6000/rs6000.c | 77 +-
gcc/config/rs6000/vector.md | 3 +-
gcc/config/rs6000/vsx.md | 14 +-
gcc/config/s390/s390-builtin-types.def | 3 +
gcc/config/s390/s390-builtins.def | 65 +-
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gcc/config/s390/s390.h | 7 +
gcc/config/s390/s390.md | 4 +-
gcc/config/s390/vector.md | 22 +-
gcc/config/s390/vx-builtins.md | 27 +-
gcc/config/tilegx/tilegx.md | 2 +-
gcc/configure | 67 +
gcc/configure.ac | 11 +
gcc/cp/ChangeLog | 97 +
gcc/cp/constexpr.c | 4 +-
gcc/cp/cp-gimplify.c | 17 +-
gcc/cp/decl.c | 27 +-
gcc/cp/init.c | 8 +-
gcc/cp/parser.c | 56 +-
gcc/cp/pt.c | 9 +
gcc/cp/semantics.c | 2 +-
gcc/cp/typeck.c | 28 +-
gcc/dfp.c | 10 +-
gcc/doc/cpp.texi | 14 +-
gcc/doc/extend.texi | 22 +-
gcc/doc/invoke.texi | 12 +-
gcc/doc/sourcebuild.texi | 15 +
gcc/doc/tm.texi | 6 +-
gcc/doc/tm.texi.in | 6 +-
gcc/dwarf2cfi.c | 35 +-
gcc/dwarf2out.c | 51 +-
gcc/emit-rtl.h | 3 +
gcc/explow.c | 3 +
gcc/fold-const.c | 8 +-
gcc/fortran/ChangeLog | 182 +
gcc/fortran/class.c | 19 +-
gcc/fortran/decl.c | 11 +-
gcc/fortran/gfortran.h | 22 +-
gcc/fortran/interface.c | 3 +-
gcc/fortran/resolve.c | 18 +-
gcc/fortran/symbol.c | 19 +-
gcc/fortran/trans-decl.c | 18 +-
gcc/fortran/trans-stmt.c | 6 +-
gcc/gcov-io.c | 6 +-
gcc/gcov-io.h | 3 +
gcc/gimple-ssa-store-merging.c | 78 +-
gcc/gimple.c | 7 +-
gcc/hsa-gen.c | 11 +-
gcc/omp-simd-clone.c | 15 +-
gcc/optabs.c | 16 +-
gcc/print-rtl.c | 4 +-
gcc/stor-layout.c | 6 +-
gcc/testsuite/ChangeLog | 960 +++
.../c-c++-common/gomp/hsa-indirect-call-1.c | 24 +
gcc/testsuite/c-c++-common/pr95903.c | 19 +
gcc/testsuite/c-c++-common/pr96545.c | 31 +
gcc/testsuite/c-c++-common/ubsan/pr94641.c | 11 +
gcc/testsuite/g++.dg/cpp0x/alignof5.C | 6 +
gcc/testsuite/g++.dg/cpp0x/enum40.C | 26 +
gcc/testsuite/g++.dg/cpp0x/nsdmi-template20.C | 13 +
gcc/testsuite/g++.dg/cpp1z/decomp51.C | 16 +
gcc/testsuite/g++.dg/cpp1z/decomp53.C | 22 +
gcc/testsuite/g++.dg/debug/pr94459.C | 58 +
gcc/testsuite/g++.dg/ext/pr94046-1.C | 55 +
gcc/testsuite/g++.dg/ext/pr94046-2.C | 5 +
gcc/testsuite/g++.dg/guality/pr93888.C | 24 +
gcc/testsuite/g++.dg/init/const14.C | 14 +
gcc/testsuite/g++.dg/opt/pr94618.C | 25 +
gcc/testsuite/g++.dg/opt/pr95080.C | 41 +
gcc/testsuite/g++.dg/opt/pr96722.C | 20 +
gcc/testsuite/g++.dg/pr93674.C | 16 +
gcc/testsuite/g++.dg/pr94666.C | 20 +
gcc/testsuite/g++.dg/torture/pr94303.C | 17 +
gcc/testsuite/g++.dg/ubsan/vptr-15.C | 14 +
gcc/testsuite/g++.dg/warn/Wreturn-type-12.C | 23 +
.../g++.dg/warn/Wstrict-aliasing-bogus-tmpl.C | 12 +
gcc/testsuite/g++.target/aarch64/pr94514.C | 27 +
gcc/testsuite/g++.target/aarch64/pr94515-1.C | 44 +
gcc/testsuite/g++.target/aarch64/pr94515-2.C | 41 +
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gcc/testsuite/gcc.c-torture/compile/pr94488.c | 22 +
.../gcc.c-torture/execute/packed-aligned.c | 28 +
gcc/testsuite/gcc.c-torture/execute/pr94130.c | 16 +
gcc/testsuite/gcc.c-torture/execute/pr94134.c | 14 +
gcc/testsuite/gcc.c-torture/execute/pr94412.c | 28 +
gcc/testsuite/gcc.c-torture/execute/pr94524-1.c | 19 +
gcc/testsuite/gcc.c-torture/execute/pr94524-2.c | 25 +
gcc/testsuite/gcc.c-torture/execute/pr94591.c | 32 +
gcc/testsuite/gcc.c-torture/execute/pr94809.c | 12 +
gcc/testsuite/gcc.c-torture/execute/pr97073.c | 21 +
gcc/testsuite/gcc.dg/Wunused-var-4.c | 33 +
gcc/testsuite/gcc.dg/dfp/pr94111.c | 12 +
gcc/testsuite/gcc.dg/gomp/pr82374.c | 5 +-
gcc/testsuite/gcc.dg/gomp/pr95108.c | 18 +
gcc/testsuite/gcc.dg/pr93399.c | 17 +
gcc/testsuite/gcc.dg/pr94002.c | 13 +
gcc/testsuite/gcc.dg/pr94114.c | 13 +
gcc/testsuite/gcc.dg/pr94121.c | 16 +
gcc/testsuite/gcc.dg/pr94167.c | 33 +
gcc/testsuite/gcc.dg/pr94172-1.c | 12 +
gcc/testsuite/gcc.dg/pr94172-2.c | 19 +
gcc/testsuite/gcc.dg/pr94211.c | 12 +
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gcc/testsuite/gcc.dg/pr94842.c | 11 +
gcc/testsuite/gcc.dg/pr94873.c | 27 +
gcc/testsuite/gcc.dg/pr95857.c | 37 +
gcc/testsuite/gcc.dg/store_merging_31.c | 27 +
gcc/testsuite/gcc.dg/store_merging_32.c | 129 +
gcc/testsuite/gcc.dg/tree-ssa/pr94969.c | 28 +
gcc/testsuite/gcc.dg/ubsan/pr94423.c | 17 +
gcc/testsuite/gcc.dg/vect/pr93069.c | 10 +
gcc/testsuite/gcc.target/aarch64/acle/jcvt_1.c | 15 +
gcc/testsuite/gcc.target/aarch64/acle/jcvt_2.c | 33 +
gcc/testsuite/gcc.target/aarch64/acle/rng_1.c | 53 +
.../aarch64/advsimd-intrinsics/arm-neon-ref.h | 8 +-
.../aarch64/advsimd-intrinsics/vector-complex.c | 251 +
.../advsimd-intrinsics/vector-complex_f16.c | 307 +
.../gcc.target/aarch64/advsimd-intrinsics/vld1x3.c | 82 +
.../gcc.target/aarch64/advsimd-intrinsics/vld1x4.c | 83 +
.../aarch64/advsimd-intrinsics/vreinterpret_p128.c | 19 +
.../gcc.target/aarch64/advsimd-intrinsics/vst1x2.c | 80 +
.../gcc.target/aarch64/advsimd-intrinsics/vst1x3.c | 81 +
.../gcc.target/aarch64/advsimd-intrinsics/vst1x4.c | 83 +
.../aarch64/advsimd-intrinsics/vtrn_half.c | 3 -
.../aarch64/advsimd-intrinsics/vuzp_half.c | 3 -
.../aarch64/advsimd-intrinsics/vzip_half.c | 3 -
.../aarch64/cpunative/aarch64-cpunative.exp | 35 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_0 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_1 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_10 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_11 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_12 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_13 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_14 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_15 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_2 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_3 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_4 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_5 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_6 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_7 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_8 | 8 +
gcc/testsuite/gcc.target/aarch64/cpunative/info_9 | 8 +
.../gcc.target/aarch64/cpunative/native_cpu_0.c | 12 +
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gcc/testsuite/gcc.target/aarch64/fp16_fmul_high.h | 16 +-
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gcc/testsuite/gcc.target/aarch64/fp16_fmul_low.h | 16 +-
gcc/testsuite/gcc.target/aarch64/pr94514.c | 77 +
gcc/testsuite/gcc.target/aarch64/pr96313.c | 8 +
gcc/testsuite/gcc.target/aarch64/pr96402.c | 16 +
gcc/testsuite/gcc.target/aarch64/pr97150.c | 14 +
.../gcc.target/aarch64/scalar_intrinsics.c | 14 +-
gcc/testsuite/gcc.target/aarch64/sha3.h | 40 +-
gcc/testsuite/gcc.target/aarch64/sha3_1.c | 4 +-
gcc/testsuite/gcc.target/aarch64/sha3_2.c | 4 +-
gcc/testsuite/gcc.target/aarch64/sha3_3.c | 4 +-
.../gcc.target/aarch64/simd/trn_zip_p64_1.c | 44 +
.../gcc.target/aarch64/simd/vadd_poly_1.c | 50 +
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gcc/testsuite/gcc.target/aarch64/target_attr_20.c | 27 +
gcc/testsuite/gcc.target/aarch64/target_attr_21.c | 27 +
.../gcc.target/aarch64/vabs_intrinsic_3.c | 39 +
gcc/testsuite/gcc.target/aarch64/vabsd_s64.c | 34 +
gcc/testsuite/gcc.target/aarch64/vneg_s.c | 34 +-
gcc/testsuite/gcc.target/aarch64/vnegd_s64.c | 36 +
gcc/testsuite/gcc.target/i386/avx2-pr94460.c | 31 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94438.c | 13 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94509-1.c | 30 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94509-2.c | 38 +
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gcc/testsuite/gcc.target/i386/avx512f-vcmpps-3.c | 4 +
gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 +
gcc/testsuite/gcc.target/i386/avx512vlbw-pr94438.c | 13 +
gcc/testsuite/gcc.target/i386/movdir64b.c | 29 +
gcc/testsuite/gcc.target/i386/movdiri32.c | 26 +
gcc/testsuite/gcc.target/i386/movdiri64.c | 26 +
gcc/testsuite/gcc.target/i386/pr94283.c | 5 +
gcc/testsuite/gcc.target/i386/pr97032.c | 22 +
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gcc/testsuite/gcc.target/powerpc/pr71763.c | 1 +
gcc/testsuite/gcc.target/powerpc/pr96139-a.c | 32 +
gcc/testsuite/gcc.target/powerpc/pr96139-b.c | 32 +
gcc/testsuite/gcc.target/powerpc/pr96139-c.c | 26 +
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gcc/testsuite/gcc.target/s390/vector/align-1.c | 30 +
gcc/testsuite/gcc.target/s390/vector/align-2.c | 29 +
gcc/testsuite/gcc.target/s390/zvector/pr94613.c | 38 +
gcc/testsuite/gcc.target/s390/zvector/vec_sel-1.c | 211 +
gcc/testsuite/gfortran.dg/finalize_28.f90 | 2 +-
gcc/testsuite/gfortran.dg/finalize_34.f90 | 2 +-
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gcc/testsuite/gfortran.dg/fmt_en.f90 | 6 +-
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maintainer-scripts/ChangeLog | 8 +
maintainer-scripts/gcc_release | 2 +-
380 files changed, 21460 insertions(+), 4324 deletions(-)
diff --cc gcc/ChangeLog.ibm
index e1d86d70a0d,00000000000..716ccdd3642
mode 100644,000000..100644
--- a/gcc/ChangeLog.ibm
+++ b/gcc/ChangeLog.ibm
@@@ -1,209 -1,0 +1,213 @@@
++2020-10-09 Peter Bergner <bergner@linux.ibm.com>
++
++ Merge up to releases/gcc-8 03a38ad58202b465f90e1795ba8f52100c3dc4f4
++
+2019-11-25 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 278620.
+ * REVISION: Update subversion id.
+
+2019-08-13 Peter Bergner <bergner@linux.ibm.com>
+
+ * REVISION: Change format to "[ibm/gcc-X-branch revision rev#]"
+
+2019-03-04 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 269365.
+ * REVISION: Update subversion id.
+
+2019-02-22 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 269119.
+ * REVISION: Update subversion id.
+
+2019-01-16 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 268000.
+ * REVISION: Update subversion id.
+
+2018-12-20 Paul Clarke <pc@us.ibm.com>
+
+ Backport from trunk
+
+ 267261
+ 2018-12-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/tmmintrin.h (_mm_hadds_epi16): Vector lanes swapped.
+ (_mm_hsub_epi32): Likewise.
+ (_mm_shuffle_epi8): Fix reversed interpretation of parameters.
+ (_mm_shuffle_pi8): Likewise.
+ (_mm_addubs_pi16): Likewise.
+
+ 266895
+ 2018-12-07 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88408
+ * config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".
+
+ 266869
+ 2018-12-06 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88316
+ * config/rs6000/smmintrin.h: New file.
+ * config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.
+
+ 266868
+ 2018-12-03 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88316
+ * config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
+ (_mm_unpacklo_pi8): Likewise.
+ (_mm_mulhi_pi16): Likewise.
+ (_mm_packs_pi16): Fix for big-endian. Use preferred API.
+ (_mm_packs_pi32): Likewise.
+ (_mm_packs_pu16): Likewise.
+ * config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
+ (_mm_cvtss_si64): Likewise.
+ (_mm_cvtpi32x2_ps): Likewise.
+ (_mm_shuffle_ps): Likewise.
+ (_mm_movemask_pi8): Likewise.
+ (_mm_mulhi_pu16): Likewise.
+ (_mm_sad_pu8): Likewise.
+ (_mm_sad_pu8): Likewise.
+ (_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
+ (_mm_cvtpu8_ps): Likewise.
+ (_mm_movemask_ps): Better #else case for big-endian (no functional
+ change).
+ (_mm_shuffle_pi16): Likewise.
+ * config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
+ Better #else case for big-endian (no functional change).
+ (_mm_movemask_epi8): Likewise.
+ (_mm_shufflehi_epi16): Likewise.
+ (_mm_shufflelo_epi16): Likewise.
+ (_mm_shuffle_epi32): Likewise.
+ (_mm_mul_epu32): Fix for big-endian.
+ (_mm_bsrli_si128): Likewise.
+ (_mm_cvtps_pd): Better #else case for big endian.
+ (_mm_mulhi_epi16): Likewise.
+ (_mm_mul_epu32): Likewise.
+ (_mm_slli_si128): Likewise.
+ (_mm_sll_epi16): Likewise.
+ (_mm_sll_epi32): Likewise.
+ (_mm_sra_epi16): Likewise.
+ (_mm_sra_epi32): Likewise.
+ (_mm_srl_epi16): Likewise.
+ (_mm_srl_epi32): Likewise.
+ (_mm_mulhi_epu16): Likewise.
+ (_mm_sad_epu8): Likewise.
+ * config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
+ (_mm_sub_ps): Likewise.
+ * config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
+ * gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
+ macros consistently (no functional changes).
+ (_mm_alignr_pi8): Likewise.
+
+ 265601
+ 2018-10-29 Paul A. Clarke <pc@us.ibm.com>
+
+ * gcc/config/rs6000/mmintrin.h (_mm_packs_pi16, _mm_packs_pi32,
+ _mm_packs_pu16, _mm_unpackhi_pi8, _mm_unpacklo_pi8, _mm_add_pi8,
+ _mm_add_pi16, _mm_add_pi32, _mm_sub_pi8, _mm_sub_pi16, _mm_sub_pi32,
+ _mm_cmpgt_pi8, _mm_cmpeq_pi16, _mm_cmpgt_pi16, _mm_cmpeq_pi32,
+ _mm_cmpgt_pi32, _mm_adds_pi8, _mm_adds_pi16, _mm_adds_pu8,
+ _mm_adds_pu16, _mm_subs_pi8, _mm_subs_pi16, _mm_subs_pu8,
+ _mm_subs_pu16, _mm_madd_pi16, _mm_mulhi_pi16, _mm_mullo_pi16,
+ _mm_sll_pi16, _mm_sra_pi16, _mm_srl_pi16, _mm_set1_pi16, _mm_set1_pi8):
+ Change 'vector' to '__vector'.
+ * gcc/config/rs6000/xmmintrin.h (_mm_cvtps_pi32, _mm_cvttps_pi32,
+ _mm_cvtps_pi16, _mm_cvtps_pi8, _mm_max_pi16, _mm_max_pu8, _mm_min_pi16,
+ _mm_min_pu8, _mm_mulhi_pu16, _mm_shuffle_pi16, _mm_avg_pu8,
+ _mm_avg_pu16): Likewise. And, whitespace corrections.
+
+ 265542
+ 2018-10-26 Paul A. Clarke <pc@us.ibm.com>
+ * config/rs6000/tmmintrin.h: New file.
+ * config.gcc (powerpc*-*-*): Add tmmintrin.h to
+ extra_headers.
+
+ 265535
+ 2018-10-25 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/mmintrin.h: Enable 32bit compilation.
+ * config/rs6000/xmmintrin.h: Likewise.
+
+ 265531
+ 2018-10-26 Paul A. Clarke <pc@us.ibm.com>
+ * config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian.
+
+2018-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config.gcc (powerpc*-*-*): Add pmmintrin.h to extra_headers.
+ * config/rs6000/pmmintrin.h: New file.
+
+2018-08-13 Peter Bergner <bergner@linux.ibm.com>
+
+ Backport from mainline
+ 2018-07-06 Peter Bergner <bergner@linux.ibm.com>
+
+ PR target/86324
+ * target.def (translate_mode_attribute): New hook.
+ * targhooks.h (default_translate_mode_attribute): Declare.
+ * targhooks.c (default_translate_mode_attribute): New function.
+ * doc/tm.texi.in (TARGET_TRANSLATE_MODE_ATTRIBUTE): New hook.
+ * doc/tm.texi: Regenerate.
+ * config/rs6000/rs6000.c (TARGET_TRANSLATE_MODE_ATTRIBUTE): Define.
+ (rs6000_translate_mode_attribute): New function.
+
+2018-07-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 263037.
+ * REVISION: Update subversion id.
+
+2018-07-10 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262542.
+ * REVISION: Update subversion id.
+
+2018-06-25 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262108.
+ * REVISION: Update subversion id.
+
+2018-06-25 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262108.
+ * REVISION: Update subversion id.
+
+2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ Back port from trunk
+ 2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000.c (mode_supports_dq_form): Rename
+ mode_supports_vsx_dform_quad to mode_supports_dq_form.
+ (mode_supports_vsx_dform_quad): Likewise.
+ (mode_supports_vmx_dform): Move these functions to be next to the
+ other mode_supports functions.
+ (mode_supports_dq_form): Likewise.
+ (quad_address_p): Change calls of mode_supports_vsx_dform_quad to
+ mode_supports_dq_form.
+ (reg_offset_addressing_ok_p): Likewise.
+ (offsettable_ok_by_alignment): Likewise.
+ (rs6000_legitimate_offset_address_p): Likewise.
+ (legitimate_lo_sum_address_p): Likewise.
+ (rs6000_legitimize_address): Likewise.
+ (rs6000_legitimize_reload_address): Likewise.
+ (rs6000_secondary_reload_inner): Likewise.
+ (rs6000_preferred_reload_class): Likewise.
+ (rs6000_output_move_128bit): Likewise.
+
+2018-05-02 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 259857.
+ * REVISION: Update subversion id.
+
+2018-05-02 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 259857.
+ * REVISION: Update subversion id.
+
+2018-04-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Clone branch subversion id 259722
+
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/vendors/ibm/heads/gcc-8-branch)] ibm: Merge up to top of releases/gcc-8
@ 2021-02-11 20:31 Peter Bergner
0 siblings, 0 replies; 2+ messages in thread
From: Peter Bergner @ 2021-02-11 20:31 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:5a885cd963d7783b30b0b4e571beb56f3a588c76
commit 5a885cd963d7783b30b0b4e571beb56f3a588c76
Merge: a44d17ec0f5 c7a6c4a68cb
Author: Peter Bergner <bergner@linux.ibm.com>
Date: Thu Feb 11 13:00:52 2021 -0600
ibm: Merge up to top of releases/gcc-8
2021-02-11 Peter Bergner <bergner@linux.ibm.com>
Merge up to releases/gcc-8 c7a6c4a68cb6fe38820273b5784a1ab6449cb6bd
Diff:
contrib/ChangeLog | 22 ++
contrib/gcc-changelog/git_commit.py | 94 ++++++--
contrib/gcc-changelog/git_email.py | 11 +-
contrib/gcc-changelog/git_repository.py | 8 +-
contrib/gcc-changelog/setup.cfg | 2 +
contrib/gcc-changelog/test_email.py | 43 +++-
contrib/gcc-changelog/test_patches.txt | 204 ++++++++++++++++
gcc/ChangeLog | 242 ++++++++++++++++++-
gcc/ChangeLog.ibm | 4 +
gcc/DATESTAMP | 2 +-
gcc/ada/ChangeLog | 6 +
gcc/ada/exp_attr.adb | 6 +-
gcc/cfgloopmanip.c | 5 +-
gcc/config.gcc | 33 ++-
gcc/config/aarch64/aarch64-c.c | 9 +
gcc/config/aarch64/aarch64-cores.def | 2 +-
gcc/config/aarch64/aarch64-protos.h | 1 +
gcc/config/aarch64/aarch64.c | 92 +++++--
gcc/config/aarch64/aarch64.h | 12 +-
gcc/config/aarch64/aarch64.md | 35 ++-
gcc/config/aarch64/arm_neon.h | 14 +-
gcc/config/arm/arm-protos.h | 2 +
gcc/config/arm/arm.c | 37 ++-
gcc/config/arm/arm.md | 112 +++++++--
gcc/config/i386/i386.c | 66 +++--
gcc/cp/ChangeLog | 28 +++
gcc/cp/call.c | 20 +-
gcc/cp/class.c | 14 ++
gcc/cp/constexpr.c | 7 +-
gcc/cp/cp-tree.h | 3 +-
gcc/cp/parser.c | 4 +-
gcc/cp/pt.c | 2 +
gcc/dfp.c | 2 +
gcc/doc/extend.texi | 17 +-
gcc/doc/install.texi | 2 +-
gcc/dwarf2out.c | 6 +-
gcc/fortran/ChangeLog | 26 ++
gcc/fortran/expr.c | 3 +
gcc/fortran/trans-stmt.c | 5 +-
gcc/fortran/trans.c | 3 +
gcc/gimple-ssa-split-paths.c | 10 +-
gcc/modulo-sched.c | 71 +++---
gcc/sbitmap.c | 3 +-
gcc/testsuite/ChangeLog | 235 ++++++++++++++++++
gcc/testsuite/c-c++-common/goacc/cache-1.c | 18 +-
gcc/testsuite/c-c++-common/goacc/cache-2.c | 10 +-
gcc/testsuite/c-c++-common/goacc/cache-3-1.c | 116 +++++++++
gcc/testsuite/c-c++-common/goacc/cache-3-2.c | 50 ++++
gcc/testsuite/c-c++-common/goacc/data-clause-1.c | 115 +++++++++
gcc/testsuite/c-c++-common/goacc/data-clause-2.c | 49 ++++
gcc/testsuite/c-c++-common/gomp/map-1.c | 7 +-
gcc/testsuite/c-c++-common/gomp/map-2.c | 7 +-
gcc/testsuite/g++.dg/cpp0x/constexpr-empty14.C | 10 +
gcc/testsuite/g++.dg/cpp1z/constexpr-if12.C | 2 +-
gcc/testsuite/g++.dg/debug/localclass2.C | 24 ++
gcc/testsuite/g++.dg/goacc/cache-1.C | 15 ++
gcc/testsuite/g++.dg/goacc/cache-2.C | 64 +++++
gcc/testsuite/g++.dg/goacc/cache-3-1.C | 123 ++++++++++
gcc/testsuite/g++.dg/goacc/cache-3-2.C | 57 +++++
gcc/testsuite/g++.dg/goacc/data-clause-1.C | 122 ++++++++++
gcc/testsuite/g++.dg/goacc/data-clause-2.C | 56 +++++
gcc/testsuite/g++.dg/gomp/map-1.C | 119 +++++++++
gcc/testsuite/g++.dg/gomp/map-2.C | 54 +++++
gcc/testsuite/g++.dg/template/pr98297.C | 6 +
gcc/testsuite/g++.dg/template/virtual5.C | 31 +++
gcc/testsuite/gcc.c-torture/execute/pr97421-1.c | 23 ++
gcc/testsuite/gcc.c-torture/execute/pr97421-2.c | 18 ++
gcc/testsuite/gcc.c-torture/execute/pr97421-3.c | 22 ++
gcc/testsuite/gcc.dg/dfp/pr97439.c | 27 +++
gcc/testsuite/gcc.dg/pr95133.c | 14 ++
gcc/testsuite/gcc.dg/strncmp-2.c | 1 +
gcc/testsuite/gcc.dg/torture/pr94947-1.c | 23 ++
gcc/testsuite/gcc.dg/torture/pr94947-2.c | 7 +
gcc/testsuite/gcc.dg/vect/pr97236.c | 43 ++++
gcc/testsuite/gcc.dg/vect/tree-vect.h | 2 +-
gcc/testsuite/gcc.target/aarch64/pr97535.c | 16 ++
.../gcc.target/aarch64/return_address_sign_1.c | 8 +-
gcc/testsuite/gcc.target/aarch64/simd/pr97349.c | 12 +
.../gcc.target/aarch64/stack-protector-1.c | 89 +++++++
.../gcc.target/aarch64/stack-protector-2.c | 6 +
.../gcc.target/aarch64/symbol-range-tiny.c | 8 +-
gcc/testsuite/gcc.target/aarch64/symbol-range.c | 8 +-
.../gcc.target/aarch64/with-tune-config.c | 7 +
gcc/testsuite/gcc.target/aarch64/with-tune-march.c | 8 +
gcc/testsuite/gcc.target/aarch64/with-tune-mcpu.c | 8 +
gcc/testsuite/gcc.target/aarch64/with-tune-mtune.c | 7 +
gcc/testsuite/gcc.target/arm/pr91816.c | 64 +++++
gcc/testsuite/gcc.target/arm/pr97528.c | 28 +++
gcc/testsuite/gcc.target/i386/pr96793-1.c | 28 +++
gcc/testsuite/gcc.target/i386/pr96793-2.c | 28 +++
gcc/testsuite/gcc.target/i386/pr96793.c | 28 +++
gcc/testsuite/gcc.target/powerpc/pr64505.c | 265 ++++-----------------
gcc/testsuite/gfortran.dg/forall_19.f90 | 32 +++
gcc/testsuite/gfortran.dg/gomp/pr86470.f90 | 12 +
gcc/testsuite/gfortran.dg/matmul_20.f90 | 47 ++++
gcc/testsuite/gfortran.dg/pr98017.f90 | 14 ++
gcc/testsuite/gnat.dg/modular6.adb | 15 ++
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/tree-ssa-structalias.c | 14 +-
gcc/tree-vect-stmts.c | 20 +-
libgcc/ChangeLog | 26 ++
libgcc/config/aarch64/aarch64-unwind.h | 35 +--
libgcc/config/i386/gnu-unwind.h | 60 ++++-
libgcc/unwind-dw2.c | 34 +--
libgfortran/ChangeLog | 34 +++
libgfortran/generated/matmul_c10.c | 140 +++++------
libgfortran/generated/matmul_c16.c | 140 +++++------
libgfortran/generated/matmul_c4.c | 140 +++++------
libgfortran/generated/matmul_c8.c | 140 +++++------
libgfortran/generated/matmul_i1.c | 140 +++++------
libgfortran/generated/matmul_i16.c | 140 +++++------
libgfortran/generated/matmul_i2.c | 140 +++++------
libgfortran/generated/matmul_i4.c | 140 +++++------
libgfortran/generated/matmul_i8.c | 140 +++++------
libgfortran/generated/matmul_r10.c | 140 +++++------
libgfortran/generated/matmul_r16.c | 140 +++++------
libgfortran/generated/matmul_r4.c | 140 +++++------
libgfortran/generated/matmul_r8.c | 140 +++++------
libgfortran/generated/matmulavx128_c10.c | 56 ++---
libgfortran/generated/matmulavx128_c16.c | 56 ++---
libgfortran/generated/matmulavx128_c4.c | 56 ++---
libgfortran/generated/matmulavx128_c8.c | 56 ++---
libgfortran/generated/matmulavx128_i1.c | 56 ++---
libgfortran/generated/matmulavx128_i16.c | 56 ++---
libgfortran/generated/matmulavx128_i2.c | 56 ++---
libgfortran/generated/matmulavx128_i4.c | 56 ++---
libgfortran/generated/matmulavx128_i8.c | 56 ++---
libgfortran/generated/matmulavx128_r10.c | 56 ++---
libgfortran/generated/matmulavx128_r16.c | 56 ++---
libgfortran/generated/matmulavx128_r4.c | 56 ++---
libgfortran/generated/matmulavx128_r8.c | 56 ++---
libgfortran/m4/matmul_internal.m4 | 28 +--
libgomp/ChangeLog | 30 +++
libgomp/configure | 75 +++---
libgomp/plugin/configfrag.ac | 81 ++++---
libgomp/plugin/plugin-nvptx.c | 9 -
libgomp/testsuite/lib/libgomp.exp | 6 +
libgomp/testsuite/libgomp.oacc-c++/cache-1.C | 13 +
.../testsuite/libgomp.oacc-c-c++-common/cache-1.c | 12 +-
libobjc/ChangeLog | 8 +
libobjc/encoding.c | 3 +-
libstdc++-v3/ChangeLog | 101 ++++++++
libstdc++-v3/doc/html/manual/configure.html | 3 +-
libstdc++-v3/doc/xml/manual/configure.xml | 3 +-
libstdc++-v3/include/experimental/numeric | 38 +--
libstdc++-v3/include/std/mutex | 8 +-
libstdc++-v3/include/std/numeric | 83 +++----
libstdc++-v3/python/libstdcxx/v6/printers.py | 60 ++++-
libstdc++-v3/src/filesystem/dir.cc | 18 +-
libstdc++-v3/testsuite/26_numerics/gcd/92978.cc | 41 ++++
libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc | 10 +-
libstdc++-v3/testsuite/26_numerics/lcm/92978.cc | 28 +++
libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc | 10 +-
.../experimental/filesystem/iterators/97731.cc | 49 ++++
.../testsuite/experimental/numeric/92978.cc | 48 ++++
.../testsuite/ext/stdio_filebuf/char/79820.cc | 3 +-
.../testsuite/libstdc++-prettyprinters/compat.cc | 118 +++++++++
.../testsuite/libstdc++-prettyprinters/cxx11.cc | 20 ++
.../libstdc++-prettyprinters/filesystem-ts.cc | 39 +++
159 files changed, 5220 insertions(+), 1999 deletions(-)
diff --cc gcc/ChangeLog.ibm
index 716ccdd3642,00000000000..2ccab2cad6d
mode 100644,000000..100644
--- a/gcc/ChangeLog.ibm
+++ b/gcc/ChangeLog.ibm
@@@ -1,213 -1,0 +1,217 @@@
++2021-02-11 Peter Bergner <bergner@linux.ibm.com>
++
++ Merge up to releases/gcc-8 c7a6c4a68cb6fe38820273b5784a1ab6449cb6bd
++
+2020-10-09 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-8 03a38ad58202b465f90e1795ba8f52100c3dc4f4
+
+2019-11-25 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 278620.
+ * REVISION: Update subversion id.
+
+2019-08-13 Peter Bergner <bergner@linux.ibm.com>
+
+ * REVISION: Change format to "[ibm/gcc-X-branch revision rev#]"
+
+2019-03-04 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 269365.
+ * REVISION: Update subversion id.
+
+2019-02-22 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 269119.
+ * REVISION: Update subversion id.
+
+2019-01-16 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 268000.
+ * REVISION: Update subversion id.
+
+2018-12-20 Paul Clarke <pc@us.ibm.com>
+
+ Backport from trunk
+
+ 267261
+ 2018-12-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/tmmintrin.h (_mm_hadds_epi16): Vector lanes swapped.
+ (_mm_hsub_epi32): Likewise.
+ (_mm_shuffle_epi8): Fix reversed interpretation of parameters.
+ (_mm_shuffle_pi8): Likewise.
+ (_mm_addubs_pi16): Likewise.
+
+ 266895
+ 2018-12-07 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88408
+ * config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".
+
+ 266869
+ 2018-12-06 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88316
+ * config/rs6000/smmintrin.h: New file.
+ * config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.
+
+ 266868
+ 2018-12-03 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/88316
+ * config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
+ (_mm_unpacklo_pi8): Likewise.
+ (_mm_mulhi_pi16): Likewise.
+ (_mm_packs_pi16): Fix for big-endian. Use preferred API.
+ (_mm_packs_pi32): Likewise.
+ (_mm_packs_pu16): Likewise.
+ * config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
+ (_mm_cvtss_si64): Likewise.
+ (_mm_cvtpi32x2_ps): Likewise.
+ (_mm_shuffle_ps): Likewise.
+ (_mm_movemask_pi8): Likewise.
+ (_mm_mulhi_pu16): Likewise.
+ (_mm_sad_pu8): Likewise.
+ (_mm_sad_pu8): Likewise.
+ (_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
+ (_mm_cvtpu8_ps): Likewise.
+ (_mm_movemask_ps): Better #else case for big-endian (no functional
+ change).
+ (_mm_shuffle_pi16): Likewise.
+ * config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
+ Better #else case for big-endian (no functional change).
+ (_mm_movemask_epi8): Likewise.
+ (_mm_shufflehi_epi16): Likewise.
+ (_mm_shufflelo_epi16): Likewise.
+ (_mm_shuffle_epi32): Likewise.
+ (_mm_mul_epu32): Fix for big-endian.
+ (_mm_bsrli_si128): Likewise.
+ (_mm_cvtps_pd): Better #else case for big endian.
+ (_mm_mulhi_epi16): Likewise.
+ (_mm_mul_epu32): Likewise.
+ (_mm_slli_si128): Likewise.
+ (_mm_sll_epi16): Likewise.
+ (_mm_sll_epi32): Likewise.
+ (_mm_sra_epi16): Likewise.
+ (_mm_sra_epi32): Likewise.
+ (_mm_srl_epi16): Likewise.
+ (_mm_srl_epi32): Likewise.
+ (_mm_mulhi_epu16): Likewise.
+ (_mm_sad_epu8): Likewise.
+ * config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
+ (_mm_sub_ps): Likewise.
+ * config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
+ * gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
+ macros consistently (no functional changes).
+ (_mm_alignr_pi8): Likewise.
+
+ 265601
+ 2018-10-29 Paul A. Clarke <pc@us.ibm.com>
+
+ * gcc/config/rs6000/mmintrin.h (_mm_packs_pi16, _mm_packs_pi32,
+ _mm_packs_pu16, _mm_unpackhi_pi8, _mm_unpacklo_pi8, _mm_add_pi8,
+ _mm_add_pi16, _mm_add_pi32, _mm_sub_pi8, _mm_sub_pi16, _mm_sub_pi32,
+ _mm_cmpgt_pi8, _mm_cmpeq_pi16, _mm_cmpgt_pi16, _mm_cmpeq_pi32,
+ _mm_cmpgt_pi32, _mm_adds_pi8, _mm_adds_pi16, _mm_adds_pu8,
+ _mm_adds_pu16, _mm_subs_pi8, _mm_subs_pi16, _mm_subs_pu8,
+ _mm_subs_pu16, _mm_madd_pi16, _mm_mulhi_pi16, _mm_mullo_pi16,
+ _mm_sll_pi16, _mm_sra_pi16, _mm_srl_pi16, _mm_set1_pi16, _mm_set1_pi8):
+ Change 'vector' to '__vector'.
+ * gcc/config/rs6000/xmmintrin.h (_mm_cvtps_pi32, _mm_cvttps_pi32,
+ _mm_cvtps_pi16, _mm_cvtps_pi8, _mm_max_pi16, _mm_max_pu8, _mm_min_pi16,
+ _mm_min_pu8, _mm_mulhi_pu16, _mm_shuffle_pi16, _mm_avg_pu8,
+ _mm_avg_pu16): Likewise. And, whitespace corrections.
+
+ 265542
+ 2018-10-26 Paul A. Clarke <pc@us.ibm.com>
+ * config/rs6000/tmmintrin.h: New file.
+ * config.gcc (powerpc*-*-*): Add tmmintrin.h to
+ extra_headers.
+
+ 265535
+ 2018-10-25 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/mmintrin.h: Enable 32bit compilation.
+ * config/rs6000/xmmintrin.h: Likewise.
+
+ 265531
+ 2018-10-26 Paul A. Clarke <pc@us.ibm.com>
+ * config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian.
+
+2018-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config.gcc (powerpc*-*-*): Add pmmintrin.h to extra_headers.
+ * config/rs6000/pmmintrin.h: New file.
+
+2018-08-13 Peter Bergner <bergner@linux.ibm.com>
+
+ Backport from mainline
+ 2018-07-06 Peter Bergner <bergner@linux.ibm.com>
+
+ PR target/86324
+ * target.def (translate_mode_attribute): New hook.
+ * targhooks.h (default_translate_mode_attribute): Declare.
+ * targhooks.c (default_translate_mode_attribute): New function.
+ * doc/tm.texi.in (TARGET_TRANSLATE_MODE_ATTRIBUTE): New hook.
+ * doc/tm.texi: Regenerate.
+ * config/rs6000/rs6000.c (TARGET_TRANSLATE_MODE_ATTRIBUTE): Define.
+ (rs6000_translate_mode_attribute): New function.
+
+2018-07-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 263037.
+ * REVISION: Update subversion id.
+
+2018-07-10 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262542.
+ * REVISION: Update subversion id.
+
+2018-06-25 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262108.
+ * REVISION: Update subversion id.
+
+2018-06-25 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 262108.
+ * REVISION: Update subversion id.
+
+2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ Back port from trunk
+ 2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000.c (mode_supports_dq_form): Rename
+ mode_supports_vsx_dform_quad to mode_supports_dq_form.
+ (mode_supports_vsx_dform_quad): Likewise.
+ (mode_supports_vmx_dform): Move these functions to be next to the
+ other mode_supports functions.
+ (mode_supports_dq_form): Likewise.
+ (quad_address_p): Change calls of mode_supports_vsx_dform_quad to
+ mode_supports_dq_form.
+ (reg_offset_addressing_ok_p): Likewise.
+ (offsettable_ok_by_alignment): Likewise.
+ (rs6000_legitimate_offset_address_p): Likewise.
+ (legitimate_lo_sum_address_p): Likewise.
+ (rs6000_legitimize_address): Likewise.
+ (rs6000_legitimize_reload_address): Likewise.
+ (rs6000_secondary_reload_inner): Likewise.
+ (rs6000_preferred_reload_class): Likewise.
+ (rs6000_output_move_128bit): Likewise.
+
+2018-05-02 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 259857.
+ * REVISION: Update subversion id.
+
+2018-05-02 Michael Meissner <meissner@linux.ibm.com>
+
+ Merge up to 259857.
+ * REVISION: Update subversion id.
+
+2018-04-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Clone branch subversion id 259722
+
^ permalink raw reply [flat|nested] 2+ messages in thread
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