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* [gcc r11-6402] Rotate ChangeLog files - part 1 - add ChangeLog-2020.
@ 2021-01-01 16:28 Jakub Jelinek
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From: Jakub Jelinek @ 2021-01-01 16:28 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:6e9269627832853dc3bb91b141295563e89c0341
commit r11-6402-g6e9269627832853dc3bb91b141295563e89c0341
Author: Jakub Jelinek <jakub@redhat.com>
Date: Fri Jan 1 17:26:04 2021 +0100
Rotate ChangeLog files - part 1 - add ChangeLog-2020.
2021-01-01 Jakub Jelinek <jakub@redhat.com>
gcc/
* ChangeLog-2020: Rotate ChangeLog. New file.
gcc/ada/
* ChangeLog-2020: Rotate ChangeLog. New file.
gcc/cp/
* ChangeLog-2020: Rotate ChangeLog. New file.
gcc/d/
* ChangeLog-2020: Rotate ChangeLog. New file.
gcc/fortran/
* ChangeLog-2020: Rotate ChangeLog. New file.
gcc/testsuite/
* ChangeLog-2020: Rotate ChangeLog. New file.
libgfortran/
* ChangeLog-2020: Rotate ChangeLog. New file.
libstdc++-v3/
* ChangeLog-2020: Rotate ChangeLog. New file.
Diff:
---
gcc/ChangeLog-2020 | 39860 +++++++++++++++++++++++++++++++++++++++++
gcc/ada/ChangeLog-2020 | 13978 +++++++++++++++
gcc/cp/ChangeLog-2020 | 6596 +++++++
gcc/d/ChangeLog-2020 | 1030 ++
gcc/fortran/ChangeLog-2020 | 2382 +++
gcc/testsuite/ChangeLog-2020 | 29084 ++++++++++++++++++++++++++++++
libgfortran/ChangeLog-2020 | 391 +
libstdc++-v3/ChangeLog-2020 | 8776 +++++++++
8 files changed, 102097 insertions(+)
diff --git a/gcc/ChangeLog-2020 b/gcc/ChangeLog-2020
new file mode 100644
index 00000000000..6553720acad
--- /dev/null
+++ b/gcc/ChangeLog-2020
@@ -0,0 +1,39860 @@
+2020-12-31 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/98302
+ * tree-vect-patterns.c (vect_determine_precisions_from_users): Make
+ sure that the precision remains greater than the shift count.
+
+2020-12-31 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/94994
+ * tree-vect-data-refs.c (vect_vfa_align): Use dr_alignment.
+
+2020-12-31 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/98214
+ * genmodes.c (emit_insn_modes_h): Emit a definition of CONST_MODE_MASK.
+ (emit_mode_mask): Treat mode_mask_array as non-constant if adj_nunits.
+ (emit_mode_adjustments): Update GET_MODE_MASK when updating
+ GET_MODE_NUNITS.
+ * machmode.h (mode_mask_array): Use CONST_MODE_MASK.
+
+2020-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/94802
+ * match.pd (clz(X) == 0 -> (int)X < 0): New simplification.
+ (clz(X) == (prec-1) -> X == 1): Likewise.
+
+2020-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/94785
+ * match.pd ((-(X < 0) | 1) * X -> abs (X)): New simplification.
+ ((-(X < 0) | 1U) * X -> absu (X)): Likewise.
+
+2020-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98474
+ * wide-int.cc (wi::to_mpz): If wide_int has MSB set, but type
+ is unsigned and excess negative, append set bits after len until
+ precision.
+
+2020-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/98206
+ * fold-const.c: Include asan.h.
+ (fold_unary_loc): Don't optimize (ptr_type) (((ptr_type2) x) p+ y)
+ into ((ptr_type) x) p+ y if sanitizing alignment in GENERIC and
+ ptr_type points to type with higher alignment than ptr_type2.
+
+2020-12-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/56719
+ * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
+ x < C && y < C && z < C when C is a power of two constant into
+ (x | y | z) < C.
+
+2020-12-30 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md: Remove unnecessary clobbers
+ from combine splitters.
+
+2020-12-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98461
+ * config/i386/sse.md (<sse2_avx2>_pmovmskb): Add splitters
+ for pmovmskb of NOT vector.
+
+2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (maddsidi4_split): Skip macd gen, use mac insn
+ instead.
+ (macd): Update register letters.
+ (umaddsidi4_split): Skip macdu gen, use macu insn instead.
+ (macdu): Update register letters.
+
+2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (arc_secondary_reload): Flip if-condition
+ predicates.
+
+2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.h (REGNO_OK_FOR_BASE_P): Check if defined
+ reg_renumber.
+
+2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (prepare_move_operands): Use a temporary
+ registers when we have cached mem-to-uncached mem moves.
+
+2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (movdi_insn): Update pattern, no predicated
+ vadd2 usage.
+ (movdf_insn): Likewise.
+ * config/arc/simdext.md (movVEC_insn): Likewise.
+
+2020-12-29 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_gen_TWO52): Use REAL_MODE_FORMAT
+ to determine number of mantissa bits. Use real_2expN instead
+ of real_ldexp.
+ (ix86_expand_rint): Use copy_to_reg.
+ (ix86_expand_floorceildf_32): Ditto.
+ (ix86_expand_truncdf_32): Ditto.
+ (ix86_expand_rounddf_32): Ditto.
+ (ix86_expand_floorceil): Use copy_to_reg and int_mode_for_mode.
+ (ix86_expand_trunc): Ditto.
+ (ix86_expand_round): Ditto.
+
+2020-12-28 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/standards.texi (HSAIL): Remove section.
+
+2020-12-28 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/96793
+ * config/i386/i386-expand.c (ix86_expand_rint):
+ Remove the sign of the intermediate value for flag_rounding_math.
+
+2020-12-28 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_trunc): Use
+ existing temporary register to avoid a call to force_reg.
+
+2020-12-28 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386.md (optab): New code attr.
+ * config/i386/sse.md (<code>v32qiv32hi2): Rename to ...
+ (<optab>v32qiv32hi2) ... this.
+ (<code>v16qiv16hi2): Likewise.
+ (<code>v8qiv8hi2): Likewise.
+ (<code>v16qiv16si2): Likewise.
+ (<code>v8qiv8si2): Likewise.
+ (<code>v4qiv4si2): Likewise.
+ (<code>v16hiv16si2): Likewise.
+ (<code>v8hiv8si2): Likewise.
+ (<code>v4hiv4si2): Likewise.
+ (<code>v8qiv8di2): Likewise.
+ (<code>v4qiv4di2): Likewise.
+ (<code>v2qiv2di2): Likewise.
+ (<code>v8hiv8di2): Likewise.
+ (<code>v4hiv4di2): Likewise.
+ (<code>v2hiv2di2): Likewise.
+ (<code>v8siv8di2): Likewise.
+ (<code>v4siv4di2): Likewise.
+ (<code>v2siv2di2): Likewise.
+
+2020-12-27 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/analyzer.texi (Analyzer Internals): Find a new source for
+ the "A Memory Model for Static Analysis of C Programs" paper.
+
+2020-12-25 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/invoke.texi (C++ Module Mapper): Fix reference to libcody.
+
+2020-12-24 Iain Sandoe <iain@sandoe.co.uk>
+
+ * configure.ac: Add gxx-libcxx-include-dir handled
+ in the same way as the regular cxx header directory.
+ * Makefile.in: Regenerated.
+ * config.in: Likewise.
+ * configure: Likewise.
+ * cppdefault.c: Pick up libc++ headers if the option
+ is enabled.
+ * cppdefault.h (struct default_include): Amend comments
+ to reflect the extended use of the cplusplus field.
+ * incpath.c (add_standard_paths): Allow for multiple
+ c++ header include path variants.
+ * doc/invoke.texi: Document the -stdlib= option.
+
+2020-12-24 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/multilib-generator (arch_canonicalize): Call
+ decode for the subprocess return value.
+
+2020-12-23 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/98160
+ * builtins.c (warn_dealloc_offset): Avoid assuming calls are made
+ through declared functions and not pointers.
+
+2020-12-23 Martin Sebor <msebor@redhat.com>
+
+ PR c++/98413
+ * builtins.c (get_offset_range): Avoid non-integers/-pointers.
+
+2020-12-23 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-driver.c (validate_macosx_version_min): Allow
+ MACOSX_DEPLOYMENT_TARGET=11.
+ (darwin_default_min_version): Adjust warning spelling to avoid
+ an apostrophe.
+
+2020-12-23 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/96793
+ * config/i386/i386-expand.c (ix86_expand_truncdf_32):
+ Remove the sign of the intermediate value for flag_rounding_math.
+
+2020-12-22 Qian Jianhua <qianjh@cn.fujitsu.com>
+
+ * config/arm/types.md (define_attr "autodetect_type"): New.
+ (define_attr "type"): Subdivide alu_shift_imm.
+ * config/arm/common.md: New file.
+ * config/aarch64/predicates.md:Include common.md.
+ * config/arm/predicates.md:Include common.md.
+ * config/aarch64/aarch64.md (*add_<shift>_<mode>): Set autodetect_type.
+ (*add_<shift>_si_uxtw): Likewise.
+ (*sub_<shift>_<mode>): Likewise.
+ (*sub_<shift>_si_uxtw): Likewise.
+ (*neg_<shift>_<mode>2): Likewise.
+ (*neg_<shift>_si2_uxtw): Likewise.
+ * config/arm/arm.md (*addsi3_carryin_shift): Likewise.
+ (add_not_shift_cin): Likewise.
+ (*subsi3_carryin_shift): Likewise.
+ (*subsi3_carryin_shift_alt): Likewise.
+ (*rsbsi3_carryin_shift): Likewise.
+ (*rsbsi3_carryin_shift_alt): Likewise.
+ (*arm_shiftsi3): Likewise.
+ (*<arith_shift_insn>_multsi): Likewise.
+ (*<arith_shift_insn>_shiftsi): Likewise.
+ (subsi3_carryin): Set new type.
+ (*if_arith_move): Set new type.
+ (*if_move_arith): Set new type.
+ (define_attr "core_cycles"): Use new type.
+ * config/arm/arm-fixed.md (arm_ssatsihi_shift): Set autodetect_type.
+ * config/arm/thumb2.md (*orsi_not_shiftsi_si): Likewise.
+ (*thumb2_shiftsi3_short): Set new type.
+ * config/aarch64/falkor.md (falkor_alu_1_xyz): Use new type.
+ * config/aarch64/saphira.md (saphira_alu_1_xyz): Likewise.
+ * config/aarch64/thunderx.md (thunderx_arith_shift): Likewise.
+ * config/aarch64/thunderx2t99.md (thunderx2t99_alu_shift): Likewise.
+ * config/aarch64/thunderx3t110.md (thunderx3t110_alu_shift): Likewise.
+ (thunderx3t110_alu_shift1): Likewise.
+ * config/aarch64/tsv110.md (tsv110_alu_shift): Likewise.
+ * config/arm/arm1020e.md (1020alu_shift_op): Likewise.
+ * config/arm/arm1026ejs.md (alu_shift_op): Likewise.
+ * config/arm/arm1136jfs.md (11_alu_shift_op): Likewise.
+ * config/arm/arm926ejs.md (9_alu_op): Likewise.
+ * config/arm/cortex-a15.md (cortex_a15_alu_shift): Likewise.
+ * config/arm/cortex-a17.md (cortex_a17_alu_shiftimm): Likewise.
+ * config/arm/cortex-a5.md (cortex_a5_alu_shift): Likewise.
+ * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
+ * config/arm/cortex-a57.md (cortex_a57_alu_shift): Likewise.
+ * config/arm/cortex-a7.md (cortex_a7_alu_shift): Likewise.
+ * config/arm/cortex-a8.md (cortex_a8_alu_shift): Likewise.
+ * config/arm/cortex-a9.md (cortex_a9_dp_shift): Likewise.
+ * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
+ * config/arm/cortex-m7.md (cortex_m7_alu_shift): Likewise.
+ * config/arm/cortex-r4.md (cortex_r4_alu_shift): Likewise.
+ * config/arm/exynos-m1.md (exynos_m1_alu_shift): Likewise.
+ * config/arm/fa526.md (526_alu_shift_op): Likewise.
+ * config/arm/fa606te.md (606te_alu_op): Likewise.
+ * config/arm/fa626te.md (626te_alu_shift_op): Likewise.
+ * config/arm/fa726te.md (726te_alu_shift_op): Likewise.
+ * config/arm/fmp626.md (mp626_alu_shift_op): Likewise.
+ * config/arm/marvell-pj4.md (pj4_shift): Likewise.
+ (pj4_shift_conds): Likewise.
+ (pj4_alu_shift): Likewise.
+ (pj4_alu_shift_conds): Likewise.
+ * config/arm/xgene1.md (xgene1_alu): Likewise.
+ * config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
+
+2020-12-22 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/96793
+ * config/i386/i386-expand.c (ix86_expand_floorceil):
+ Remove the sign of the intermediate value for flag_rounding_math.
+ (ix86_expand_floorceildf_32): Ditto.
+
+2020-12-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (*one_cmpl<mode>2_1): Fix typo, change
+ alternative from 2 to 1 in attr isa.
+
+2020-12-22 Ian Lance Taylor <iant@golang.org>
+
+ * godump.c (go_output_typedef): If DECL_ORIGINAL_TYPE is NULL, use
+ TREE_TYPE.
+
+2020-12-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/98353
+ * gimplify.c (gimplify_init_ctor_eval_range): Gimplify value before
+ storing it into cref.
+
+2020-12-21 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-driver.c (darwin_find_version_from_kernel):
+ Compute the minor OS version from the minor kernel version.
+
+2020-12-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98407
+ * fold-const.c (native_encode_initializer): When handling flexible
+ array members, fix up computation of length for memset. Also remove
+ " - o" as o is always guaranteed to be 0 in this code path.
+
+2020-12-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/98383
+ * gimplify.c (struct gimplify_omp_ctx): Add in_for_exprs flag.
+ (gimple_add_tmp_var): For addressable temporaries appearing in
+ simd lb, b or incr expressions, don't add a private clause unless
+ it is seen also outside of those expressions in the simd body.
+ (omp_notice_variable): Likewise.
+ (gimplify_omp_for): Set and reset in_for_exprs around gimplification
+ of lb, b or incr expressions.
+
+2020-12-20 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/xtensa/xtensa.md (bswapsi2, bswapdi2): New patterns.
+
+2020-12-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR other/98400
+ * doc/invoke.texi (-mbackchain): Fix a typo - -mmo-backchain ->
+ -mno-backchain.
+
+2020-12-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/98366
+ * fold-const.c (native_encode_initializer): Don't try to
+ memset more than total_bytes with off == -1 even if len is large.
+ Handle flexible array member initializers if off == -1 and mask is
+ NULL.
+ * expr.c (convert_to_bytes): Remove.
+ (constant_byte_string): Use native_encode_initializer instead of
+ convert_to_bytes. Remove extraneous semicolon. Punt on various
+ corner-cases the APIs don't handle, like sizes > INT_MAX,
+ BITS_PER_UNIT != 8, CHAR_BIT != 8.
+
+2020-12-19 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ PR d/98067
+ * dwarf2out.c (dwarf2out_imported_module_or_decl_1): Handle
+ CONST_DECL only if is_fortran, is_ada, or is_dlang.
+
+2020-12-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98378
+ * gimple-ssa-store-merging.c (find_bswap_or_nop): Punt if CONSTRUCTOR
+ has no elements.
+
+2020-12-18 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (struct gimplify_omp_ctx): Add has_depend member.
+ (gimplify_scan_omp_clauses): Set it to true if OMP_CLAUSE_DEPEND
+ appears on OMP_TASK.
+ (gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses): Force
+ GOVD_WRITTEN on shared variables if task construct has depend clause.
+
+2020-12-18 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ PR target/98177
+ * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
+ get_same_sized_vectype to obtain index type.
+ (vectorizable_reduction): Likewise.
+
+2020-12-18 Kwok Cheung Yeung <kcy@codesourcery.com>
+
+ * langhooks-def.h (lhd_get_decl_init): New.
+ (lhd_finish_decl_inits): New.
+ (LANG_HOOKS_GET_DECL_INIT): New.
+ (LANG_HOOKS_OMP_FINISH_DECL_INITS): New.
+ (LANG_HOOKS_DECLS): Add LANG_HOOKS_GET_DECL_INIT and
+ LANG_HOOKS_OMP_FINISH_DECL_INITS.
+ * langhooks.c (lhd_omp_get_decl_init): New.
+ (lhd_omp_finish_decl_inits): New.
+ * langhooks.h (struct lang_hooks_for_decls): Add omp_get_decl_init
+ and omp_finish_decl_inits.
+ * omp-offload.c (omp_discover_declare_target_var_r): Use
+ get_decl_init langhook in place of DECL_INITIAL. Call
+ omp_finish_decl_inits langhook at end of function.
+
+2020-12-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use
+ aarch64_full_sve_mode and aarch64_vq_mode directly, instead of
+ going via aarch64_simd_container_mode.
+
+2020-12-18 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/iterators.md (rot): Add UNSPEC_VCMUL, UNSPEC_VCMUL90,
+ UNSPEC_VCMUL180, UNSPEC_VCMUL270.
+
+2020-12-17 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/arm/arm-cpus.in: Add Cortex-A78C core.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/98347
+ * rtl-ssa/access-utils.h (full_register): Use regno_reg_rtx
+ instead of reg_raw_mode.
+
+2020-12-17 H.J. Lu <hjl.tools@gmail.com>
+
+ * targhooks.h (default_estimated_poly_value): Updated.
+
+2020-12-17 Nathan Sidwell <nathan@acm.org>
+
+ * doc/invoke.texi (C++ Modules): Document lack of std
+ library header units.
+
+2020-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * target.h (enum poly_value_estimate_kind): Define.
+ (estimated_poly_value): Take an estimate kind argument.
+ * target.def (estimated_poly_value): Update definition for the
+ above.
+ * doc/tm.texi: Regenerate.
+ * targhooks.c (estimated_poly_value): Update prototype.
+ * tree-vect-loop.c (vect_better_loop_vinfo_p): Use min, max and
+ likely estimates of VF to pick between vinfos.
+ * config/aarch64/aarch64.c (aarch64_cmp_autovec_modes): Use
+ estimated_poly_value instead of aarch64_estimated_poly_value.
+ (aarch64_estimated_poly_value): Take a kind argument and handle
+ it.
+
+2020-12-17 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vcreate_p64): Remove call to
+ '__builtin_neon_vcreatedi'.
+
+2020-12-17 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97750
+ * range-op.cc (operator_cast::op1_range): Handle pointers better.
+
+2020-12-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * rtl-ssa.h: Include memmodel.h before tm_p.h.
+
+2020-12-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/98289
+ * shrink-wrap.c (can_get_prologue): Don't punt on EDGE_CROSSING
+ incoming edges.
+
+2020-12-17 Marius Hillenbrand <mhillen@linux.ibm.com>
+
+ * configure.ac: Change --enable-s390-excess-float-precision
+ default behavior for cross compiles with target headers.
+ * configure: Regenerate.
+ * doc/install.texi: Adjust documentation.
+
+2020-12-17 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.md (*ashlsi3_1, *ashlsi3_3x, *ashrsi3_3x)
+ (*lshrsi3_3x): New patterns.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * fwprop.c: Rewrite to use the RTL SSA framework.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * configure.ac: Add rtl-ssa to the list of dependence directories.
+ * configure: Regenerate.
+ * Makefile.in (rtl-ssa-warn): New variable.
+ (OBJS): Add the rtl-ssa object files.
+ * emit-rtl.h (rtl_data::ssa): New field.
+ * rtl-ssa.h: New file.
+ * system.h: Include <functional> when INCLUDE_FUNCTIONAL is defined.
+ * rtl-ssa/access-utils.h: Likewise.
+ * rtl-ssa/accesses.h: New file.
+ * rtl-ssa/accesses.cc: Likewise.
+ * rtl-ssa/blocks.h: New file.
+ * rtl-ssa/blocks.cc: Likewise.
+ * rtl-ssa/change-utils.h: Likewise.
+ * rtl-ssa/changes.h: New file.
+ * rtl-ssa/changes.cc: Likewise.
+ * rtl-ssa/functions.h: New file.
+ * rtl-ssa/functions.cc: Likewise.
+ * rtl-ssa/insn-utils.h: Likewise.
+ * rtl-ssa/insns.h: New file.
+ * rtl-ssa/insns.cc: Likewise.
+ * rtl-ssa/internals.inl: Likewise.
+ * rtl-ssa/is-a.inl: Likewise.
+ * rtl-ssa/member-fns.inl: Likewise.
+ * rtl-ssa/movement.h: Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/rtl.texi (RTL SSA): New node.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtl.h (simple_regno_set): Declare.
+ * rtlanal.c (simple_regno_set): New function.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtlanal.h: New file.
+ (MEM_REGNO): New constant.
+ (rtx_obj_flags): New namespace.
+ (rtx_obj_reference, rtx_properties): New classes.
+ (growing_rtx_properties, vec_rtx_properties_base): Likewise.
+ (vec_rtx_properties): New alias.
+ * rtlanal.c: Include it.
+ (rtx_properties::try_to_add_reg): New function.
+ (rtx_properties::try_to_add_dest): Likewise.
+ (rtx_properties::try_to_add_src): Likewise.
+ (rtx_properties::try_to_add_pattern): Likewise.
+ (rtx_properties::try_to_add_insn): Likewise.
+ (vec_rtx_properties_base::grow): Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * recog.h (insn_change_watermark): New class.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * recog.h (insn_propagation): New class.
+ * recog.c (insn_propagation::apply_to_mem_1): New function.
+ (insn_propagation::apply_to_rvalue_1): Likewise.
+ (insn_propagation::apply_to_lvalue_1): Likewise.
+ (insn_propagation::apply_to_pattern_1): Likewise.
+ (insn_propagation::apply_to_pattern): Likewise.
+ (insn_propagation::apply_to_rvalue): Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * recog.h (temporarily_undo_changes, redo_changes): Declare.
+ * recog.c (temporarily_undone_changes): New variable.
+ (validate_change_1, confirm_change_group): Check that it's zero.
+ (cancel_changes): Likewise.
+ (swap_change, temporarily_undo_changes): New functions.
+ (redo_changes): Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * recog.h (validate_change_xveclen): Declare.
+ * recog.c (change_t::old_len): New field.
+ (validate_change_1): Add a new_len parameter. Conditionally
+ replace the XVECLEN of an rtx, avoiding single-element PARALLELs.
+ (validate_change_xveclen): New function.
+ (cancel_changes): Undo changes made by validate_change_xveclen.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtl.h (simplify_context): New class.
+ (simplify_unary_operation, simplify_binary_operation): Use it.
+ (simplify_ternary_operation, simplify_relational_operation): Likewise.
+ (simplify_subreg, simplify_gen_unary, simplify_gen_binary): Likewise.
+ (simplify_gen_ternary, simplify_gen_relational): Likewise.
+ (simplify_gen_subreg, lowpart_subreg): Likewise.
+ * simplify-rtx.c (simplify_gen_binary): Turn into a member function
+ of simplify_context.
+ (simplify_gen_unary, simplify_gen_ternary, simplify_gen_relational)
+ (simplify_truncation, simplify_unary_operation): Likewise.
+ (simplify_unary_operation_1, simplify_byte_swapping_operation)
+ (simplify_associative_operation, simplify_logical_relational_operation)
+ (simplify_binary_operation, simplify_binary_operation_series)
+ (simplify_distributive_operation, simplify_plus_minus): Likewise.
+ (simplify_relational_operation, simplify_relational_operation_1)
+ (simplify_cond_clz_ctz, simplify_merge_mask): Likewise.
+ (simplify_ternary_operation, simplify_subreg, simplify_gen_subreg)
+ (lowpart_subreg): Likewise.
+ (simplify_binary_operation_1): Likewise. Test mem_depth when
+ deciding whether the ASHIFT or MULT form is canonical.
+ (simplify_merge_mask): Use simplify_context.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtl.h (register_asm_p): Declare.
+ * recog.c (verify_changes): Split out the test for whether
+ a hard register is a register asm to...
+ * rtlanal.c (register_asm_p): ...this new function.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * print-rtl.h (print_insn_with_notes): Declare.
+ * print-rtl.c (print_insn_with_notes): Make non-static
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * cfgrtl.h (update_cfg_for_uncondjump): Declare.
+ * combine.c (update_cfg_for_uncondjump): Move to...
+ * cfgrtl.c: ...here.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * vec.h (array_slice): New class.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * Makefile.in (OBJS): Add splay-tree-utils.o.
+ * system.h: Include <array> when INCLUDE_ARRAY is defined.
+ * selftest.h (splay_tree_cc_tests): Declare.
+ * selftest-run-tests.c (selftest::run_tests): Run splay_tree_cc_tests.
+ * splay-tree-utils.h: New file.
+ * splay-tree-utils.tcc: Likewise.
+ * splay-tree-utils.cc: Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * mux-utils.h: New file.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * obstack-utils.h: New file.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * iterator-utils.h (derived_iterator): New class.
+ (const_derived_container, wrapper_iterator): Likewise.
+ (list_iterator): Likewise.
+
+2020-12-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (global_reg_set): Declare.
+ * reginfo.c (global_reg_set): New variable.
+ (init_reg_sets_1, globalize_reg): Update it when globalizing
+ registers.
+
+2020-12-16 Piotr Kubaj <pkubaj@FreeBSD.org>
+
+ * config.gcc (powerpc*le-*-freebsd*): Add.
+ * configure.ac (powerpc*le-*-freebsd*): Ditto.
+ * configure: Regenerate.
+ * config/rs6000/freebsd64.h (ASM_SPEC_COMMON): Use ENDIAN_SELECT.
+ (DEFAULT_ASM_ENDIAN): Add little endian support.
+ (LINK_OS_FREEBSD_SPEC64): Ditto.
+
+2020-12-16 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.c (xtensa_emit_move_sequence): Try to
+ replace 'l32r' with 'movi' + 'slli' when optimizing for size.
+ * config/xtensa/xtensa.md (movdi): Split loading DI mode constant
+ into register pair into two loads of SI mode constants.
+
+2020-12-16 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
+ (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16,
+ __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
+ __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
+ __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
+ __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32,
+ __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin calls.
+ * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
+ vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
+ vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
+ (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
+ vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
+ * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90,
+ UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90,
+ UNSPEC_VCMUL180, UNSPEC_VCMUL270.
+ (VCMUL): New.
+ * config/arm/mve.md (mve_vcmulq_f<mode, mve_vcmulq_rot180_f<mode>,
+ mve_vcmulq_rot270_f<mode>, mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>,
+ mve_vcmlaq_rot180_f<mode>, mve_vcmlaq_rot270_f<mode>,
+ mve_vcmlaq_rot90_f<mode>): Removed.
+ (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>,
+ mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>):
+ New.
+ * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, UNSPEC_VCMUL,
+ UNSPEC_VCMUL180): New.
+ (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F,
+ VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed.
+
+2020-12-16 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8,
+ __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8,
+ __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16,
+ __arm_vcaddq_rot90_s16, __arm_vcaddq_rot270_s16,
+ __arm_vcaddq_rot90_u32, __arm_vcaddq_rot270_u32,
+ __arm_vcaddq_rot90_s32, __arm_vcaddq_rot270_s32,
+ __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16,
+ __arm_vcaddq_rot90_f32, __arm_vcaddq_rot270_f32): Update builtin calls.
+ * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u,
+ vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f):
+ Removed.
+ (vcaddq_rot90, vcaddq_rot270): New.
+ * config/arm/constraints.md (Dz): Include MVE.
+ * config/arm/iterators.md (mve_rot): New.
+ (supf): Remove VCADDQ_ROT270_S, VCADDQ_ROT270_U, VCADDQ_ROT90_S,
+ VCADDQ_ROT90_U.
+ (VCADDQ_ROT270, VCADDQ_ROT90): Removed.
+ * config/arm/mve.md (mve_vcaddq_rot270_<supf><mode,
+ mve_vcaddq_rot90_<supf><mode>, mve_vcaddq_rot270_f<mode>,
+ mve_vcaddq_rot90_f<mode>): Removed.
+ (mve_vcaddq<mve_rot><mode>, mve_vcaddq<mve_rot><mode>): New.
+ * config/arm/unspecs.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S,
+ VCADDQ_ROT270_U, VCADDQ_ROT90_U, VCADDQ_ROT270_F,
+ VCADDQ_ROT90_F): Removed.
+ * config/arm/vec-common.md (cadd<rot><mode>3): New.
+
+2020-12-16 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (cadd<rot><mode>3): New.
+ * config/aarch64/iterators.md (SVE2_INT_CADD_OP): New.
+ * config/aarch64/aarch64-sve.md (cadd<rot><mode>3): New.
+ * config/aarch64/aarch64-sve2.md (cadd<rot><mode>3): New.
+
+2020-12-16 Pat Haugen <pthaugen@linux.ibm.com>
+
+ * config/rs6000/mma.md (*movxo, mma_<vvi4i4i8>, mma_<avvi4i4i8>,
+ mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>,
+ mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>):
+ Remove explicit setting of length attribute.
+
+2020-12-16 Jakub Jelinek <jakub@redhat.com>
+
+ * varasm.c (default_elf_asm_named_section): Always force
+ section flags even for sections with SECTION_LINK_ORDER flag.
+
+2020-12-16 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98146
+ * defaults.h (SUPPORTS_SHF_GNU_RETAIN): New.
+ * varasm.c (get_section): Replace HAVE_GAS_SHF_GNU_RETAIN with
+ SUPPORTS_SHF_GNU_RETAIN.
+ (resolve_unique_section): Likewise.
+ (get_variable_section): Likewise.
+ (switch_to_section): Likewise.
+
+2020-12-16 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98146
+ * varasm.c (switch_to_section): Warn when a symbol without used
+ attribute and a symbol with used attribute are placed in the
+ section with the same name.
+
+2020-12-16 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98146
+ * output.h (switch_to_section): Add a tree argument, default to
+ nullptr.
+ * varasm.c (get_section): If the SECTION_RETAIN bit doesn't match,
+ return and switch to a new section later.
+ (assemble_start_function): Pass decl to switch_to_section.
+ (assemble_variable): Likewise.
+ (switch_to_section): If the SECTION_RETAIN bit doesn't match,
+ switch to a new section.
+
+2020-12-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96239
+ * gimple-ssa-store-merging.c (find_bswap_or_nop): Handle a vector
+ CONSTRUCTOR.
+ (bswap_replace): Likewise.
+
+2020-12-16 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Remove usage of Report.
+ * config/aarch64/aarch64.opt: Ditto.
+ * config/alpha/alpha.opt: Ditto.
+ * config/arc/arc.opt: Ditto.
+ * config/arm/arm.opt: Ditto.
+ * config/avr/avr.opt: Ditto.
+ * config/bfin/bfin.opt: Ditto.
+ * config/bpf/bpf.opt: Ditto.
+ * config/c6x/c6x.opt: Ditto.
+ * config/cr16/cr16.opt: Ditto.
+ * config/cris/cris.opt: Ditto.
+ * config/cris/elf.opt: Ditto.
+ * config/csky/csky.opt: Ditto.
+ * config/darwin.opt: Ditto.
+ * config/fr30/fr30.opt: Ditto.
+ * config/frv/frv.opt: Ditto.
+ * config/ft32/ft32.opt: Ditto.
+ * config/gcn/gcn.opt: Ditto.
+ * config/i386/cygming.opt: Ditto.
+ * config/i386/i386.opt: Ditto.
+ * config/ia64/ia64.opt: Ditto.
+ * config/ia64/ilp32.opt: Ditto.
+ * config/linux-android.opt: Ditto.
+ * config/linux.opt: Ditto.
+ * config/lm32/lm32.opt: Ditto.
+ * config/m32r/m32r.opt: Ditto.
+ * config/m68k/m68k.opt: Ditto.
+ * config/mcore/mcore.opt: Ditto.
+ * config/microblaze/microblaze.opt: Ditto.
+ * config/mips/mips.opt: Ditto.
+ * config/mmix/mmix.opt: Ditto.
+ * config/mn10300/mn10300.opt: Ditto.
+ * config/moxie/moxie.opt: Ditto.
+ * config/msp430/msp430.opt: Ditto.
+ * config/nds32/nds32.opt: Ditto.
+ * config/nios2/elf.opt: Ditto.
+ * config/nios2/nios2.opt: Ditto.
+ * config/nvptx/nvptx.opt: Ditto.
+ * config/pa/pa.opt: Ditto.
+ * config/pdp11/pdp11.opt: Ditto.
+ * config/pru/pru.opt: Ditto.
+ * config/riscv/riscv.opt: Ditto.
+ * config/rl78/rl78.opt: Ditto.
+ * config/rs6000/aix64.opt: Ditto.
+ * config/rs6000/linux64.opt: Ditto.
+ * config/rs6000/rs6000.opt: Ditto.
+ * config/rs6000/sysv4.opt: Ditto.
+ * config/rx/elf.opt: Ditto.
+ * config/rx/rx.opt: Ditto.
+ * config/s390/s390.opt: Ditto.
+ * config/s390/tpf.opt: Ditto.
+ * config/sh/sh.opt: Ditto.
+ * config/sol2.opt: Ditto.
+ * config/sparc/long-double-switch.opt: Ditto.
+ * config/sparc/sparc.opt: Ditto.
+ * config/tilegx/tilegx.opt: Ditto.
+ * config/tilepro/tilepro.opt: Ditto.
+ * config/v850/v850.opt: Ditto.
+ * config/visium/visium.opt: Ditto.
+ * config/vms/vms.opt: Ditto.
+ * config/vxworks.opt: Ditto.
+ * config/xtensa/xtensa.opt: Ditto.
+
+2020-12-16 Martin Liska <mliska@suse.cz>
+
+ * doc/options.texi: Remove Report keyword.
+ * opt-functions.awk: Print error when Report keyword
+ is used.
+ * optc-gen.awk: Do not handle Report keyword.
+ * opts.h (struct cl_option): Remove cl_report bitfield flag.
+
+2020-12-16 Martin Liska <mliska@suse.cz>
+
+ PR sanitizer/97868
+ * common.opt: Add new warning -Wtsan.
+ * doc/invoke.texi: Likewise.
+ * tsan.c (instrument_builtin_call): Warn users about unsupported
+ std::atomic_thread_fence.
+
+2020-12-16 Martin Liska <mliska@suse.cz>
+
+ PR rtl-optimization/98271
+ PR rtl-optimization/98276
+ PR tree-optimization/98279
+ * opts-common.c (set_option): Do not allow overflow for integer
+ arguments.
+
+2020-12-16 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR tree-optimization/98272
+ * tree-switch-conversion.c (bit_test_cluster::emit): When finding
+ out whether the entry test can be merged in the bit test, do the
+ computation using the type of the index expression.
+
+2020-12-16 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use
+ paradoxical subreg instead of zero_extend for QI/HI promotion.
+
+2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/66791
+ * config/arm/arm_neon.h: Replace calls to __builtin_vcgt* by
+ <, > operators in vclt and vcgt intrinsics respectively.
+ * config/arm/arm_neon_builtins.def: Remove entry for
+ vcgt and vcgtu.
+
+2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/66791
+ * config/arm/arm_neon.h: Replace calls to __builtin_vneg* by - operator
+ in vneg intrinsics.
+ * config/arm/arm_neon_builtins.def: Remove entry for vneg.
+
+2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/66791
+ * config/arm/arm_neon.h: Replace calls to __builtin_vcreate*
+ in vcreate intrinsics.
+ * config/arm/arm_neon_builtins.def: Remove entry for vcreate.
+
+2020-12-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96094
+ * match.pd (X / bool_range_Y -> X): New simplification.
+
+2020-12-15 Nathan Sidwell <nathan@acm.org>
+
+ * doc/cppopts.texi: Document new cpp opt.
+ * doc/invoke.texi: Add C++20 module option & documentation.
+
+2020-12-15 Nathan Sidwell <nathan@acm.org>
+
+ * Makefile.in (CODYINC, CODYLIB, CODYLIB_H): New. Use them.
+
+2020-12-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98274
+ * config/i386/i386-options.c (ix86_option_override_internal): Set
+ ix86_tune_string to "generic" even when it wasn't specified and
+ ix86_arch_string is "x86-64-v2", "x86-64-v3" or "x86-64-v4".
+ Remove useless {}s around a single statement.
+
+2020-12-15 Martin Liska <mliska@suse.cz>
+
+ PR lto/98275
+ * lto-wrapper.c: Do not use -j0 when we are unable to detect
+ number of cores.
+
+2020-12-15 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386-options.c (ix86_option_override_internal): Don't
+ error on -march=x86-64-v[234] with -m32 or -mabi=ms.
+ * config.gcc: Don't reject --with-arch=x86-64-v[234] or
+ --with-arch_32=x86-64-v[234].
+ * doc/invoke.texi (-march=x86-64-v[234]): Document what the option
+ does for other ABIs.
+
+2020-12-15 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/98273
+ * gcov.c (output_json_intermediate_file): Use stack of nested
+ functions for lines in a source file. Pop when a function ends.
+
+2020-12-15 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/invoke.texi (Instrumentation Options): Update link to
+ KernelAddressSanitizer.
+
+2020-12-15 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/xtensa/predicates.md (addsubx_operand): Change accepted
+ values from 2/4/8 to 1..3.
+ * config/xtensa/xtensa.md (*addx, *subx): Change RTL pattern
+ to use 'ashift' instead of 'mult'. Update operands[3] value.
+
+2020-12-14 Piotr Kubaj <pkubaj@FreeBSD.org>
+ Gerald Pfeifer <gerald@pfeifer.com>
+
+ * config/rs6000/freebsd64.h (PROCESSOR_DEFAULT): Update
+ to PROCESSOR_PPC7450.
+ (PROCESSOR_DEFAULT64): Update to PROCESSOR_POWER8.
+
+2020-12-14 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/98166
+ PR c++/57111
+ PR middle-end/98160
+ * builtins.c (check_access): Call tree_inlined_location
+ fndecl_alloc_p): Handle BUILT_IN_ALIGNED_ALLOC and
+ BUILT_IN_GOMP_ALLOC.
+ call_dealloc_p): Remove unused function.
+ (new_delete_mismatch_p): Call valid_new_delete_pair_p and rework.
+ (matching_alloc_calls_p): Handle built-in deallocation functions.
+ (warn_dealloc_offset): Corrct the handling of user-defined operators
+ delete.
+ (maybe_emit_free_warning): Avoid assuming expression is a decl.
+ Simplify.
+ * doc/extend.texi (attribute malloc): Update.
+ * tree-ssa-dce.c (valid_new_delete_pair_p): Factor code out into
+ valid_new_delete_pair_p in tree.c.
+ * tree.c (tree_inlined_location): Define new function.
+ (valid_new_delete_pair_p): Define.
+ * tree.h (tree_inlined_location): Declare.
+ (valid_new_delete_pair_p): Declare.
+
+2020-12-14 Sebastian Pop <spop@amazon.com>
+
+ * config.gcc (aarch64*-*-*): Remove --with-{cpu,arch,tune}-32 flags.
+
+2020-12-14 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config.gcc (aarch64*-*-*): Add --with-tune. Support --with-cpu=native.
+ * config/aarch64/aarch64.h (OPTION_DEFAULT_SPECS): Add --with-tune.
+
+2020-12-14 Martin Liska <mliska@suse.cz>
+
+ * gcov.c (output_json_intermediate_file): Update comments.
+
+2020-12-14 Tamar Christina <tamar.christina@arm.com>
+
+ PR middle-end/98264
+ * tree-vect-slp-patterns.c (linear_loads_p): Exclude TOP permute.
+
+2020-12-14 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/mve.md (mve_vnegq_f): Use 'neg' instead of unspec.
+ (mve_vnegq_s): Likewise.
+ * config/arm/neon.md (neg<mode>2): Rename into neon_neg<mode>2.
+ (<absneg_str><mode>2): Rename into neon_<absneg_str><mode>2.
+ (neon_v<absneg_str><mode>): Call gen_neon_<absneg_str><mode>2.
+ (vashr<mode>3): Call gen_neon_neg<mode>2.
+ (vlshr<mode>3): Call gen_neon_neg<mode>2.
+ (neon_vneg<mode>): Call gen_neon_neg<mode>2.
+ * config/arm/unspecs.md (VNEGQ_F, VNEGQ_S): Remove.
+ * config/arm/vec-common.md (neg<mode>2): New expander.
+
+2020-12-14 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (VDQNOTM2): New mode iterator.
+ (supf): Remove VMVNQ_S and VMVNQ_U.
+ (VMVNQ): Remove.
+ * config/arm/mve.md (mve_vmvnq_u<mode>): New entry for vmvn
+ instruction using expression not.
+ (mve_vmvnq_s<mode>): New expander.
+ * config/arm/neon.md (one_cmpl<mode>2): Renamed into
+ one_cmpl<mode>2_neon.
+ * config/arm/unspecs.md (VMVNQ_S, VMVNQ_U): Remove.
+ * config/arm/vec-common.md (one_cmpl<mode>2): New expander.
+
+2020-12-14 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (supf): Remove VBICQ_S and VBICQ_U.
+ (VBICQ): Remove.
+ * config/arm/mve.md (mve_vbicq_u<mode>): New entry for vbic
+ instruction using expression and not.
+ (mve_vbicq_s<mode>): New expander.
+ (mve_vbicq_f<mode>): Replace use of unspec by 'and not'.
+ * config/arm/unspecs.md (VBICQ_S, VBICQ_U, VBICQ_F): Remove.
+
+2020-12-14 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (supf): Remove VEORQ_S and VEORQ_U.
+ (VEORQ): Remove.
+ * config/arm/mve.md (mve_veorq_u<mode>): New entry for veor
+ instruction using expression xor.
+ (mve_veorq_s<mode>): New expander.
+ (mve_veorq_f<mode>): Use 'xor' code instead of unspec.
+ * config/arm/neon.md (xor<mode>3): Renamed into xor<mode>3_neon.
+ * config/arm/unspecs.md (VEORQ_S, VEORQ_U, VEORQ_F): Remove.
+ * config/arm/vec-common.md (xor<mode>3): New expander.
+
+2020-12-14 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A78C core.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2020-12-14 Nikhil Benesch <nikhil.benesch@gmail.com>
+
+ * godump.c (go_output_typedef): Suppress typedefs whose name
+ matches the tag of the underlying struct, union, or enum.
+ Output declarations for enums that do not appear in typedefs.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_output_int_move): Unify push operation
+ selection.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_output_int_move): Check the correct
+ operand for constant 0 push operation.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_expand_addsub_di_operands): Handle equal
+ input operands with subtraction.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_expand_addsub_di_operands): Handle the
+ addition or subtraction of 0.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_expand_addsub_di_operands): Remove
+ unused register allocation.
+
+2020-12-13 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (casesi): Use `gen_int_mode' rather than
+ `GEN_INT' for the immediate used for lower bound adjustment.
+
+2020-12-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98256
+ * tree-ssa-math-opts.c (match_uaddsub_overflow): For BIT_NOT_EXPR,
+ only handle a single use, and insert .ADD_OVERFLOW before the
+ comparison rather than after the BIT_NOT_EXPR. Return true iff
+ it is BIT_NOT_EXPR and it has been removed.
+ (math_opts_dom_walker::after_dom_children) <case BIT_NOT_EXPR>:
+ If match_uaddsub_overflow returned true, continue instead of break.
+
+2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ Revert:
+ 2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8,
+ , __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8,
+ __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, __arm_vcaddq_rot90_s16,
+ __arm_vcaddq_rot270_s16, __arm_vcaddq_rot90_u32,
+ __arm_vcaddq_rot270_u32, __arm_vcaddq_rot90_s32,
+ __arm_vcaddq_rot270_s32, __arm_vcmulq_rot90_f16,
+ __arm_vcmulq_rot270_f16, __arm_vcmulq_rot180_f16,
+ __arm_vcmulq_f16, __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16,
+ __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
+ __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcaddq_rot90_f32,
+ __arm_vcaddq_rot270_f32, __arm_vcmlaq_f16, __arm_vcmlaq_rot180_f16,
+ __arm_vcmlaq_rot270_f16, __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32,
+ __arm_vcmlaq_rot180_f32, __arm_vcmlaq_rot270_f32,
+ __arm_vcmlaq_rot90_f32): Update builtin calls.
+ * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u,
+ vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f,
+ vcmulq_f, vcmulq_rot90_f, vcmulq_rot180_f, vcmulq_rot270_f,
+ vcmlaq_f, vcmlaq_rot90_f, vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
+ (vcaddq_rot90, vcaddq_rot270, vcmulq, vcmulq_rot90, vcmulq_rot180,
+ vcmulq_rot270, vcmlaq, vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270):
+ New.
+ * config/arm/constraints.md (Dz): Include MVE.
+ * config/arm/iterators.md (mve_rotsplit1, mve_rotsplit2): New.
+ (rot): Add UNSPEC_VCMLS, UNSPEC_VCMUL and UNSPEC_VCMUL180.
+ (rot_op, rotsplit1, rotsplit2, fcmac1, VCMLA_OP, VCMUL_OP): New.
+ * config/arm/mve.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, VCADDQ_ROT270_U,
+ VCADDQ_ROT90_U, VCADDQ_ROT270_F, VCADDQ_ROT90_F, VCMULQ_F,
+ VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, VCMLAQ_F,
+ VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F, VCADDQ_ROT270_S,
+ VCADDQ_ROT270, VCADDQ_ROT90): Removed.
+ (mve_rot, VCMUL): New.
+ (mve_vcaddq_rot270_<supf><mode, mve_vcaddq_rot90_<supf><mode>,
+ mve_vcaddq_rot270_f<mode>, mve_vcaddq_rot90_f<mode>, mve_vcmulq_f<mode,
+ mve_vcmulq_rot180_f<mode>, mve_vcmulq_rot270_f<mode>,
+ mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, mve_vcmlaq_rot180_f<mode>,
+ mve_vcmlaq_rot270_f<mode>, mve_vcmlaq_rot90_f<mode>): Removed.
+ (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>,
+ mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>):
+ New.
+ (cmul<rot_op><mode>3): Exclude MVE types.
+ * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270): New.
+ * config/arm/vec-common.md (cadd<rot><mode>3, cmul<rot_op><mode>3,
+ arm_vcmla<rot><mode>, cml<fcmac1><rot_op><mode>4): New.
+ * config/arm/unspecs.md (UNSPEC_VCMUL, UNSPEC_VCMUL180, UNSPEC_VCMLS,
+ UNSPEC_VCMLS180): New.
+ * config/arm/neon.md (cmul<rot_op><mode>3): New.
+
+2020-12-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/92469
+ * varasm.c (eliminable_regno_p): New function.
+ (make_decl_rtl): Reject asm vars for frame and argp
+ if they are different from hard frame pointer.
+
+2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8,
+ , __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8,
+ __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, __arm_vcaddq_rot90_s16,
+ __arm_vcaddq_rot270_s16, __arm_vcaddq_rot90_u32,
+ __arm_vcaddq_rot270_u32, __arm_vcaddq_rot90_s32,
+ __arm_vcaddq_rot270_s32, __arm_vcmulq_rot90_f16,
+ __arm_vcmulq_rot270_f16, __arm_vcmulq_rot180_f16,
+ __arm_vcmulq_f16, __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16,
+ __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
+ __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcaddq_rot90_f32,
+ __arm_vcaddq_rot270_f32, __arm_vcmlaq_f16, __arm_vcmlaq_rot180_f16,
+ __arm_vcmlaq_rot270_f16, __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32,
+ __arm_vcmlaq_rot180_f32, __arm_vcmlaq_rot270_f32,
+ __arm_vcmlaq_rot90_f32): Update builtin calls.
+ * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u,
+ vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f,
+ vcmulq_f, vcmulq_rot90_f, vcmulq_rot180_f, vcmulq_rot270_f,
+ vcmlaq_f, vcmlaq_rot90_f, vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
+ (vcaddq_rot90, vcaddq_rot270, vcmulq, vcmulq_rot90, vcmulq_rot180,
+ vcmulq_rot270, vcmlaq, vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270):
+ New.
+ * config/arm/constraints.md (Dz): Include MVE.
+ * config/arm/iterators.md (mve_rotsplit1, mve_rotsplit2): New.
+ (rot): Add UNSPEC_VCMLS, UNSPEC_VCMUL and UNSPEC_VCMUL180.
+ (rot_op, rotsplit1, rotsplit2, fcmac1, VCMLA_OP, VCMUL_OP): New.
+ * config/arm/mve.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, VCADDQ_ROT270_U,
+ VCADDQ_ROT90_U, VCADDQ_ROT270_F, VCADDQ_ROT90_F, VCMULQ_F,
+ VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, VCMLAQ_F,
+ VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F, VCADDQ_ROT270_S,
+ VCADDQ_ROT270, VCADDQ_ROT90): Removed.
+ (mve_rot, VCMUL): New.
+ (mve_vcaddq_rot270_<supf><mode, mve_vcaddq_rot90_<supf><mode>,
+ mve_vcaddq_rot270_f<mode>, mve_vcaddq_rot90_f<mode>, mve_vcmulq_f<mode,
+ mve_vcmulq_rot180_f<mode>, mve_vcmulq_rot270_f<mode>,
+ mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, mve_vcmlaq_rot180_f<mode>,
+ mve_vcmlaq_rot270_f<mode>, mve_vcmlaq_rot90_f<mode>): Removed.
+ (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>,
+ mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>):
+ New.
+ (cmul<rot_op><mode>3): Exclude MVE types.
+ * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270): New.
+ * config/arm/vec-common.md (cadd<rot><mode>3, cmul<rot_op><mode>3,
+ arm_vcmla<rot><mode>, cml<fcmac1><rot_op><mode>4): New.
+ * config/arm/unspecs.md (UNSPEC_VCMUL, UNSPEC_VCMUL180, UNSPEC_VCMLS,
+ UNSPEC_VCMLS180): New.
+ * config/arm/neon.md (cmul<rot_op><mode>3): New.
+
+2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/arm.c (arm_preferred_simd_mode): Add E_HFmode.
+
+2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-slp-patterns.c: New file.
+ * Makefile.in: Add it.
+ * doc/passes.texi: Document it.
+ * internal-fn.def (COMPLEX_ADD_ROT90, COMPLEX_ADD_ROT270): New.
+ * optabs.def (cadd90_optab, cadd270_optab): New.
+ * doc/md.texi: Document them.
+ * tree-vect-loop.c (vect_analyze_loop_2): Add dissolve code.
+ * tree-vect-slp.c:
+ (vect_free_slp_instance, vect_create_new_slp_node): Export.
+ (vect_match_slp_patterns_2, vect_match_slp_patterns): New.
+ (vect_analyze_slp): Use it.
+ * tree-vectorizer.h (vect_free_slp_tree): Export.
+ (enum _complex_operation): Forward declare.
+ (class vect_pattern): New
+
+2020-12-13 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-patterns.c (vect_mark_pattern_stmts): Remove static inline.
+ * tree-vect-slp.c (vect_create_new_slp_node): Remove static and only
+ set smts if valid.
+ * tree-vectorizer.c (vec_info::add_pattern_stmt): New.
+ (vec_info::set_vinfo_for_stmt): Optionally enforce read-only.
+ * tree-vectorizer.h (struct _slp_tree): Use new types.
+ (lane_permutation_t, lane_permutation_t): New.
+ (vect_create_new_slp_node, vect_mark_pattern_stmts): New.
+
+2020-12-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * doc/sourcebuild.texi (Commands for use in dg-final, Scan the
+ assembly output, scan-assembler-symbol-section): Document.
+ (scan-symbol-section): Document.
+
+2020-12-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ * is-a.h (reinterpret_is_a_helper): New class.
+ (static_is_a_helper): Likewise.
+ (is_a_helper): Inherit from reinterpret_is_a_helper.
+ (is_a_helper<const T *>): New specialization.
+
+2020-12-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ * coretypes.h (iterator_range): Move to...
+ * iterator-utils.h: ...this new file.
+
+2020-12-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtlanal.c (noop_move_p): Don't check for REG_EQUAL notes.
+
+2020-12-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ * vec.h (vnull::operator vec<T, A, L>): Make const.
+
+2020-12-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96685
+ * match.pd (~(X - Y) -> ~X + Y): New optimization.
+ (~X + Y -> (Y - X) - 1): Likewise.
+
+2020-12-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96272
+ * tree-ssa-math-opts.c (uaddsub_overflow_check_p): Add OTHER argument.
+ Handle BIT_NOT_EXPR.
+ (match_uaddsub_overflow): Optimize unsigned a > ~b into
+ __imag__ .ADD_OVERFLOW (a, b).
+ (math_opts_dom_walker::after_dom_children): Call match_uaddsub_overflow
+ even for BIT_NOT_EXPR.
+
+2020-12-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/98183
+ * omp-low.c (lower_omp_target): Don't add OMP_RETURN for
+ data regions.
+ * omp-expand.c (expand_omp_target): Don't try to remove
+ OMP_RETURN for data regions.
+ (build_omp_regions_1, omp_make_gimple_edges): Don't expect
+ OMP_RETURN for data regions.
+
+2020-12-11 Nathan Sidwell <nathan@acm.org>
+
+ * gcc.c (cpp_unique_options): Add Mmodules, Mno-modules.
+ * tree-core.h (enum tree_index): Add TI_MODULE_HWM.
+
+2020-12-11 Jim Wilson <jimw@sifive.com>
+
+ * varasm.c (get_section): Add DECL_P check before DECL_PRESERVE_P.
+
+2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE
+ conditions.
+ * config/arm/vec-common.md (and<mode>3): Use
+ ARM_HAVE_<MODE>_ARITH.
+ (ior<mode>3): Likewise.
+
+2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (arc_active_insn): Ignore all non essential
+ instructions when getting the next active instruction.
+ (check_store_cacheline_hazard): Update.
+ (workaround_arc_anomaly): Remove obsolete cache hazard code.
+
+2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (arc_reorg): Avoid limm in BRcc.
+
+2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc-protos.h (arc_scheduling_not_expected): Remove
+ it.
+ (arc_sets_cc_p): Likewise.
+ (arc_need_delay): Likewise.
+ * config/arc/arc.c (arc_sets_cc_p): Likewise.
+ (arc_need_delay): Likewise.
+ (arc_scheduling_not_expected): Likewise.
+ * config/arc/arc.md: Convert adc/sbc patterns to simple
+ instruction definitions.
+
+2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (supf): Remove VORRQ_S and VORRQ_U.
+ (VORRQ): Remove.
+ * config/arm/mve.md (mve_vorrq_s<mode>): New entry for vorr
+ instruction using expression ior.
+ (mve_vorrq_u<mode>): New expander.
+ (mve_vorrq_f<mode>): Use ior code instead of unspec.
+ * config/arm/neon.md (ior<mode>3): Renamed into ior<mode>3_neon.
+ * config/arm/predicates.md (imm_for_neon_logic_operand): Enable
+ for MVE.
+ * config/arm/unspecs.md (VORRQ_S, VORRQ_U, VORRQ_F): Remove.
+ * config/arm/vec-common.md (ior<mode>3): New expander.
+
+2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (mpyd<su_optab>_arcv2hs): New template
+ pattern.
+ (*pmpyd<su_optab>_arcv2hs): Likewise.
+ (*pmpyd<su_optab>_imm_arcv2hs): Likewise.
+ (mpyd_arcv2hs): Moved into above template.
+ (mpyd_imm_arcv2hs): Moved into above template.
+ (mpydu_arcv2hs): Likewise.
+ (mpydu_imm_arcv2hs): Likewise.
+ (su_optab): New optab prefix for sign/zero-extending operations.
+
+2020-12-11 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98219
+ * config/i386/uintrintrin.h (__uintr_frame): Remove uirrv.
+
+2020-12-11 Andrea Corallo <andrea.corallo@arm.com>
+
+ * doc/sourcebuild.texi (arm_softfloat): Improve documentation.
+
+2020-12-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/98229
+ * optabs.c (expand_doubleword_mod): Canonicalize op1 and
+ 1 - INTVAL (op1) as word_mode constants when used in
+ word_mode arithmetics.
+
+2020-12-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98235
+ * tree-vect-slp.c (vect_build_slp_tree): Exchange npermutes
+ for limit. Decrement that for each cache miss and fail
+ discovery when it reaches zero.
+ (vect_build_slp_tree_2): Remove npermutes handling and
+ simply pass down limit.
+ (vect_build_slp_instance): Use pass down limit.
+ (vect_analyze_slp_instance): Likewise.
+ (vect_analyze_slp): Base the SLP discovery limit on
+ max_tree_size and pass it down.
+
+2020-12-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/98190
+ * expr.c (expand_assignment): If to_rtx is a promoted SUBREG,
+ ensure sign or zero extension either through use of store_expr
+ or by extending manually.
+
+2020-12-11 Andrea Corallo <andrea.corallo@arm.com>
+
+ PR rtl-optimization/97092
+ * ira-color.c (update_costs_from_allocno): Do not carry over mode
+ between subsequent iterations.
+
+2020-12-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/95582
+ * tree-vect-patterns.c (vect_recog_bool_pattern): Check
+ for VECT_SCALAR_BOOLEAN_TYPE_P, not just precision one.
+
+2020-12-11 Hongyu <hongyu.wang@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Move check for HRESET/AVX_VNNI/UINTR out of avx512_usable.
+
+2020-12-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/98212
+ * dojump.c (do_compare_rtx_and_jump): Change computation of
+ first_prob for and_them. Add comment explaining and_them case.
+
+2020-12-10 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/98174
+ * gimple-range-cache.cc (ranger_cache::ssa_range_in_bb): Only push
+ poor values to be examined if it isn't a pure global.
+ (ranger_cache::block_range): Don't process pure globals.
+ (ranger_cache::fill_block_cache): Adjust has_edge_range call.
+ * gimple-range-gori.cc (gori_map::all_outgoing): New bitmap.
+ (gori_map::gori_map): Allocate all_outgoing.
+ (gori_map::is_export_p): No specified BB returns global context.
+ (gori_map::calculate_gori): Accumulate each block into global.
+ (gori_compute::gori_compute): Preprocess each block for exports.
+ (gori_compute::has_edge_range_p): No edge returns global context.
+ * gimple-range-gori.h (has_edge_range_p): Provide default parameter.
+
+2020-12-10 Eric Botcazou <ebotcazou@adacore.com>
+
+ * dwarf2out.c (loc_list_from_tree_1) <PLACEHOLDER_EXPR>: Deal with
+ a nested context type
+
+2020-12-10 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * cfgexpand.c (expand_gimple_basic_block): Remove special handling
+ of debug_inline_entries without block info.
+ * tree-inline.c (remap_gimple_stmt): Drop debug_nonbind_markers when
+ the call statement has no block info.
+ (copy_debug_stmt): Remove debug_nonbind_markers when inlining
+ and the block info is mapped to NULL.
+ * tree-ssa-live.c (clear_unused_block_pointer): Remove
+ debug_nonbind_markers originating from removed inline functions.
+
+2020-12-10 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_assignment): Remove special
+ allowance of VECTOR_BOOLEAN_TYPE_P conversions.
+
+2020-12-10 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/iterators.md (supf): Remove VANDQ_S and VANDQ_U.
+ (VANQ): Remove.
+ (VDQ): Add TARGET_HAVE_MVE condition where relevant.
+ * config/arm/mve.md (mve_vandq_u<mode>): New entry for vand
+ instruction using expression 'and'.
+ (mve_vandq_s<mode>): New expander.
+ (mve_vaddq_n_f<mode>): Use 'and' code instead of unspec.
+ * config/arm/neon.md (and<mode>3): Rename into and<mode>3_neon.
+ * config/arm/predicates.md (imm_for_neon_inv_logic_operand):
+ Enable for MVE.
+ * config/arm/unspecs.md (VANDQ_S, VANDQ_U, VANDQ_F): Remove.
+ * config/arm/vec-common.md (and<mode>3): New expander.
+
+2020-12-10 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/98069
+ * tree-data-ref.c (compute_distributive_range): New function.
+ (nop_conversion_for_offset_p): Likewise.
+ (split_constant_offset): In the internal overload, treat integer
+ expressions as having an implicit cast to sizetype and express
+ them accordingly. Pass back the range of the original (uncast)
+ expression in a new range parameter.
+ (split_constant_offset_1): Likewise. Rework the handling of
+ conversions to account for the implicit sizetype casts.
+
+2020-12-10 Joel Hutton <joel.hutton@arm.com>
+
+ PR tree-optimization/97929
+ * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Add
+ WIDEN_PLUS/WIDEN_MINUS case.
+
+2020-12-10 Joel Hutton <joel.hutton@arm.com>
+
+ * tree-pretty-print.c (dump_generic_node): Add case for
+ VEC_WIDEN_(PLUS/MINUS)_(HI/LO)_EXPR and WIDEN_(PLUS/MINUS)_EXPR.
+
+2020-12-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98211
+ * tree-vect-stmts.c (vectorizable_assignment): Disallow
+ invalid conversions to bool vector types.
+
+2020-12-10 Alexandre Oliva <oliva@adacore.com>
+
+ * tree.c (build_common_builtin_nodes): Drop __builtin_ from
+ __clear_cache libname.
+
+2020-12-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/98212
+ * dojump.c (do_compare_rtx_and_jump): When splitting NE and backend
+ can do UNEQ, prefer splitting x != y into x unord y || !(x uneq y)
+ instead of into x unord y || x ltgt y.
+
+2020-12-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98169
+ * dojump.c (do_compare_rtx_and_jump): Don't split self-EQ/NE
+ comparisons, just use ORDERED or UNORDERED.
+
+2020-12-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/98205
+ * omp-expand.c (expand_omp_for_generic): Fix up broken_loop handling.
+
+2020-12-10 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Do
+ not mark the defs to occur in a pattern if it is the
+ pattern root and record the original stmt defs in that
+ case.
+
+2020-12-10 Simon Cook <simon.cook@embecosm.com>
+
+ * config/riscv/multilib-generator (arch_canonicalize): Invoke
+ python interpreter when calling arch-canonicalize script.
+
+2020-12-10 Nikhil Benesch <nikhil.benesch@gmail.com>
+
+ * godump.c (go_format_type): Don't consider whether a type has
+ been seen when determining whether to output a type by name.
+ Consider only the use_type_name parameter.
+ (go_output_typedef): When outputting a typedef, format the
+ declaration's original type, which contains the name of the
+ underlying type rather than the name of the typedef.
+
+2020-12-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR bootstrap/98188
+ * tree-ssa-phiopt.c (two_value_replacement): Don't special case
+ BOOLEAN_TYPEs for ranges, instead if get_range_info doesn't return
+ VR_RANGE, set min/max to wi::min/max_value.
+
+2020-12-09 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-option-extensions.def
+ (AARCH64_OPT_EXTENSION): New +pauth option in -march for AArch64.
+ * config/aarch64/aarch64.h (AARCH64_FL_PAUTH): New pauth extension bitmask.
+ (AARCH64_ISA_PUATH): New ISA bitmask for PAUTH.
+ (AARCH64_FL_FOR_ARCH8_3): Add PAUTH to Armv8.3-A.
+ (TARGET_PAUTH): New target mask to isolate PAUTH instructions.
+ * config/aarch64/aarch64.md (do_return): Condition set to TARGET_PAUTH.
+ * doc/invoke.texi: Update docs for +flagm and +pauth.
+
+2020-12-09 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.h (REG_ALLOC_ORDER): Remove
+
+2020-12-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98213
+ * tree-ssa-loop-im.c (sm_seq_valid_bb): Cache successfully
+ processed PHIs.
+ (hoist_memory_references): Adjust.
+
+2020-12-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-protos.h (cpu_vector_cost): Move simd
+ fields to...
+ (simd_vec_cost): ... Here. Define.
+ (advsimd_vec_cost): Define.
+ (sve_vec_cost): Define.
+ * config/aarch64/aarch64.c (generic_advsimd_vector_cost):
+ Define.
+ (generic_sve_vector_cost): Likewise.
+ (generic_vector_cost): Update.
+ (qdf24xx_advsimd_vector_cost): Define.
+ (qdf24xx_vector_cost): Update.
+ (thunderx_advsimd_vector_cost): Define.
+ (thunderx_vector_cost): Update.
+ (tsv110_advsimd_vector_cost): Define.
+ (tsv110_vector_cost): Likewise.
+ (cortexa57_advsimd_vector_cost): Define.
+ (cortexa57_vector_cost): Update.
+ (exynosm1_advsimd_vector_cost): Define.
+ (exynosm1_vector_cost): Update.
+ (xgene1_advsimd_vector_cost): Define.
+ (xgene1_vector_cost): Update.
+ (thunderx2t99_advsimd_vector_cost): Define.
+ (thunderx2t99_vector_cost): Update.
+ (thunderx3t110_advsimd_vector_cost): Define.
+ (thunderx3t110_vector_cost): Update.
+ (aarch64_builtin_vectorization_cost): Handle sve and advsimd
+ vector cost fields.
+
+2020-12-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/98199
+ * fold-const.c (native_encode_initializer): Fix handling bit-fields
+ when off > 0.
+
+2020-12-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/98193
+ * fold-const.c (native_encode_initializer): Set pos to field's
+ byte position if iterating over a field with missing initializer.
+
+2020-12-08 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/98182
+ * gimple-if-to-switch.cc (pass_if_to_switch::execute): Request
+ chain linkage through false edges only.
+
+2020-12-08 Nathan Sidwell <nathan@acm.org>
+
+ * tree.h (DECL_ALIGN_RAW): New.
+ (DECL_ALIGN): Use it.
+ (DECL_WARN_IF_NOT_ALIGN_RAW): New.
+ (DECL_WARN_IF_NOT_ALIGN): Use it.
+ (SET_DECL_WARN_IF_NOT_ALIGN): Likewise.
+
+2020-12-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/66791
+ * config/arm/arm_neon.h: Replace calls to __builtin_vmvn* by ~
+ in vmvn intrinsics.
+ * config/arm/arm_neon_builtins.def: Remove entry for vmvn.
+
+2020-12-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/94440
+ * config/i386/i386.opt (ix86_excess_precision,
+ ix86_unsafe_math_optimizations): New TargetVariables.
+ * config/i386/i386.h (X87_ENABLE_ARITH, X87_ENABLE_FLOAT): Use
+ ix86_unsafe_math_optimizations instead of
+ flag_unsafe_math_optimizations and ix86_excess_precision instead of
+ flag_excess_precision.
+ * config/i386/i386.c (ix86_excess_precision): Rename to ...
+ (ix86_get_excess_precision): ... this.
+ (TARGET_C_EXCESS_PRECISION): Define to ix86_get_excess_precision.
+ * config/i386/i386-options.c (ix86_valid_target_attribute_tree,
+ ix86_option_override_internal): Update ix86_unsafe_math_optimization
+ from flag_unsafe_math_optimizations and ix86_excess_precision
+ from flag_excess_precision when constructing target option nodes.
+ (ix86_set_current_function): If flag_unsafe_math_optimizations
+ or flag_excess_precision is different from the one recorded
+ in TARGET_OPTION_NODE, create a new target option node for the
+ current function and switch to that.
+
+2020-12-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98192
+ * tree-vect-slp.c (vect_build_slp_instance): Get scalar_stmts
+ by reference.
+
+2020-12-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98191
+ * tree-vect-slp.c (vect_slp_check_for_constructors): Do not
+ follow a non-SSA def chain.
+
+2020-12-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97559
+ * tree-ssa-sink.c (statement_sink_location): Never ignore
+ PHIs on sink paths in irreducible regions.
+
+2020-12-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/97872
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Try to fold
+ x CMP y ? -1 : 0 to x CMP y.
+
+2020-12-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98180
+ * tree-vect-slp.c (vect_slp_check_for_constructors): Check the
+ first inserted value has a def.
+
+2020-12-08 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR tree-optimization/96344
+ * tree-switch-conversion.c (bit_test_cluster::emit): Compute the
+ range only if an entry test is necessary. Merge the entry test in
+ the bit test when possible. Use PREC local variable consistently.
+ When there is only one test, do a single gimplification at the end.
+
+2020-12-08 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/98152
+ * config.gcc (riscv*-*-*): Checking python, python3 or python2
+ is available, and skip doing with_arch canonicalize if no python
+ available.
+
+2020-12-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98147
+ * builtins.c (default_emit_call_builtin___clear_cache): Call
+ convert_memory_address to ptr_mode on both begin and end.
+
+2020-12-07 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * ipa-param-manipulation.c
+ (ipa_param_body_adjustments::modify_call_stmt): Set location info.
+
+2020-12-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * doc/extend.texi (used function attribute): Document saving
+ the declaration from linker garbage collection.
+ (used variable attribute): Likewise.
+
+2020-12-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98113
+ * tree-vectorizer.h (struct slp_root): New.
+ (_bb_vec_info::roots): New member.
+ * tree-vect-slp.c (vect_analyze_slp): Also walk BB info
+ roots.
+ (_bb_vec_info::_bb_vec_info): Adjust.
+ (_bb_vec_info::~_bb_vec_info): Likewise.
+ (vld_cmp): New.
+ (vect_slp_is_lane_insert): Likewise.
+ (vect_slp_check_for_constructors): Match a series of
+ BIT_INSERT_EXPRs as vector constructor.
+ (vect_slp_analyze_bb_1): Continue if BB info roots is
+ not empty.
+ (vect_slp_analyze_bb_1): Mark the whole BIT_INSERT_EXPR root
+ sequence as pure_slp.
+
+2020-12-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98117
+ * tree-vect-loop-manip.c (vect_gen_vector_loop_niters):
+ Properly handle degenerate niter when setting the vector
+ loop IV range.
+
+2020-12-07 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/s390.c (s390_emit_stack_probe): Change Pmode to
+ word_mode.
+
+2020-12-07 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/97816
+ * ipa-cp.c (safe_add): Removed.
+ (good_cloning_opportunity_p): Remove special handling of INT_MAX.
+ (value_topo_info<valtype>::propagate_effects): Take care not to
+ propagate from size one value to another through more sources. Scale
+ propagated times with edge frequencies. Include local time and size
+ in propagates ones here. Take care not to overflow size.
+ (decide_about_value): Do not add local and propagated effects when
+ passing them to good_cloning_opportunity_p.
+
+2020-12-07 Matthias Klose <doko@ubuntu.com>
+
+ * genextract.c (print_header): Undefine ENABLE_RTL_CHECKING
+ and ENABLE_RTL_FLAG_CHECKING.
+
+2020-12-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98137
+ * tree-data-ref.c (split_constant_offset_1): Use
+ determine_value_range instead of get_range_info to handle
+ arbitrary expressions.
+
+2020-12-06 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98162
+ * doc/extend.texi: Remove -mcet.
+
+2020-12-06 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98161
+ * config/i386/i386-features.c (pseudo_reg_set): Check mode of
+ pseudo register push.
+
+2020-12-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96232
+ * tree-ssa-phiopt.c (two_value_replacement): Optimize even boolean lhs
+ cases as long as arg0 has wider precision and conditional_replacement
+ doesn't handle that case.
+ (tree_ssa_phiopt_worker): Don't call two_value_replacement during
+ early phiopt.
+
+2020-12-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96232
+ * match.pd (-(type)!A -> (type)A - 1): New optimization.
+
+2020-12-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+ David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/xcoff.h (ASM_OUTPUT_DEF): Reference macro arguments.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ PR target/95294
+ * config/vax/elf.h (REGISTER_NAMES): Append `%psl'.
+ * config/vax/vax-modes.def (CCN, CCNZ, CCZ): New modes.
+ * config/vax/vax-protos.h (vax_select_cc_mode): New prototype.
+ (vax_maybe_split_dimode_move): Likewise.
+ (vax_notice_update_cc): Remove prototype.
+ * config/vax/vax.c (TARGET_FLAGS_REGNUM): New macro.
+ (TARGET_CC_MODES_COMPATIBLE): Likewise.
+ (TARGET_MD_ASM_ADJUST): Likewise.
+ (vax_select_cc_mode): New function
+ (vax_cc_modes_compatible): Likewise.
+ (vax_md_asm_adjust): Likewise.
+ (vax_notice_update_cc): Remove function.
+ (vax_output_int_move): Factor out code checking if a DImode move
+ may have to be split...
+ (vax_maybe_split_dimode_move): ... into this new function.
+ * config/vax/vax.h (FIRST_PSEUDO_REGISTER): Bump up.
+ (FIXED_REGISTERS): Append an entry for PSL.
+ (CALL_USED_REGISTERS): Likewise.
+ (NOTICE_UPDATE_CC, OUTPUT_JUMP): Remove macros.
+ (SELECT_CC_MODE): New macro.
+ (REGISTER_NAMES): Append `psl'.
+ * config/vax/predicates.md (const_zero_operand)
+ (vax_cc_comparison_operator, vax_ccn_comparison_operator)
+ (vax_ccnz_comparison_operator, vax_ccz_comparison_operator):
+ New predicates.
+ * config/vax/builtins.md: Rewrite for MODE_CC representation.
+ * config/vax/vax.md: Likewise.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/elf.h (VAX_CC1_SPEC, VAX_CC1PLUS_SPEC): New macros.
+ * config/vax/netbsd-elf.h (CC1_SPEC): Use VAX_CC1_SPEC rather
+ than VAX_CC1_AND_CC1PLUS_SPEC.
+ (CC1PLUS_SPEC): Use VAX_CC1PLUS_SPEC rather than
+ VAX_CC1_AND_CC1PLUS_SPEC.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/pdp11/pdp11.md (fcc_cc, fcc_ccnz): Use
+ `const_double_zero' to express double zero constant.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * read-rtl.c (rtx_reader::read_rtx_code): Handle syntactic
+ `const_double_zero' rtx.
+ * doc/rtl.texi (Constant Expression Types): Document it.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (divmoddisi4, *amulsi4): Make the comment
+ notation consistent with the rest of the file.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (movti): Fix output predicate. Emit `movo'
+ rather than `movh'.
+ (divmoddisi4): Fix output predicates, correct RTL.
+ (*amulsi4): Name insn. Fix output predicate.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (mulsidi3): Fix the multiplicand predicates.
+ (*maddsidi4, *maddsidi4_const): Likewise. Name insns.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (*cmpv_2): Name insn.
+ (*cmpv, *cmpzv, *cmpzv_2): Likewise. Fix location predicate and
+ constraint.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (extv): Rename insn to...
+ (*extv): ... this.
+ (extv): New expander.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (*insv_aligned, *extzv_aligned)
+ (*extv_aligned): Also make sure the memory address of a bit-field
+ location can be adjusted in the PIC mode.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (*insv_aligned, *extzv_aligned)
+ (*extv_aligned): Reject register bit-field locations that are not
+ aligned to the least significant bit; update output statement
+ accordingly.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (*insv_aligned, *extzv_aligned)
+ (*extv_aligned, *extv_non_const, *extzv_non_const): Name insns.
+ Fix location predicate.
+ (*extzv): Name insn.
+ (*insv): Likewise. Fix location constraint.
+ (*insv_2): Likewise, and the predicate.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md (cpymemhi1): Rename insn to...
+ (movmemhi1): ... this.
+ (cpymemhi): Update accordingly. Remove constraints.
+ (movmemhi): New expander.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md: Add a peephole2 for QImode and HImode
+ `ctz' operations.
+ (any_extend): New code iterator.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md (width): New mode attribute.
+ (ffssi2): Rework expander into...
+ (ffs<mode>2): ... this.
+ (ctzsi2): Rework insn into...
+ (ctz<mode>2): ... this.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md (ffssi2_internal): Rename insn to...
+ (ctzsi2): ... this. Update the RTL operation.
+ (ffssi2): Update accordingly.
+ * config/vax/vax.c (vax_notice_update_cc): Handle CTZ.
+ * config/vax/vax.h (CTZ_DEFINED_VALUE_AT_ZERO): New macro.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.md: Include `builtins.md'.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/predicates.md (volatile_mem_operand)
+ (any_memory_operand): New predicates.
+ * config/vax/builtins.md (VUNSPEC_UNLOCK): Remove constant.
+ (sync_lock_test_and_set<mode>): Remove `set' and `unspec'
+ operations, match operands only. Reformat.
+ (sync_lock_release<mode>): Likewise. Remove cruft.
+ (jbb<ccss>i<mode>): Wrap into `unspec_volatile', use
+ `any_memory_operand' predicate.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md (bit): New int iterator.
+ (ccss): New int attribute.
+ (jbbssi<mode>, jbbcci<mode>): Fold insns into...
+ (jbb<ccss>i<mode>): ... this.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md (bb_mem): New mode attribute.
+ (jbbssiqi, jbbssihi, jbbssisi): Fold insns into...
+ (jbbssi<mode>): ... this.
+ (jbbcciqi, jbbccihi, jbbccisi): Likewise...
+ (jbbcci<mode>): ... this.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * jump.c (pc_set): Also accept a jump wrapped in UNSPEC or
+ UNSPEC_VOLATILE.
+ (any_uncondjump_p, any_condjump_p): Update comment accordingly.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * loop-doloop.c (add_test): Only remove the jump if `onlyjump_p'.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * cfgrtl.c (rtl_block_empty_p): Return false if `!onlyjump_p'
+ too.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * sel-sched-ir.c (maybe_tidy_empty_bb): Only try to remove a
+ conditional jump if `onlyjump_p'.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * loop-iv.c (simplify_using_initial_values): Only process jumps
+ that match `onlyjump_p'.
+ (check_simple_exit): Likewise.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * ifcvt.c (dead_or_predicable) [!IFCVT_MODIFY_TESTS]: Bail out
+ if `!onlyjump_p'.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * read-rtl.c: Add a page-feed separator at the start of iterator
+ code.
+ (struct iterator_group): Change the return type to HOST_WIDE_INT
+ for the `find_builtin' member. Likewise the second parameter
+ type for the `apply_iterator' member.
+ (atoll) [!HAVE_ATOQ]: Reorder.
+ (find_mode, find_code): Change the return type to HOST_WIDE_INT.
+ (apply_mode_iterator, apply_code_iterator)
+ (apply_subst_iterator): Change the second parameter type to
+ HOST_WIDE_INT.
+ (find_int): Handle input suitable for HOST_WIDE_INT output.
+ (apply_int_iterator): Rewrite in terms of explicit format
+ interpretation.
+ (rtx_reader::read_rtx_operand) <'w'>: Fold into...
+ <'i', 'n', 'p'>: ... this.
+ * doc/md.texi (Int Iterators): Document 'w' rtx format support.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/builtins.md (ffssi2): Make preparation statements
+ actually buildable.
+ (ffssi2_internal): Fix input constraints; make the RTL pattern
+ match reality for `cc0'.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_address_cost): Express the cost in terms
+ of COSTS_N_INSNS.
+ (vax_rtx_costs): Likewise.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/constraints.md (A): New constraint.
+ * config/vax/predicates.md (external_symbolic_operand)
+ (external_const_operand): Remove predicates.
+ (local_symbolic_operand): Rename to...
+ (pic_symbolic_operand): ... this, and rework.
+ (external_memory_operand): Rename to...
+ (non_pic_external_memory_operand): ... this, and rework.
+ (illegal_blk_memory_operand, illegal_addsub_di_memory_operand):
+ Update accordingly.
+ * config/vax/vax-protos.h (vax_acceptable_pic_operand_p): New
+ prototype.
+ * config/vax/vax.c (vax_acceptable_pic_operand_p): New function.
+ (vax_output_int_add): Update according to predicate rework.
+ * config/vax/vax.h (LEGITIMATE_PIC_OPERAND_P): New macro.
+ * config/vax/vax.md (pushlclsymreg, pushextsymreg): Fold
+ together, and rename to...
+ (*pushsymreg): ... this. Use the `pic_symbolic_operand'
+ predicate and the `A' constraint for the displacement operand.
+ (movlclsymreg, movextsymreg): Fold together, and rename to...
+ (*movsymreg): ... this. Use the `pic_symbolic_operand'
+ predicate and the `A' constraint for the displacement operand.
+ (pushextsym, pushlclsym): Fold together, and rename to...
+ (*pushsym): ... this. Use the `pic_symbolic_operand' predicate
+ and the `A' constraint for the displacement operand.
+ (movextsym, movlclsym): Fold together, and rename to...
+ (*movsym): ... this. Use the `pic_symbolic_operand' predicate
+ and the `A' constraint for the displacement operand.
+
+2020-12-05 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (print_operand): Replace `c' and `C' with
+ `k' and `K' respectively.
+ * config/vax/vax.md (*branch, *branch_reversed): Update
+ accordingly.
+
+2020-12-05 Matt Thomas <matt@3am-software.com>
+ Maciej W. Rozycki <macro@linux-mips.org>
+
+ PR target/58901
+ * reload.c (push_reload): Also reload the inner expression of a
+ SUBREG for pseudos associated with a mode-dependent memory
+ reference.
+ (find_reloads): Force a reload likewise.
+
+2020-12-05 Roman Zhuykov <zhroma@ispras.ru>
+
+ PR rtl-optimization/97421
+ * modulo-sched.c (generate_prolog_epilog): Remove forward
+ declaration, adjust last argument name and type.
+ (const_iteration_count): Add bool pointer parameter to return
+ whether count register is read in pre-header after its
+ initialization.
+ (sms_schedule): Fix count register initialization adjustment
+ procedure according to what const_iteration_count said.
+
+2020-12-05 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR target/97865
+ * configure: Regenerate.
+
+2020-12-05 Venkataramanan Kumar <Venkataramanan.Kumar@amd.com>
+ Sharavan Kumar <Shravan.Kumar@amd.com>
+
+ * common/config/i386/cpuinfo.h (get_amd_cpu) recognize znver3.
+ * common/config/i386/i386-common.c (processor_names): Add
+ znver3.
+ (processor_alias_table): Add znver3 and AMDFAM19H entry.
+ * common/config/i386/i386-cpuinfo.h (processor_types): Add
+ AMDFAM19H.
+ (processor_subtypes): AMDFAM19H_ZNVER3.
+ * config.gcc (i[34567]86-*-linux* | ...): Likewise.
+ * config/i386/driver-i386.c: (host_detect_local_cpu): Let
+ -march=native recognize znver3 processors.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Add
+ znver3.
+ * config/i386/i386-options.c (m_znver3): New definition.
+ (m_ZNVER): Include m_znver3.
+ (processor_cost_table): Add znver3.
+ * config/i386/i386.c (ix86_reassociation_width): Likewise.
+ * config/i386/i386.h (TARGET_znver3): New definition.
+ (enum processor_type): Add PROCESSOR_ZNVER3.
+ * config/i386/i386.md (define_attr "cpu"): Add znver3.
+ * config/i386/x86-tune-sched.c: (ix86_issue_rate): Likewise.
+ (ix86_adjust_cost): Likewise.
+ * config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS:
+ Likewise.
+ * config/i386/znver1.md: Add new reservations for znver3.
+ * doc/extend.texi: Add details about znver3.
+ * doc/invoke.texi: Likewise.
+
+2020-12-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/96226
+ * config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask,
+ splitter after *<rotate_insn><mode>3_mask_1): Drop the masking from
+ the patterns to split into.
+
+2020-12-04 Jason Merrill <jason@redhat.com>
+
+ * vec.h (begin, end): Add overloads for vec*.
+ * tree.c (build_constructor_from_vec): Remove *.
+
+2020-12-04 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Change PTR_SIZE to POINTER_SIZE_UNITS.
+
+2020-12-04 Hans-Peter Nilsson <hp@axis.com>
+ Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/94600
+ * doc/implement-c.texi (Qualifiers implementation): Add blurb
+ about access to the whole of a volatile aggregate object, only for
+ same-size as a scalar object.
+
+2020-12-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/98130
+ * gimple.c (gimple_call_fnspec): Only return ".co " for replaceable
+ operator delete or ".mC" for replaceable operator new called from
+ new/delete.
+
+2020-12-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/96226
+ * config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask,
+ splitter after *<rotate_insn><mode>3_mask_1): New combine splitters.
+
+2020-12-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/93121
+ * fold-const.c (native_encode_initializer): Use build_zero_cst
+ instead of build_constructor.
+
+2020-12-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98100
+ * cfgexpand.c (expand_gimple_basic_block): For vars with
+ vector type, use TYPE_MODE rather than DECL_MODE.
+
+2020-12-04 Jakub Jelinek <jakub@redhat.com>
+
+ * common.opt (-gdwarf32, -gdwarf64): New options.
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Default
+ dwarf_offset_size to 8 if not overridden from the command line.
+ * dwarf2out.c: Change all occurrences of DWARF_OFFSET_SIZE to
+ dwarf_offset_size.
+ * doc/invoke.texi (-gdwarf32, -gdwarf64): Document.
+
+2020-12-04 Martin Liska <mliska@suse.cz>
+
+ * doc/tm.texi: Change argument of the record_gcc_switches
+ hook and remove SWITCH_TYPE_* enum values.
+ * dwarf2out.c (gen_producer_string): Move to opts.c and remove
+ handling of the dwarf_record_gcc_switches option.
+ (dwarf2out_early_finish): Use moved gen_producer_string
+ function.
+ * opts.c (gen_producer_string): New.
+ * opts.h (gen_producer_string): New.
+ * target.def: Change type of record_gcc_switches.
+ * target.h (enum print_switch_type): Remove.
+ (elf_record_gcc_switches): Change first argument.
+ * toplev.c (MAX_LINE): Remove.
+ (print_to_asm_out_file): Likewise.
+ (print_to_stderr): Likewise.
+ (print_single_switch): Likewise.
+ (print_switch_values): Likewise.
+ (init_asm_output): Use new gen_producer_string function.
+ (process_options): Likewise.
+ * varasm.c (elf_record_gcc_switches): Just save the string argument
+ to the ELF container.
+
+2020-12-04 Eric Botcazou <ebotcazou@adacore.com>
+
+ * ipa-sra.c (verify_access_tree_1): Relax assertion on the size.
+
+2020-12-04 Martin Liska <mliska@suse.cz>
+
+ * doc/invoke.texi: Add missing params.
+
+2020-12-03 Martin Sebor <msebor@redhat.com>
+
+ PR c++/90629
+ PR middle-end/94527
+ * builtins.c (access_ref::access_ref): Initialize new member.
+ (compute_objsize): Use access_ref::deref. Handle simple pointer
+ assignment.
+ (expand_builtin): Remove handling of the free built-in.
+ (call_dealloc_argno): Same.
+ (find_assignment_location): New function.
+ (fndecl_alloc_p): Same.
+ (gimple_call_alloc_p): Same.
+ (call_dealloc_p): Same.
+ (matching_alloc_calls_p): Same.
+ (warn_dealloc_offset): Same.
+ (maybe_emit_free_warning): Same.
+ * builtins.h (struct access_ref): Declare new member.
+ (maybe_emit_free_warning): Make extern. Make use of access_ref.
+ Handle -Wmismatched-new-delete.
+ * calls.c (initialize_argument_information): Call
+ maybe_emit_free_warning.
+ * doc/extend.texi (attribute malloc): Update.
+ * doc/invoke.texi (-Wfree-nonheap-object): Expand documentation.
+ (-Wmismatched-new-delete): Document new option.
+ (-Wmismatched-dealloc): Document new option.
+
+2020-12-03 Alexandre Oliva <oliva@adacore.com>
+
+ * tree.c (build_common_builtin_nodes): Declare
+ __builtin___clear_cache for all languages.
+ * builtins.c (maybe_emit_call_builtin___clear_cache): Accept
+ Pmode arguments.
+
+2020-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/arm/t-rtems: Add "-mthumb -mcpu=cortex-r52
+ -mfloat-abi=hard" multilib.
+
+2020-12-03 Uroš Bizjak <ubizjak@gmail.com>
+ Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98086
+ * config/i386/i386.c (ix86_md_asm_adjustmd): Rewrite
+ zero-extension part to use convert_to_mode.
+
+2020-12-03 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/s390.md ("@probe_stack2<mode>"): Change mode
+ iterator to W.
+
+2020-12-03 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins-base.cc (svundef_impl::fold):
+ Delete.
+
+2020-12-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/98099
+ * expmed.c (flip_storage_order): In the case of a non-integer mode,
+ sorry out if the integer mode to be used instead is not supported.
+
+2020-12-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/98082
+ * function.c (use_register_for_decl): Also return true for a result
+ if cfun->tail_call_marked is true.
+
+2020-12-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/93121
+ * fold-const.h (native_encode_initializer): Add mask argument
+ defaulted to nullptr.
+ (find_bitfield_repr_type): Declare.
+ (native_interpret_aggregate): Declare.
+ * fold-const.c (find_bitfield_repr_type): New function.
+ (native_encode_initializer): Add mask argument and support for
+ filling it. Handle also some bitfields without integral
+ DECL_BIT_FIELD_REPRESENTATIVE.
+ (native_interpret_aggregate): New function.
+ * gimple-fold.h (clear_type_padding_in_mask): Declare.
+ * gimple-fold.c (struct clear_padding_struct): Add clear_in_mask
+ member.
+ (clear_padding_flush): Handle buf->clear_in_mask.
+ (clear_padding_union): Copy clear_in_mask. Don't error if
+ buf->clear_in_mask is set.
+ (clear_padding_type): Don't error if buf->clear_in_mask is set.
+ (clear_type_padding_in_mask): New function.
+ (gimple_fold_builtin_clear_padding): Set buf.clear_in_mask to false.
+ * doc/extend.texi (__builtin_bit_cast): Document.
+
+2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest):
+ Do not allow __builtin_constant_p on a threading path.
+
+2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * tree-ssa-strlen.c (printf_strlen_execute): Avoid division by
+ 0.
+
+2020-12-03 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/multilib-generator (arch_canonicalize): Move
+ code to arch-canonicalize, and call that script to canonicalize arch
+ string.
+ (canonical_order): Move code to arch-canonicalize.
+ (LONG_EXT_PREFIXES): Ditto.
+ (IMPLIED_EXT): Ditto.
+ * config/riscv/arch-canonicalize: New.
+ * config.gcc (riscv*-*-*): Canonicalize --with-arch.
+
+2020-12-03 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-option-extensions.def
+ (AARCH64_OPT_EXTENSION): New +flagm option in -march for AArch64.
+ * config/aarch64/aarch64.h (AARCH64_FL_FLAGM): Add new flagm extension bit
+ mask.
+ (AARCH64_FL_FOR_ARCH8_4): Add flagm to Armv8.4-A.
+ * doc/invoke.texi: Update docs with +flagm.
+
+2020-12-03 liuhongt <hongtao.liu@intel.com>
+
+ PR target/96906
+ * config/i386/sse.md
+ (<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Add a new
+ define_split after this insn.
+
+2020-12-03 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97642
+ * config/i386/i386-expand.c
+ (ix86_expand_special_args_builtin): Don't move all-ones mask
+ operands into register.
+ * config/i386/sse.md (UNSPEC_MASKLOAD): New unspec.
+ (*<avx512>_load<mode>_mask): New define_insns for masked load
+ instructions.
+ (<avx512>_load<mode>_mask): Changed to define_expands which
+ specifically handle memory or all-ones mask operands.
+ (<avx512>_blendm<mode>): Changed to define_insns which are same
+ as original <avx512>_load<mode>_mask with adjustment of
+ operands order.
+ (*<avx512>_load<mode>): New define_insn_and_split which is
+ used to optimize for masked load with all one mask.
+
+2020-12-03 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/97770
+ * config/i386/sse.md (popcount<mode>2): New expander
+ for SI/DI vector modes.
+ (popcount<mode>2): Likewise for QI/HI vector modes.
+
+2020-12-03 Alexandre Oliva <oliva@adacore.com>
+
+ * builtins.c (default_emit_call_builtin___clear_cache): New.
+ (maybe_emit_call_builtin___clear_cache): New.
+ (expand_builtin___clear_cache): Split into the above.
+ (expand_builtin): Do not issue clear_cache call any more.
+ * builtins.h (maybe_emit_call_builtin___clear_cache): Declare.
+ * config/aarch64/aarch64.c (aarch64_trampoline_init): Use
+ maybe_emit_call_builtin___clear_cache.
+ * config/arc/arc.c (arc_trampoline_init): Likewise.
+ * config/arm/arm.c (arm_trampoline_init): Likewise.
+ * config/c6x/c6x.c (c6x_initialize_trampoline): Likewise.
+ * config/csky/csky.c (csky_trampoline_init): Likewise.
+ * config/m68k/linux.h (FInALIZE_TRAMPOLINE): Likewise.
+ * config/tilegx/tilegx.c (tilegx_trampoline_init): Likewise.
+ * config/tilepro/tilepro.c (tilepro_trampoline_init): Ditto.
+ * config/vxworks.c: Include rtl.h, memmodel.h, and optabs.h.
+ (vxworks_emit_call_builtin___clear_cache): New.
+ * config/vxworks.h (CLEAR_INSN_CACHE): Drop.
+ (TARGET_EMIT_CALL_BUILTIN___CLEAR_CACHE): Define.
+ * target.def (trampoline_init): In the documentation, refer to
+ maybe_emit_call_builtin___clear_cache.
+ (emit_call_builtin___clear_cache): New.
+ * doc/tm.texi.in: Add new hook point.
+ (CLEAR_CACHE_INSN): Remove duplicate 'both'.
+ * doc/tm.texi: Rebuilt.
+ * targhooks.h (default_meit_call_builtin___clear_cache):
+ Declare.
+ * tree.h (BUILTIN_ASM_NAME_PTR): New.
+
+2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path):
+ Do not allow __builtin_constant_p on a threading path.
+
+2020-12-02 Jakub Jelinek <jakub@redhat.com>
+
+ * dwarf2out.c (add_scalar_info): Only use add_AT_wide for 128-bit
+ constants and only in dwarf-5 or later, where DW_FORM_data16 is
+ available. Otherwise use DW_FORM_block*/DW_FORM_exprloc with
+ DW_OP_implicit_value to describe the constant.
+
+2020-12-02 qing zhao <qinzhao@gcc.gnu.org>
+
+ PR rtl-optimization/97777
+ * reg-stack.c (rest_of_handle_stack_regs): call
+ df_insn_rescan_all if reg_to_stack return true.
+
+2020-12-02 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390-protos.h (s390_const_int_pool_entry_p): New
+ function.
+ * config/s390/s390.c (s390_const_int_pool_entry_p): New
+ function.
+ * config/s390/s390.md: Add define_peephole2 that produces llihf
+ and oilf.
+
+2020-12-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97630
+ * tree-vectorizer.h (_slp_tree::next_node,
+ _slp_tree::prev_node): New.
+ (vect_slp_init): Declare.
+ (vect_slp_fini): Likewise.
+ * tree-vectorizer.c (vectorize_loops): Call vect_slp_init/fini.
+ (pass_slp_vectorize::execute): Likewise.
+ * tree-vect-slp.c (vect_slp_init): New.
+ (vect_slp_fini): Likewise.
+ (slp_first_node): New global.
+ (_slp_tree::_slp_tree): Link node into the SLP tree list.
+ (_slp_tree::~_slp_tree): Delink node from the SLP tree list.
+
+2020-12-02 Scott Snyder <sss@li-snyder.org>
+
+ PR plugins/98059
+ * vec.h (auto_delete_vec): Use
+ DISABLE_COPY_AND_ASSIGN(auto_delete_vec) instead of
+ DISABLE_COPY_AND_ASSIGN(auto_delete_vec<T>) to make it valid C++20
+ after DR2237.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ PR ipa/98075
+ * cgraph.c (cgraph_node::dump): Dump decl_is_malloc flag.
+ * ipa-pure-const.c (propagate_malloc): Do not set malloc
+ attribute for void functions.
+
+2020-12-02 H.J. Lu <hjl.tools@gmail.com>
+
+ PR middle-end/93195
+ PR middle-end/93197
+ * configure.ac (HAVE_GAS_SECTION_LINK_ORDER): New. Define 1 if
+ the assembler supports the section flag 'o' for specifying
+ section with link-order.
+ * output.h (SECTION_LINK_ORDER): New. Defined to 0x8000000.
+ (SECTION_MACH_DEP): Changed from 0x8000000 to 0x10000000.
+ * targhooks.c (default_print_patchable_function_entry): Pass
+ SECTION_LINK_ORDER to switch_to_section if the section flag 'o'
+ works. Pass current_function_decl to switch_to_section.
+ * varasm.c (default_elf_asm_named_section): Use 'o' flag for
+ SECTION_LINK_ORDER if assembler supports it.
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * doc/sourcebuild.texi: Document o_flag_in_section.
+
+2020-12-02 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386.opt: Add the missing '.' for -mneeded.
+
+2020-12-02 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vect_transform_loop_stmt): Return whether
+ we vectorized a stmt.
+ (vect_transform_loop): Only call maybe_set_vectorized_backedge_value
+ when we vectorized the stmt.
+
+2020-12-02 Jakub Jelinek <jakub@redhat.com>
+
+ * expmed.h (expand_divmod): Only declare if GCC_OPTABS_H is defined.
+ Add enum optabs_method argument defaulted to OPTAB_LIB_WIDEN.
+ * expmed.c: Include expmed.h after optabs.h.
+ (expand_divmod): Add methods argument, if it is not OPTAB_{,LIB_}WIDEN,
+ don't choose a wider mode, and pass it to other calls instead of
+ hardcoded OPTAB_LIB_WIDEN. Avoid emitting libcalls if not
+ OPTAB_LIB or OPTAB_LIB_WIDEN.
+ * optabs.c: Include expmed.h after optabs.h.
+ (expand_doubleword_mod, expand_doubleword_divmod): Pass OPTAB_DIRECT
+ as last argument to expand_divmod.
+ (expand_binop): Punt if {s,u}divmod_optab has handler for double-word
+ int_mode.
+ * expr.c: Include expmed.h after optabs.h.
+ * explow.c: Include expmed.h after optabs.h.
+
+2020-12-02 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97459
+ * optabs.h (expand_doubleword_divmod): Declare.
+ * optabs.c (expand_doubleword_divmod): New function.
+ (expand_binop): Use it.
+ * internal-fn.c (expand_DIVMOD): Likewise.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ PR c/98087
+ * gimple-fold.c (clear_padding_type): Do not divide by zero.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ * gdbinit.in: Write what each command calls
+ for a debugging function.
+
+2020-12-02 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Use OPTION_MASK_DIRECT_MOVE for Power8 target_enable instead
+ of OPTION_MASK_HTM.
+ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER):
+ Remove OPTION_MASK_HTM.
+ (RS6000_CPU): Add OPTION_MASK_HTM to power8, power9 and
+ powerpc64le entries.
+
+2020-12-02 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/98079
+ * config/i386/i386.md (abs<mode>2): Enable QImode
+ only for !TARGET_PARTIAL_REG_STALL.
+ (*abs<mode>2_1): Ditto.
+ (<maxmin:code><mode>3): Ditto.
+ (*<maxmin:code><mode>3_1): Ditto.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ * diagnostic.c (diagnostic_report_diagnostic): ICE causes to
+ terminate compiler immediately, so I guess it should be printed
+ always.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/88702
+ * gimple-if-to-switch.cc (pass_if_to_switch::execute):
+ Require at least 2 BBs.
+ * gimple-if-to-switch.cc (find_conditions): Require
+ equal precision for low and high of a range.
+
+2020-12-02 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/98084
+ * gimple-if-to-switch.cc (find_conditions): Consider only
+ integral types.
+
+2020-12-02 Jeff Law <law@redhat.com>
+
+ * config/h8300/addsub.md (addqi3_clobber_flags): Rename to
+ addqi3_flags and annotate with a <cczn> for define_subst.
+ (addhi3_h8sx_clobber_flags): Likewise.
+ (subqi3_clobber_flags, sub<mode>3_clobber_flags): Likewise.
+ (neg<mode2>_clobber_flags): Similarly.
+ (addsi3_clobber_flags): Similarly. Update last argument to
+ output_plussi to distinguish when we need flags or do not need
+ flags.
+ (addhi3_clobber_flags): Similarly. Twiddle code for cases
+ +-1, +-2 and +-4.
+ * config/h8300/h8300.md: Define iterators, mode attributes and
+ substitutions for use in compare/test elimination.
+ * config/h8300/jumpcall.md (branch, branch_1): Use H8cc mode
+ iterator to cover the different modes for the CC register.
+ (branch_1_false): Likewise.
+
+2020-12-02 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * loop-iv.c: Fix a typo, s/bu/by/, in the `iv_analyze_expr'
+ description in the introduction.
+
+2020-12-02 H.J. Lu <hjl.tools@gmail.com>
+
+ * configure.ac (HAVE_GAS_SHF_GNU_RETAIN): New. Define 1 if
+ the assembler supports marking sections with SHF_GNU_RETAIN flag.
+ * output.h (SECTION_RETAIN): New. Defined as 0x4000000.
+ (SECTION_MACH_DEP): Changed from 0x4000000 to 0x8000000.
+ (default_unique_section): Add a bool argument.
+ * varasm.c (get_section): Set SECTION_RETAIN for the preserved
+ symbol with HAVE_GAS_SHF_GNU_RETAIN.
+ (resolve_unique_section): Used named section for the preserved
+ symbol if assembler supports SHF_GNU_RETAIN.
+ (get_variable_section): Handle the preserved common symbol with
+ HAVE_GAS_SHF_GNU_RETAIN.
+ (default_elf_asm_named_section): Require the full declaration and
+ use the 'R' flag for SECTION_RETAIN.
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * doc/sourcebuild.texi: Document R_flag_in_section.
+
+2020-12-02 H.J. Lu <hjl.tools@gmail.com>
+
+ * config.gcc: Replace cet.o with gnu-property.o. Replace
+ i386/t-cet with i386/t-gnu-property.
+ * config/i386/cet.c: Renamed to ...
+ * config/i386/gnu-property.c: This.
+ (emit_gnu_property): New function.
+ (file_end_indicate_exec_stack_and_cet): Renamed to ...
+ (file_end_indicate_exec_stack_and_gnu_property): This. Call
+ emit_gnu_property to generate GNU_PROPERTY_X86_FEATURE_1_AND and
+ GNU_PROPERTY_X86_ISA_1_NEEDED properties.
+ * config/i386/i386.opt (mneeded): New.
+ * config/i386/linux-common.h (file_end_indicate_exec_stack_and_cet):
+ Renamed to ...
+ (file_end_indicate_exec_stack_and_gnu_property): This.
+ (TARGET_ASM_FILE_END): Updated.
+ * config/i386/t-cet: Renamed to ...
+ * config/i386/t-gnu-property: This.
+ (cet.o): Renamed to ...
+ (gnu-property.o): This.
+ * doc/invoke.texi: Document -mneeded.
+
+2020-12-01 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com>
+
+ PR tree-optimization/96708
+ * match.pd: New pattern for comparing X with MAX (X, Y)
+ or MIN (X, y).
+
+2020-12-01 Jeff Law <law@redhat.com>
+
+ * config/mcore/t-mcore (MULTILIB_EXCEPTIONS): Define.
+
+2020-12-01 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97595
+ * tree.c (component_ref_size): Fail when DECL_SIZE != TYPE_SIZE.
+ * tree.h (DECL_SIZE, TYPE_SIZE): Update comment.
+
+2020-12-01 JeanHeyd Meneide <phdofthehouse@gmail.com>
+
+ * doc/cpp.texi: Document new macros.
+
+2020-12-01 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97373
+ * builtins.c (compute_objsize): Rename...
+ (compute_objsize_r): to this. Change order and types of arguments.
+ Use new argument. Adjust calls to self.
+ (access_ref::get_ref): New member function.
+ (pointer_query::pointer_query): New member function.
+ (pointer_query::get_ref): Same.
+ (pointer_query::put_ref): Same.
+ (handle_min_max_size): Change order and types of arguments.
+ (maybe_emit_free_warning): Add a test.
+ * builtins.h (class pointer_query): New class.
+ (compute_objsize): Declare an overload.
+ * gimple-ssa-sprintf.c (get_destination_size): Add argument.
+ (handle_printf_call): Change argument type.
+ * tree-ssa-strlen.c (adjust_last_stmt): Add an argument and use it.
+ (maybe_warn_overflow): Same.
+ (handle_builtin_strcpy): Same.
+ (maybe_diag_stxncpy_trunc): Same.
+ (handle_builtin_memcpy): Change argument type. Adjust calls.
+ (handle_builtin_strcat): Same.
+ (handle_builtin_memset): Same.
+ (handle_store): Same.
+ (strlen_check_and_optimize_call): Same.
+ (check_and_optimize_stmt): Same.
+ (strlen_dom_walker): Add new data members.
+ (strlen_dom_walker::before_dom_children): Use new member.
+ (printf_strlen_execute): Dump cache performance counters. Remove
+ objsize pass cleanup.
+ * tree-ssa-strlen.h (maybe_diag_stxncpy_trunc): Add argument.
+ (handle_printf_call): Change argument type.
+
+2020-12-01 Eric Botcazou <ebotcazou@adacore.com>
+
+ * function.c (gen_call_used_regs_seq): In a function subject to the
+ leaf register optimization, skip registers that are not present.
+ * config/sparc/sparc.c (TARGET_ZERO_CALL_USED_REGS): Define to...
+ (sparc_zero_call_used_regs): ...this. New function.
+
+2020-12-01 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.h: Remove unused 'X' specs in the link spec
+ rather than driver self-specs.
+
+2020-12-01 Nathan Sidwell <nathan@acm.org>
+
+ * params.opt (lazy-modules): New.
+ * timevar.def (TV_MODULE_IMPORT, TV_MODULE_EXPORT)
+ (TV_MODULE_MAPPER): New.
+
+2020-12-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97459
+ * optabs.c (expand_doubleword_mod): Punt early for even op1.
+ (expand_binop): Don't require lshr_optab double-word handler.
+
+2020-12-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97954
+ * loop-invariant.c (find_invariant_insn): Punt on JUMP_P insns.
+
+2020-12-01 Iain Sandoe <iain@sandoe.co.uk>
+
+ * configure.ac (check leb128 support): Check that assemblers both
+ accept the LEB128 directives and also give the expected output.
+ Add a test for uleb128 with the MSB set for a 64 bit value.
+ * configure: Regenerated.
+
+2020-12-01 Iain Sandoe <iain@sandoe.co.uk>
+
+ * configure: Regnerated.
+
+2020-12-01 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * optabs-tree.c (vec_cmp_icode_p): New function.
+ (vec_cmp_eq_icode_p): New function.
+ (expand_vec_cmp_expr_p): Use vec_cmp_icode_p and
+ vec_cmp_eq_icode_p.
+ (vcond_icode_p): Use get_rtx_code_1, just to be uniform with
+ vec_cmp_icode_p.
+ * optabs.c (unsigned_optab_p): New function.
+ (insn_predicate_matches_p): New function.
+ (can_vec_cmp_compare_p): New function.
+ (can_vcond_compare_p): Use unsigned_optab_p and
+ insn_predicate_matches_p.
+ (get_rtx_code): Use get_rtx_code_1.
+ (get_rtx_code_1): Version of get_rtx_code that returns UNKNOWN
+ instead of asserting.
+ * optabs.h (can_vec_cmp_compare_p): New function.
+ (get_rtx_code_1): New function.
+
+2020-12-01 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/14799
+ PR ipa/88702
+ * Makefile.in: Add gimple-if-to-switch.o.
+ * dbgcnt.def (DEBUG_COUNTER): Add new debug counter.
+ * passes.def: Include new pass_if_to_switch pass.
+ * timevar.def (TV_TREE_IF_TO_SWITCH): New timevar.
+ * tree-pass.h (make_pass_if_to_switch): New.
+ * tree-ssa-reassoc.c (struct operand_entry): Move to the header.
+ (dump_range_entry): Move to header file.
+ (debug_range_entry): Likewise.
+ (no_side_effect_bb): Make it global.
+ * tree-switch-conversion.h (simple_cluster::simple_cluster):
+ Add inline for couple of functions in order to prevent error
+ about multiple defined symbols.
+ * gimple-if-to-switch.cc: New file.
+ * tree-ssa-reassoc.h: New file.
+
+2020-12-01 Marius Hillenbrand <mhillen@linux.ibm.com>
+
+ * configure.ac: Add configure option
+ --enable-s390-excess-float-precision and check to derive default
+ from glibc.
+ * config/s390/s390.c: Guard s390_excess_precision with an ifdef
+ for ENABLE_S390_EXCESS_FLOAT_PRECISION.
+ * doc/install.texi: Document --enable-s390-excess-float-precision.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+
+2020-12-01 Martin Liska <mliska@suse.cz>
+
+ PR ipa/98057
+ * symtab.c (symtab_node::set_section_for_node): Drop
+ implicit_section if x_section is NULL.
+
+2020-12-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/98063
+ * config/i386/i386-expand.c (ix86_expand_call): Handle non-plt
+ CM_LARGE_PIC calls.
+
+2020-12-01 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/98070
+ * builtins.c (builtin_fnspec): realloc is ".Cw ".
+
+2020-12-01 Jakub Jelinek <jakub@redhat.com>
+
+ * dwarf2out.c (gen_compile_unit_die): Treat GNU C++20
+ like C++14 for -gdwarf-5.
+
+2020-12-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/97989
+ * gcc.c (cpp_unique_options): Add -dD if %:debug-level-gt(2)
+ rather than g3|ggdb3|gstabs3|gxcoff3|gvms3.
+
+2020-12-01 Kito Cheng <kito.cheng@sifive.com>
+
+ * config.gcc (riscv*-*-*): Drop some commited accidentally code.
+
+2020-11-30 Jeff Law <law@redhat.com>
+
+ * symtab.c (set_section_for_node): Add function comment.
+ (set_section_from_node): Likewise.
+
+2020-11-30 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/plugins.texi (Plugin callbacks): Add PLUGIN_ANALYZER_INIT.
+ * plugin.c (register_callback): Likewise.
+ (invoke_plugin_callbacks_full): Likewise.
+ * plugin.def (PLUGIN_ANALYZER_INIT): New event.
+
+2020-11-30 Jeff Law <law@redhat.com>
+
+ * config/h8300/bitfield.md: Remove "cc" attribute on any
+ insns where it remained.
+ * config/h8300/combiner.md: Likewise.
+ * config/h8300/jumpcall.md: Likewise.
+ * config/h8300/logical.md: Likewise.
+ * config/h8300/testcompare.md: Likewise.
+ * config/h8300/h8300.md (old_cc attr): Renamed from cc attr.
+ * config/h8300/h8300.c (notice_update_cc): Remove.
+ (compute_plussi_cc): Change references to CC_* to OLD_CC_.
+ (compute_logical_op_cc): Likewise.
+ (shift_one, shift_two): Likewise.
+ (compute_a_shift_cc): Likewise.
+ (get_shift_alg): Likewise.
+ (struct shift_insn): Change type of cc_valid field.
+ (struct shift_info): Likewise.
+ * config/h8300/save.md: Remove accidentially created file.
+
+2020-11-30 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/98037
+ * dse.c (find_shift_sequence): Iterate over all integers and
+ skip modes that are too small.
+
+2020-11-30 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com>
+
+ PR tree-optimization/96679
+ * match.pd (((b | c) & a) | b -> (a & c) | b): New pattern.
+
+2020-11-30 Martin Liska <mliska@suse.cz>
+
+ * passes.c (emergency_dump_function): Dump symtab when
+ we are in an IPA pass.
+
+2020-11-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98064
+ * tree-vect-loop.c (vectorizable_live_operation): Avoid
+ breaking LC SSA for BB vectorization.
+
+2020-11-30 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/sourcebuild.texi (Directives): Fix description of
+ dg-require-effective-target to include "target" in selector.
+
+2020-11-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98048
+ * tree-vect-generic.c (expand_vector_operations_1): Use the
+ correct type for the scalar LHS replacement.
+
+2020-11-30 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/98066
+ * gimple-isel.cc (gimple_expand_vec_exprs): Return when
+ gimple_expand_vec_exprs replaces last stmt.
+
+2020-11-30 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * cfgrtl.c (rtl_bb_info_initialized_p): New function.
+ (rtl_dump_bb): Use rtl_bb_info_initialized_p before accessing bb
+ insns.
+
+2020-11-30 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ PR d/87818
+ * config.gcc (*-*-freebsd*): Add freebsd-d.o and t-freebsd.
+ * config/freebsd-d.c: New file.
+ * config/t-freebsd: New file.
+
+2020-11-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97459
+ * internal-fn.h (expand_addsub_overflow): Declare.
+ * internal-fn.c (expand_addsub_overflow): No longer static.
+ * optabs.c (expand_doubleword_mod): New function.
+ (expand_binop): Optimize double-word mod with constant divisor.
+
+2020-11-30 Kito Cheng <kito.cheng@sifive.com>
+
+ * config.gcc (riscv*-*-*): Add TARGET_RISCV_DEFAULT_ABI and
+ TARGET_RISCV_DEFAULT_ARCH to tm_defines.
+ Remove including riscv/withmultilib.h for --with-multilib-list.
+ * config/riscv/riscv.h (STRINGIZING): New.
+ (__STRINGIZING): Ditto.
+ (MULTILIB_DEFAULTS): Ditto.
+ * config/riscv/withmultilib.h: Remove.
+
+2020-11-30 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.c (print_multilib_info): Check default arguments not
+ appeared in multi-lib option list with '!'
+
+2020-11-30 Jeff Law <law@redhat.com>
+
+ * config/ft32/ft32.md (umulsidi3): Do not allow constants as
+ arguments.
+
+2020-11-29 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (ipa_merge_modref_summary_after_inlining): Fix
+ handling of ignore_stores.
+
+2020-11-29 Jan Hubicka <jh@suse.cz>
+
+ PR jit/97867
+ * symtab-thunks.h (thunk_info::release): Use ggc_delete.
+
+2020-11-29 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/92936
+ PR middle-end/92940
+ PR middle-end/89428
+ * builtins.c (access_ref::access_ref): Initialize member.
+ (access_ref::phi): New function.
+ (access_ref::get_ref): New function.
+ (access_ref::add_offset): Remove duplicate assignment.
+ (maybe_warn_for_bound): Add "maybe" kind of warning messages.
+ (warn_for_access): Same.
+ (inform_access): Rename...
+ (access_ref::inform_access): ...to this. Print PHI arguments. Format
+ offset the same as size and simplify. Improve printing of allocation
+ functions and VLAs.
+ (check_access): Adjust to the above.
+ (gimple_parm_array_size): Change argument.
+ (handle_min_max_size): New function.
+ * builtins.h (class ssa_name_limit_t): Move class here from
+ tree-ssa-strlen.c.
+ (struct access_ref): Declare new members.
+ (gimple_parm_array_size): Change argument.
+ * tree-ssa-strlen.c (maybe_warn_overflow): Use access_ref and simplify.
+ (handle_builtin_memcpy): Correct argument passed to maybe_warn_overflow.
+ (handle_builtin_memset): Same.
+ (class ssa_name_limit_t): Move class to builtins.{h,c}.
+
+2020-11-29 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * config.gcc (*-*-darwin*): Set d_target_objs and target_has_targetdm.
+ * config/elfos.h (TARGET_D_MINFO_SECTION): New macro.
+ (TARGET_D_MINFO_START_NAME): New macro.
+ (TARGET_D_MINFO_END_NAME): New macro.
+ * config/t-darwin: Add darwin-d.o.
+ * doc/tm.texi: Regenerate.
+ * doc/tm.texi.in (D language and ABI): Add @hook for
+ TARGET_D_MINFO_SECTION, TARGET_D_MINFO_START_NAME, and
+ TARGET_D_MINFO_END_NAME.
+ * config/darwin-d.c: New file.
+
+2020-11-29 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-structalias.c (handle_pure_call): Skip EAF_UNUSED
+ parameters.
+
+2020-11-29 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_lattice::merge): Do nothing if F is EAF_UNUSED.
+ (analyze_parms): Detect unused params.
+ (modref_merge_call_site_flags): Merge correct EAF_UNUSED.
+
+2020-11-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR target/97939
+ * config/sparc/predicates.md (arith_double_add_operand): Comment.
+ * config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
+ (addvdi4): Use arith_double_add_operand.
+ (addsi3): Remove useless attributes.
+ (addvsi4): Use arith_add_operand.
+ (*cmp_ccv_plus): Likewise and add second alternative accordingly.
+ (*cmp_ccxv_plus): Likewise.
+ (*cmp_ccv_plus_set): Likewise.
+ (*cmp_ccxv_plus_set): Likewise.
+ (*cmp_ccv_plus_sltu_set): Likewise.
+ (usubvdi4): Use arith_double_operand.
+ (subvdi4): Use arith_double_add_operand.
+ (subsi3): Remove useless attributes.
+ (subvsi4): Use arith_add_operand.
+ (*cmp_ccv_minus): Likewise and add second alternative accordingly.
+ (*cmp_ccxv_minus): Likewise.
+ (*cmp_ccv_minus_set): Likewise.
+ (*cmp_ccxv_minus_set): Likewise.
+ (*cmp_ccv_minus_sltu_set): Likewise.
+ (negsi2): Use register_operand.
+ (unegvsi3): Likewise.
+ (negvsi3) Likewise.
+ (*cmp_ccnz_neg): Likewise.
+ (*cmp_ccxnz_neg): Likewise.
+ (*cmp_ccnz_neg_set): Likewise.
+ (*cmp_ccxnz_neg_set): Likewise.
+ (*cmp_ccc_neg_set): Likewise.
+ (*cmp_ccxc_neg_set): Likewise.
+ (*cmp_ccc_neg_sltu_set): Likewise.
+ (*cmp_ccv_neg): Likewise.
+ (*cmp_ccxv_neg): Likewise.
+ (*cmp_ccv_neg_set): Likewise.
+ (*cmp_ccxv_neg_set): Likewise.
+ (*cmp_ccv_neg_sltu_set): Likewise.
+
+2020-11-27 H.J. Lu <hjl.tools@gmail.com>
+
+ PR other/98027
+ * doc/install.texi: Default to --enable-cet=auto.
+
+2020-11-27 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-kernels-decompose.cc (flatten_binds): Don't choke on
+ empty GIMPLE sequence, and examine all statements contained in
+ inner 'GIMPLE_BIND'.
+
+2020-11-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/98024
+ * tree-ssa-pre.c (insert): Fix successor RPO order check.
+ (do_pre_regular_insertion): When inserting an assignment
+ in place of an all-same-value PHI still record that into
+ PHI_GEN.
+
+2020-11-27 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-ssanames.c (get_range_info): Handle INTEGER_CST by returning
+ VR_RANGE with both *min and *max set to the wide_int value of the
+ INTEGER_CST. Return VR_VARYING for non-SSA_NAMEs.
+ * match.pd ((t * 2) / 2) -> t): Handle also @0 being INTEGER_CST.
+ Simplify by calling get_range_info on everything.
+ * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Simplify by calling
+ get_range_info on everything.
+ * tree-scalar-evolution.c (iv_can_overflow_p): Likewise.
+
+2020-11-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/88101
+ * gimple-fold.c (clear_padding_type): Ignore fields with is_empty_type
+ types.
+
+2020-11-27 Tobias Burnus <tobias@codesourcery.com>
+
+ PR c/97880
+ * omp-expand.c (expand_oacc_collapse_init, expand_oacc_collapse_vars):
+ Use now passed diff_type.
+ (expand_oacc_for): Take largest type for diff_type, taking tiling
+ and collapsing into account.
+
+2020-11-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.opt
+ (-param=aarch64-autovec-preference): Define.
+ * config/aarch64/aarch64.c (aarch64_override_options_internal):
+ Set aarch64_sve_compare_costs to 0 when preferring only Advanced
+ SIMD.
+ (aarch64_cmp_autovec_modes): Define.
+ (aarch64_preferred_simd_mode): Adjust to use the above.
+ (aarch64_autovectorize_vector_modes): Likewise.
+ * doc/invoke.texi: Document aarch64-autovec-preference param.
+
+2020-11-27 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (altivec_expand_vec_set_builtin):
+ Change call param 2 from type int to rtx.
+ * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set):
+ Likewise.
+ * config/rs6000/rs6000.c (rs6000_expand_vector_init):
+ Change call param 2 from type int to rtx.
+ (rs6000_expand_vector_set): Likewise.
+ * config/rs6000/vector.md (vec_set<mode>): Support both constant
+ and variable index vec_set.
+
+2020-11-27 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * config/rs6000/rs6000-protos.h (rs6000_output_addr_vec_elt): Declare.
+ * config/rs6000/rs6000.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC):
+ Define.
+ (rs6000_gen_pic_addr_diff_vec, rs6000_output_addr_vec_elt): Implement.
+ * config/rs6000/rs6000.h (CASE_VECTOR_PC_RELATIVE,
+ CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Define.
+ * config/rs6000/rs6000.md (tablejump<mode>_absolute,
+ tablejump<mode>_absolute_nospec): New expanders.
+ * config/rs6000/rs6000.opt (mrelative-jumptables): New.
+
+2020-11-26 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR target/96607
+ * config/sparc/sparc-protos.h (eligible_for_call_delay): Delete.
+ * config/sparc/sparc.c (eligible_for_call_delay): Likewise.
+ * config/sparc/sparc.md (in_call_delay): Likewise.
+ (tls_delay_slot): New attribute.
+ (define_delay [call]): Use in_branch_delay.
+ (tgd_call<P:mode>): Set type to call_no_delay_slot when
+ tls_delay_slot is false.
+ (tldm_call<P:mode>): Likewise.
+
+2020-11-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97997
+ * match.pd ((t * 2) / 2) -> t): Optimize even for defined
+ overflow if ranges prove there is no overflow.
+
+2020-11-26 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97953
+ * gimple-ssa-evrp-analyze.c
+ (evrp_range_analyzer::record_ranges_from_incoming_edge): Make
+ sure the condition post-dominates the SSA definition before
+ recording into SSA_NAME_RANGE_INFO.
+
+2020-11-26 Richard Biener <rguenther@suse.de>
+
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Only
+ lower VECTOR_BOOLEAN_TYPE_P VEC_COND_EXPRs.
+
+2020-11-26 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/mkoffload.c (copy_early_debug_info): Don't wipe
+ relocation symbols.
+
+2020-11-26 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_multi_arg_builtin):
+ Remove args array of structs, declare rtx xops array instead.
+ Update all uses.
+ (ix86_expand_args_builtin): Ditto.
+ (ix86_expand_round_builtin): Ditto.
+ (ix86_expand_special_args_builtin): Ditto.
+
+2020-11-26 Martin Liska <mliska@suse.cz>
+
+ * dwarf2out.c (gen_compile_unit_die): Fix missing == 0 in a
+ strcmp.
+
+2020-11-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * config/sol2.h (TIME_LIBRARY): Remove.
+
+2020-11-26 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Set param_vect_partial_vector_usage as 1 for Power10 and up
+ by default.
+
+2020-11-26 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-fold.c (clear_padding_union): Ignore DECL_PADDING_P
+ fields.
+ (clear_padding_type): Ignore DECL_PADDING_P fields, rather than
+ DECL_BIT_FIELD with NULL DECL_NAME.
+
+2020-11-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97979
+ * match.pd ((X {&,^,|} C2) << C1 into (X << C1) {&,^,|} (C2 << C1)):
+ Only optimize if int_const_binop returned non-NULL.
+
+2020-11-26 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-expand.c
+ (ix86_expand_special_args_builtin): Delete last_arg_constant
+ and match.
+
+2020-11-26 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/97873
+ * config/i386/i386.md (abs<mode>2): Use SDWIM mode iterator.
+ (*abs<mode>2_1): Use SWI mode iterator.
+ (<maxmin:code><mode>3): Use SDWIM mode iterator.
+ (*<maxmin:code><mode>3_1): Use SWI mode iterator.
+
+2020-11-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/96906
+ * config/i386/sse.md (VI12_AVX2): Remove V64QI/V32HI modes.
+ (VI12_AVX2_AVX512BW): New mode iterator.
+ (<sse2_avx2>_<plusminus_insn><mode>3<mask_name>,
+ uavg<mode>3_ceil, <sse2_avx2>_uavg<mode>3<mask_name>): Use
+ VI12_AVX2_AVX512BW iterator instead of VI12_AVX2.
+ (*<sse2_avx2>_<plusminus_insn><mode>3<mask_name>): Likewise.
+ (*<sse2_avx2>_uavg<mode>3<mask_name>): Likewise.
+ (*<sse2_avx2>_<plusminus_insn><mode>3<mask_name>): Add a new
+ define_split after this insn.
+
+2020-11-26 Martin Uecker <muecker@gwdg.de>
+
+ PR c/65455
+ PR c/92935
+ * ginclude/stdatomic.h: Use comma operator to drop qualifiers.
+
+2020-11-26 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR bootstrap/97983
+ * lra.c (lra_process_new_insns): Use emit_insn_before_noloc or
+ emit_insn_after_noloc with the destination BB.
+
+2020-11-25 Martin Sebor <msebor@redhat.com>
+
+ PR bootstrap/97622
+ PR bootstrap/94982
+ * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
+ Avoid -Wformat-diag.
+ * digraph.cc (struct test_edge): Same.
+ * dumpfile.c (dump_loc): Same.
+ (dump_context::begin_scope): Same.
+ * edit-context.c (edited_file::print_diff): Same.
+ (edited_file::print_diff_hunk): Same.
+ * json.cc (object::print): Same.
+ * lto-wrapper.c (merge_and_complain): Same.
+ * reload.c (find_reloads): Same.
+ * tree-diagnostic-path.cc (print_path_summary_as_text): Same.
+ * ubsan.c (ubsan_type_descriptor): Same.
+
+2020-11-25 Jan Hubicka <jh@suse.cz>
+
+ * gimple.c (gimple_call_arg_flags): Also imply EAF_NODIRECTESCAPE.
+ * tree-core.h (EAF_NODRECTESCAPE): New flag.
+ * tree-ssa-structalias.c (make_indirect_escape_constraint): New
+ function.
+ (handle_rhs_call): Hanlde EAF_NODIRECTESCAPE.
+ * ipa-modref.c (dump_eaf_flags): Print EAF_NODIRECTESCAPE.
+ (deref_flags): Dereference is always EAF_NODIRECTESCAPE.
+ (modref_lattice::init): Also set EAF_NODIRECTESCAPE.
+ (analyze_ssa_name_flags): Pure functions do not affect
+ EAF_NODIRECTESCAPE.
+ (analyze_params): Likewise.
+ (ipa_merge_modref_summary_after_inlining): Likewise.
+ (modref_merge_call_site_flags): Likewise.
+
+2020-11-25 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_summaries::duplicate,
+ modref_summaries_lto::duplicate): Copy arg_flags.
+ (remap_arg_flags): Fix remapping of arg_flags.
+
+2020-11-25 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97956
+ * gimple-fold.c (gimple_fold_builtin_memchr): Use sizetype for pointer
+ offsets.
+
+2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * asan.c (asan_instrument_reads): New.
+ (asan_instrument_writes): New.
+ (asan_memintrin): New.
+ (handle_builtin_stack_restore): Account for HWASAN.
+ (handle_builtin_alloca): Account for HWASAN.
+ (get_mem_refs_of_builtin_call): Special case strlen for HWASAN.
+ (hwasan_instrument_reads): New.
+ (hwasan_instrument_writes): New.
+ (hwasan_memintrin): New.
+ (report_error_func): Assert not HWASAN.
+ (build_check_stmt): Make HWASAN_CHECK instead of ASAN_CHECK.
+ (instrument_derefs): HWASAN does not tag globals.
+ (instrument_builtin_call): Use new helper functions.
+ (maybe_instrument_call): Don't instrument `noreturn` functions.
+ (initialize_sanitizer_builtins): Add new type.
+ (asan_expand_mark_ifn): Account for HWASAN.
+ (asan_expand_check_ifn): Assert never called by HWASAN.
+ (asan_expand_poison_ifn): Account for HWASAN.
+ (asan_instrument): Branch based on whether using HWASAN or ASAN.
+ (pass_asan::gate): Return true if sanitizing HWASAN.
+ (pass_asan_O0::gate): Return true if sanitizing HWASAN.
+ (hwasan_check_func): New.
+ (hwasan_expand_check_ifn): New.
+ (hwasan_expand_mark_ifn): New.
+ (gate_hwasan): New.
+ * asan.h (hwasan_expand_check_ifn): New decl.
+ (hwasan_expand_mark_ifn): New decl.
+ (gate_hwasan): New decl.
+ (asan_intercepted_p): Always false for hwasan.
+ (asan_sanitize_use_after_scope): Account for HWASAN.
+ * builtin-types.def (BT_FN_PTR_CONST_PTR_UINT8): New.
+ * gimple-fold.c (gimple_build): New overload for building function
+ calls without arguments.
+ (gimple_build_round_up): New.
+ * gimple-fold.h (gimple_build): New decl.
+ (gimple_build): New inline function.
+ (gimple_build_round_up): New decl.
+ (gimple_build_round_up): New inline function.
+ * gimple-pretty-print.c (dump_gimple_call_args): Account for
+ HWASAN.
+ * gimplify.c (asan_poison_variable): Account for HWASAN.
+ (gimplify_function_tree): Remove requirement of
+ SANITIZE_ADDRESS, requiring asan or hwasan is accounted for in
+ `asan_sanitize_use_after_scope`.
+ * internal-fn.c (expand_HWASAN_CHECK): New.
+ (expand_HWASAN_ALLOCA_UNPOISON): New.
+ (expand_HWASAN_CHOOSE_TAG): New.
+ (expand_HWASAN_MARK): New.
+ (expand_HWASAN_SET_TAG): New.
+ * internal-fn.def (HWASAN_ALLOCA_UNPOISON): New.
+ (HWASAN_CHOOSE_TAG): New.
+ (HWASAN_CHECK): New.
+ (HWASAN_MARK): New.
+ (HWASAN_SET_TAG): New.
+ * sanitizer.def (BUILT_IN_HWASAN_LOAD1): New.
+ (BUILT_IN_HWASAN_LOAD2): New.
+ (BUILT_IN_HWASAN_LOAD4): New.
+ (BUILT_IN_HWASAN_LOAD8): New.
+ (BUILT_IN_HWASAN_LOAD16): New.
+ (BUILT_IN_HWASAN_LOADN): New.
+ (BUILT_IN_HWASAN_STORE1): New.
+ (BUILT_IN_HWASAN_STORE2): New.
+ (BUILT_IN_HWASAN_STORE4): New.
+ (BUILT_IN_HWASAN_STORE8): New.
+ (BUILT_IN_HWASAN_STORE16): New.
+ (BUILT_IN_HWASAN_STOREN): New.
+ (BUILT_IN_HWASAN_LOAD1_NOABORT): New.
+ (BUILT_IN_HWASAN_LOAD2_NOABORT): New.
+ (BUILT_IN_HWASAN_LOAD4_NOABORT): New.
+ (BUILT_IN_HWASAN_LOAD8_NOABORT): New.
+ (BUILT_IN_HWASAN_LOAD16_NOABORT): New.
+ (BUILT_IN_HWASAN_LOADN_NOABORT): New.
+ (BUILT_IN_HWASAN_STORE1_NOABORT): New.
+ (BUILT_IN_HWASAN_STORE2_NOABORT): New.
+ (BUILT_IN_HWASAN_STORE4_NOABORT): New.
+ (BUILT_IN_HWASAN_STORE8_NOABORT): New.
+ (BUILT_IN_HWASAN_STORE16_NOABORT): New.
+ (BUILT_IN_HWASAN_STOREN_NOABORT): New.
+ (BUILT_IN_HWASAN_TAG_MISMATCH4): New.
+ (BUILT_IN_HWASAN_HANDLE_LONGJMP): New.
+ (BUILT_IN_HWASAN_TAG_PTR): New.
+ * sanopt.c (sanopt_optimize_walker): Act for hwasan.
+ (pass_sanopt::execute): Act for hwasan.
+ * toplev.c (compile_file): Use `gate_hwasan` function.
+
+2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * asan.c (struct hwasan_stack_var): New.
+ (hwasan_sanitize_p): New.
+ (hwasan_sanitize_stack_p): New.
+ (hwasan_sanitize_allocas_p): New.
+ (initialize_sanitizer_builtins): Define new builtins.
+ (ATTR_NOTHROW_LIST): New macro.
+ (hwasan_current_frame_tag): New.
+ (hwasan_frame_base): New.
+ (stack_vars_base_reg_p): New.
+ (hwasan_maybe_init_frame_base_init): New.
+ (hwasan_record_stack_var): New.
+ (hwasan_get_frame_extent): New.
+ (hwasan_increment_frame_tag): New.
+ (hwasan_record_frame_init): New.
+ (hwasan_emit_prologue): New.
+ (hwasan_emit_untag_frame): New.
+ (hwasan_finish_file): New.
+ (hwasan_truncate_to_tag_size): New.
+ * asan.h (hwasan_record_frame_init): New declaration.
+ (hwasan_record_stack_var): New declaration.
+ (hwasan_emit_prologue): New declaration.
+ (hwasan_emit_untag_frame): New declaration.
+ (hwasan_get_frame_extent): New declaration.
+ (hwasan_maybe_enit_frame_base_init): New declaration.
+ (hwasan_frame_base): New declaration.
+ (stack_vars_base_reg_p): New declaration.
+ (hwasan_current_frame_tag): New declaration.
+ (hwasan_increment_frame_tag): New declaration.
+ (hwasan_truncate_to_tag_size): New declaration.
+ (hwasan_finish_file): New declaration.
+ (hwasan_sanitize_p): New declaration.
+ (hwasan_sanitize_stack_p): New declaration.
+ (hwasan_sanitize_allocas_p): New declaration.
+ (HWASAN_TAG_SIZE): New macro.
+ (HWASAN_TAG_GRANULE_SIZE): New macro.
+ (HWASAN_STACK_BACKGROUND): New macro.
+ * builtin-types.def (BT_FN_VOID_PTR_UINT8_PTRMODE): New.
+ * builtins.def (DEF_SANITIZER_BUILTIN): Enable for HWASAN.
+ * cfgexpand.c (align_local_variable): When using hwasan ensure
+ alignment to tag granule.
+ (align_frame_offset): New.
+ (expand_one_stack_var_at): For hwasan use tag offset.
+ (expand_stack_vars): Record stack objects for hwasan.
+ (expand_one_stack_var_1): Record stack objects for hwasan.
+ (init_vars_expansion): Initialise hwasan state.
+ (expand_used_vars): Emit hwasan prologue and generate hwasan epilogue.
+ (pass_expand::execute): Emit hwasan base initialization if needed.
+ * doc/tm.texi (TARGET_MEMTAG_TAG_SIZE,TARGET_MEMTAG_GRANULE_SIZE,
+ TARGET_MEMTAG_INSERT_RANDOM_TAG,TARGET_MEMTAG_ADD_TAG,
+ TARGET_MEMTAG_SET_TAG,TARGET_MEMTAG_EXTRACT_TAG,
+ TARGET_MEMTAG_UNTAGGED_POINTER): Document new hooks.
+ * doc/tm.texi.in (TARGET_MEMTAG_TAG_SIZE,TARGET_MEMTAG_GRANULE_SIZE,
+ TARGET_MEMTAG_INSERT_RANDOM_TAG,TARGET_MEMTAG_ADD_TAG,
+ TARGET_MEMTAG_SET_TAG,TARGET_MEMTAG_EXTRACT_TAG,
+ TARGET_MEMTAG_UNTAGGED_POINTER): Document new hooks.
+ * explow.c (get_dynamic_stack_base): Take new `base` argument.
+ * explow.h (get_dynamic_stack_base): Take new `base` argument.
+ * sanitizer.def (BUILT_IN_HWASAN_INIT): New.
+ (BUILT_IN_HWASAN_TAG_MEM): New.
+ * target.def (target_memtag_tag_size,target_memtag_granule_size,
+ target_memtag_insert_random_tag,target_memtag_add_tag,
+ target_memtag_set_tag,target_memtag_extract_tag,
+ target_memtag_untagged_pointer): New hooks.
+ * targhooks.c (HWASAN_SHIFT): New.
+ (HWASAN_SHIFT_RTX): New.
+ (default_memtag_tag_size): New default hook.
+ (default_memtag_granule_size): New default hook.
+ (default_memtag_insert_random_tag): New default hook.
+ (default_memtag_add_tag): New default hook.
+ (default_memtag_set_tag): New default hook.
+ (default_memtag_extract_tag): New default hook.
+ (default_memtag_untagged_pointer): New default hook.
+ * targhooks.h (default_memtag_tag_size): New default hook.
+ (default_memtag_granule_size): New default hook.
+ (default_memtag_insert_random_tag): New default hook.
+ (default_memtag_add_tag): New default hook.
+ (default_memtag_set_tag): New default hook.
+ (default_memtag_extract_tag): New default hook.
+ (default_memtag_untagged_pointer): New default hook.
+ * toplev.c (compile_file): Call hwasan_finish_file when finished.
+
+2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * common.opt (flag_sanitize_recover): Default for kernel
+ hwaddress.
+ (static-libhwasan): New cli option.
+ * config/aarch64/aarch64.c (aarch64_can_tag_addresses): New.
+ (TARGET_MEMTAG_CAN_TAG_ADDRESSES): New.
+ * config/gnu-user.h (LIBHWASAN_EARLY_SPEC): hwasan equivalent of
+ asan command line flags.
+ * cppbuiltin.c (define_builtin_macros_for_compilation_flags):
+ Add hwasan equivalent of __SANITIZE_ADDRESS__.
+ * doc/invoke.texi: Document hwasan command line flags.
+ * doc/tm.texi: Document new hook.
+ * doc/tm.texi.in: Document new hook.
+ * flag-types.h (enum sanitize_code): New sanitizer values.
+ * gcc.c (STATIC_LIBHWASAN_LIBS): New macro.
+ (LIBHWASAN_SPEC): New macro.
+ (LIBHWASAN_EARLY_SPEC): New macro.
+ (SANITIZER_EARLY_SPEC): Update to include hwasan.
+ (SANITIZER_SPEC): Update to include hwasan.
+ (sanitize_spec_function): Use hwasan options.
+ * opts.c (finish_options): Describe conflicts between address
+ sanitizers.
+ (find_sanitizer_argument): New.
+ (report_conflicting_sanitizer_options): New.
+ (sanitizer_opts): Introduce new sanitizer flags.
+ (common_handle_option): Add defaults for kernel sanitizer.
+ * params.opt (hwasan--instrument-stack): New
+ (hwasan-random-frame-tag): New
+ (hwasan-instrument-allocas): New
+ (hwasan-instrument-reads): New
+ (hwasan-instrument-writes): New
+ (hwasan-instrument-mem-intrinsics): New
+ * target.def (HOOK_PREFIX): Add new hook.
+ (can_tag_addresses): Add new hook under memtag prefix.
+ * targhooks.c (default_memtag_can_tag_addresses): New.
+ * targhooks.h (default_memtag_can_tag_addresses): New decl.
+ * toplev.c (process_options): Ensure hwasan only on
+ architectures that advertise the possibility.
+
+2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * doc/install.texi: Document new option.
+
+2020-11-25 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
+ Do not optimize LRA subregs.
+ * config/aarch64/aarch64-sve.md
+ (@aarch64_pred_<SVE_INT_UNARY:optab><mode>): Tie the input to the
+ output.
+ (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>): Likewise.
+ (*<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): Likewise.
+ (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise.
+ (*cnot<mode>): Likewise.
+ (@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): Likewise.
+ (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>):
+ Likewise.
+ (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>):
+ Likewise.
+ * config/aarch64/aarch64-sve2.md
+ (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
+ (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
+ (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
+ (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
+
+2020-11-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/95862
+ * internal-fn.c (get_min_precision): For narrowing conversion, recurse
+ on the operand and if the operand precision is smaller than the
+ current one, return that smaller precision.
+ (expand_mul_overflow): For s1 * u2 -> ur and s1 * s2 -> ur cases
+ if the sum of minimum precisions of both operands is smaller or equal
+ to the result precision, just perform normal multiplication and
+ set overflow to the sign bit of the multiplication result. For
+ u1 * u2 -> sr if both arguments have the MSB known zero, use
+ normal s1 * s2 -> sr expansion.
+
+2020-11-25 Jan Hubicka <jh@suse.cz>
+
+ * cfg.c (free_block): New function.
+ (clear_edges): Rename to ....
+ (free_cfg): ... this one; also free BBs and vectors.
+ (expunge_block): Update comment.
+ * cfg.h (clear_edges): Rename to ...
+ (free_cfg): ... this one.
+ * cgraph.c (release_function_body): Use free_cfg.
+
+2020-11-25 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97579
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Lower
+ VECTOR_BOOLEAN_TYPE_P, non-vector mode VEC_COND_EXPRs.
+
+2020-11-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/97943
+ * gimple-fold.c (clear_padding_union, clear_padding_type): Error on and
+ ignore flexible array member fields. Ignore fields with
+ error_mark_node type.
+
+2020-11-24 Ulrich Weigand <ulrich.weigand@de.ibm.com>
+
+ Revert:
+ 2020-11-24 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * doc/invoke.texi (-ffast-math): Remove mention of -fno-signaling-nans.
+ Clarify conditions when __FAST_MATH__ preprocessor macro is defined.
+ * opts.c (common_handle_option): Pass OPTS_SET to set_fast_math_flags
+ and set_unsafe_math_optimizations_flags.
+ (set_fast_math_flags): Add OPTS_SET argument, and use it to avoid
+ setting flags already explicitly set on the command line. In the !set
+ case, also reset x_flag_cx_limited_range and x_flag_excess_precision.
+ Never reset x_flag_signaling_nans or x_flag_rounding_math.
+ (set_unsafe_math_optimizations_flags): Add OPTS_SET argument, and use
+ it to avoid setting flags already explicitly set on the command line.
+ (fast_math_flags_set_p): Also test x_flag_cx_limited_range,
+ x_flag_associative_math, x_flag_reciprocal_math, and
+ x_flag_rounding_math.
+
+2020-11-24 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR bootstrap/97933
+ * lra.c (lra_process_new_insns): Stop on the first real insn after
+ head of e->dest.
+
+2020-11-24 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/97534
+ * config/arm/arm.c (arm_split_atomic_op): Use gen_int_mode when
+ negating a const_int.
+
+2020-11-24 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/vector.md: Use vcond_comparison_operator
+ predicate.
+
+2020-11-24 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * doc/invoke.texi (-ffast-math): Remove mention of -fno-signaling-nans.
+ Clarify conditions when __FAST_MATH__ preprocessor macro is defined.
+ * opts.c (common_handle_option): Pass OPTS_SET to set_fast_math_flags
+ and set_unsafe_math_optimizations_flags.
+ (set_fast_math_flags): Add OPTS_SET argument, and use it to avoid
+ setting flags already explicitly set on the command line. In the !set
+ case, also reset x_flag_cx_limited_range and x_flag_excess_precision.
+ Never reset x_flag_signaling_nans or x_flag_rounding_math.
+ (set_unsafe_math_optimizations_flags): Add OPTS_SET argument, and use
+ it to avoid setting flags already explicitly set on the command line.
+ (fast_math_flags_set_p): Also test x_flag_cx_limited_range,
+ x_flag_associative_math, x_flag_reciprocal_math, and
+ x_flag_rounding_math.
+
+2020-11-24 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/97950
+ * config/i386/i386.md (*setcc_si_1_and): Macroize into...
+ (*setcc_<mode>_1_and): New define_insn_and_split with SWI24 iterator.
+ (*setcc_si_1_movzbl): Macroize into...
+ (*setcc_<mode>_1_movzbl): New define_insn_and_split with SWI24
+ iterator.
+
+2020-11-24 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-fold.c (clear_padding_flush): If a word contains only 0
+ or 0xff bytes of padding other than all set, all clear, all set
+ followed by all clear or all clear followed by all set, don't emit
+ a RMW operation on the whole word or parts of it, but instead
+ clear the individual bytes of padding. For paddings of one byte
+ size, don't use char[1] and {}, but instead just char and 0.
+
+2020-11-24 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-expand.c (expand_oacc_for): More explicit checking of which
+ OMP constructs we're expecting.
+
+2020-11-24 Thomas Schwinge <thomas@codesourcery.com>
+
+ * doc/install.texi (Prerequisites) <Tcl>: Add comment.
+
+2020-11-24 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/96929
+ * fold-const.c (wide_int_binop) <case LSHIFT_EXPR, case RSHIFT_EXPR>:
+ Return false on negative second argument rather than trying to handle
+ it as shift in the other direction.
+ * tree-ssa-ccp.c (bit_value_binop) <case LSHIFT_EXPR,
+ case RSHIFT_EXPR>: Punt on negative shift count rather than trying
+ to handle it as shift in the other direction.
+ * match.pd (-1 >> x to -1): Remove tree_expr_nonnegative_p check.
+
+2020-11-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR tree-optimization/97849
+ * tree-if-conv.c (tree_if_conversion): Move ssa_name
+ replacement code from ifcvt_local_dce to this function
+ before calling do_rpo_vn.
+
+2020-11-24 Martin Sebor <msebor@redhat.com>
+
+ * tree-cfg.c (dump_function_to_file): Print type attributes
+ and return type.
+
+2020-11-23 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (ipa_pass_through_data): Expand comment describing
+ operation.
+ * ipa-prop.c (analyze_agg_content_value): Detect new special case and
+ encode it as ASSERT_EXPR.
+ * ipa-cp.c (values_equal_for_ipcp_p): Move before
+ ipa_get_jf_arith_result.
+ (ipa_get_jf_arith_result): Special case ASSERT_EXPR.
+
+2020-11-23 Jeff Law <law@redhat.com>
+
+ * config/h8300/h8300.c (h8300_rtx_costs): Handle the various
+ comparison rtx codes too.
+
+2020-11-23 Jan Hubicka <jh@suse.cz>
+
+ * ipa-prop.c (build_agg_jump_func_from_list,
+ ipa_read_jump_function): Reserve agg.items precisely.
+ * ipa-prop.h (ipa_node_params::~ipa_node_params): Release descriptors
+ (ipa_edge_args::~ipa_edge_args): Release agg.items.
+
+2020-11-23 Jan Hubicka <jh@suse.cz>
+
+ * lto-streamer-in.c (input_cfg): Do not init ssa operands.
+ (input_function): Do not init tree_ssa and set in_ssa_p.
+ (input_ssa_names): Do it here.
+ * tree-ssa.c (init_tree_ssa): Add additional SIZE parameter, default
+ to 0
+ * tree-ssanames.c (init_ssanames): Do not round size up to 50, allocate
+ precisely.
+ * tree-ssa.h (init_tree_ssa): Update prototype.
+
+2020-11-23 Nathan Sidwell <nathan@acm.org>
+
+ * diagnostic.c (diagnostic_report_current_module): Adjust for C++
+ module importation.
+
+2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_section_attr): Don't warn for "lower"
+ attribute used with "noinit" or "persistent" attributes.
+ (msp430_persist_attr): Remove.
+ (attr_lower_exclusions): Remove ATTR_PERSIST exclusion.
+ (attr_upper_exclusions): Likewise.
+ (attr_either_exclusions): Likewise.
+ (attr_persist_exclusions): Remove.
+ (msp430_attribute_table): Remove ATTR_PERSIST handling.
+ (msp430_handle_generic_attribute): Remove ATTR_PERSIST section conflict
+ handling.
+ (TARGET_ASM_INIT_SECTIONS): Remove.
+ (msp430_init_sections): Remove.
+ (msp430_select_section): Use default_elf_select_section for decls with
+ the "persistent" attribute.
+ (msp430_section_type_flags): Remove ".persistent" section handling.
+ * doc/extend.texi (MSP430 Variable Attributes): Remove "noinit" and
+ "persistent" documentation.
+
+2020-11-23 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (maybe_push_to_hybrid_worklist): Skip
+ debug stmts.
+
+2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * doc/extend.texi (Common Variable Attributes): Document the
+ "persistent" variable attribute.
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document
+ the "persistent" effective target keyword.
+ * tree.h (DECL_PERSISTENT_P): Define.
+ * varasm.c (bss_initializer_p): Return false for a
+ DECL_PERSISTENT_P decl initialized to zero.
+ (default_section_type_flags): Handle the ".persistent" section.
+ (default_elf_select_section): Likewise.
+ (default_unique_section): Likewise.
+
+2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * tree.h (DECL_NOINIT_P): Define.
+ * varasm.c (DECL_NOINIT_P): Check DECL_NOINIT_P before using
+ unnamed bss/lcomm sections for bss_initializer variables.
+ (default_elf_select_section): Use DECL_NOINIT_P instead of
+ looking up attribute for .noinit section selection.
+ (default_unique_section): Check DECL_NOINIT_P for .noinit
+ section selection.
+
+2020-11-23 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * doc/install.texi: Document bootstrap-asan option.
+
+2020-11-22 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/97873
+ * config/i386/i386.md (abs<mode>2): Use SWI48DWI mode iterator.
+ (*abs<dwi>2_doubleword): Use DWIH mode iterator.
+ (<maxmin:code><mode>3): Use SWI48DWI mode iterator.
+ (*<maxmin:code><dwi>3_doubleword): Use DWIH mode iterator.
+
+2020-11-22 Austin Law <austinklaw@gmail.com>
+
+ * config/h8300/addsub.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ (add<mod>3_incdec): Remove pattern
+ (adds/subs splitter): Only run before reload.
+ * config/h8300/bitfield.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output
+ of the splitters.
+ (cstoreqi4, cstorehi4, cstoresi4): Comment out
+ (*bstzhireg, *cmpstz, *bstz, *bistz, *cmpcondset): Likewise
+ (*condbset, *cmpcondbclr, *condbclr): Likewise.
+ (*cmpcondbsetreg, *condbsetreg, *cmpcondbclrreg): Likewise.
+ (*condbclrreg): Likewise.
+ * config/h8300/combiner.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters. Add appropriate CC register clobbers to
+ existing splitters.
+ (*addsi3_and_r_1): Disable for now.
+ (*addsi3_and_not_r_1, bit-test branches): Likewise.
+ * config/h8300/divmod.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/extensions.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/genmova.sh: Drop "cc" attribute from patterns.
+ * config/h8300/mova.md: Drop "cc" attribute from patterns.
+ * config/h8300/h8300-modes.def: Add CCZN and CCZNV modes.
+ * config/h8300/h8300-protos.h (output_plussi): Update prototype.
+ (compute_plussi_length): Likewise.
+ (h8300_select_cc_mode): Add prototype.
+ (compute_a_shift_cc): Remove prototype
+ (cmpute_logical_op_cc): Likewise.
+ * config/h8300/h8300.c (names_big): Add "cc" register.
+ (names_extended, names_upper_extended): Likewise.
+ (h8300_emit_stack_adjustment): Be more selective about setting
+ RTX_FRAME_RELATED_P.
+ (h8300_print_operand): Handle CCZN mode
+ (h8300_select_cc_mode): New function.
+ (notice_update_cc): if-0 out. Only kept for reference purposes.
+ (h8300_expand_store): Likewise.
+ (h8300_binary_length): Handle new insn forms.
+ (output_plussi): Add argument for NEED_FLAGS and handle that case.
+ (compute_plussi_length): Likewise.
+ (compute_logical_op_cc): Return integer.
+ (TARGET_FLAGS_REGNUM): Define.
+ * config/h8300/h8300.h (FIRST_PSEUDO_REGISTER): Bump for cc register.
+ (FIXED_REGISTERS, CALL_USED_REGISTERS): Handle cc register.
+ (REG_ALLOC_ORDER, REGISTER_NAMES): Likewise.
+ (SELECT_CC_MODE): Define.
+ * config/h8300/h8300.md: Add CC_REG.
+ Do not include peepholes.md for now.
+ * config/h8300/jumpcall.md (cbranchqi4): Consolidate into
+ cbranch<mode>4.
+ (cbranchhi4, cbranchsi4): Likewise.
+ (cbranch<mode>4): New expander.
+ (branch): New define_insn_and_split for use before reload.
+ (branch_1, branch_1_false): New patterns to match splitter output.
+ Remove code to manage cc_status.flags.
+ * config/h8300/logical.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters. Move various peepholes into this file.
+ * config/h8300/movepush.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/multiply.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/other.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/peepholes.md: Remove peepholes that were moved
+ elsewhere.
+ * config/h8300/predicates.md (simple_memory_operand): New.
+ * config/h8300/proepi.md: Drop "cc" attribute setting.
+ * config/h8300/shiftrotate.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters.
+ * config/h8300/testcompare.md: Turn existing patterns into
+ define_insn_and_split style patterns where the splitter
+ adds a clobber of the condition code register. Drop "cc"
+ attribute. Add _clobber_flags patterns to match output of
+ the splitters. Disable various patterns for now.
+ Move some peepholes that were previously in peepholes.md here.
+ * config/h8300/save.md: New file.
+
+2020-11-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/95853
+ * tree-ssa-math-opts.c (uaddsub_overflow_check_p): Add maxval
+ argument, if non-NULL, instead look for r > maxval or r <= maxval
+ comparisons.
+ (match_uaddsub_overflow): Pattern recognize even other forms of
+ __builtin_add_overflow, in particular when addition is performed
+ in a wider type and result compared to maximum of the narrower
+ type.
+
+2020-11-22 Jeff Law <law@redhat.com>
+
+ * config/h8300/jumpcall.md (branch_true, branch_false): Revert
+ recent change. Ensure operand[0] is always the target label.
+
+2020-11-22 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-c.c (struct f_align_stack): Rename
+ to type from align_stack to f_align_stack.
+ (push_field_alignment): Likewise.
+ (pop_field_alignment): Likewise.
+
+2020-11-21 Marek Polacek <polacek@redhat.com>
+
+ PR c++/94695
+ * doc/invoke.texi: Update the -Wrange-loop-construct description.
+
+2020-11-21 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-alias.c (ao_compare::compare_ao_refs,
+ ao_compare::hash_ao_ref): Use OEP_MATCH_SIDE_EFFECTS.
+
+2020-11-21 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf.c (sem_function::equals_wpa): Do not compare ODR type with
+ -fno-devirtualize.
+ (sem_item_optimizer::update_hash_by_addr_refs): Hash anonymous ODR
+ types by TYPE_UID of their main variant.
+
+2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Enable vector pair memcpy/memmove expansion.
+
+2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * config/rs6000/mma.md (unspec): Add assemble/extract UNSPECs.
+ (movoi): Change to movoo.
+ (*movpoi): Change to *movoo.
+ (movxi): Change to movxo.
+ (*movpxi): Change to *movxo.
+ (mma_assemble_pair): Change to OO mode.
+ (*mma_assemble_pair): New define_insn_and_split.
+ (mma_disassemble_pair): New define_expand.
+ (*mma_disassemble_pair): New define_insn_and_split.
+ (mma_assemble_acc): Change to XO mode.
+ (*mma_assemble_acc): Change to XO mode.
+ (mma_disassemble_acc): New define_expand.
+ (*mma_disassemble_acc): New define_insn_and_split.
+ (mma_<acc>): Change to XO mode.
+ (mma_<vv>): Change to XO mode.
+ (mma_<avv>): Change to XO mode.
+ (mma_<pv>): Change to OO mode.
+ (mma_<apv>): Change to XO/OO mode.
+ (mma_<vvi4i4i8>): Change to XO mode.
+ (mma_<avvi4i4i8>): Change to XO mode.
+ (mma_<vvi4i4i2>): Change to XO mode.
+ (mma_<avvi4i4i2>): Change to XO mode.
+ (mma_<vvi4i4>): Change to XO mode.
+ (mma_<avvi4i4>): Change to XO mode.
+ (mma_<pvi4i2>): Change to XO/OO mode.
+ (mma_<apvi4i2>): Change to XO/OO mode.
+ (mma_<vvi4i4i4>): Change to XO mode.
+ (mma_<avvi4i4i4>): Change to XO mode.
+ * config/rs6000/predicates.md (input_operand): Allow opaque.
+ (mma_disassemble_output_operand): New predicate.
+ * config/rs6000/rs6000-builtin.def:
+ Changes to disassemble builtins.
+ * config/rs6000/rs6000-call.c (rs6000_return_in_memory):
+ Disallow __vector_pair/__vector_quad as return types.
+ (rs6000_promote_function_mode): Remove function return type
+ check because we can't test it here any more.
+ (rs6000_function_arg): Do not allow __vector_pair/__vector_quad
+ as as function arguments.
+ (rs6000_gimple_fold_mma_builtin):
+ Handle mma_disassemble_* builtins.
+ (rs6000_init_builtins): Create types for XO/OO modes.
+ * config/rs6000/rs6000-modes.def: DElete OI, XI,
+ POI, and PXI modes, and create XO and OO modes.
+ * config/rs6000/rs6000-string.c (expand_block_move):
+ Update to OO mode.
+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_uncached):
+ Update for XO/OO modes.
+ (rs6000_rtx_costs): Make UNSPEC_MMA_XXSETACCZ cost 0.
+ (rs6000_modes_tieable_p): Update for XO/OO modes.
+ (rs6000_debug_reg_global): Update for XO/OO modes.
+ (rs6000_setup_reg_addr_masks): Update for XO/OO modes.
+ (rs6000_init_hard_regno_mode_ok): Update for XO/OO modes.
+ (reg_offset_addressing_ok_p): Update for XO/OO modes.
+ (rs6000_emit_move): Update for XO/OO modes.
+ (rs6000_preferred_reload_class): Update for XO/OO modes.
+ (rs6000_split_multireg_move): Update for XO/OO modes.
+ (rs6000_mangle_type): Update for opaque types.
+ (rs6000_invalid_conversion): Update for XO/OO modes.
+ * config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P):
+ Update for XO/OO modes.
+ * config/rs6000/rs6000.md (RELOAD): Update for XO/OO modes.
+
+2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * typeclass.h: Add opaque_type_class.
+ * builtins.c (type_to_class): Identify opaque type class.
+ * dwarf2out.c (is_base_type): Handle opaque types.
+ (gen_type_die_with_usage): Handle opaque types.
+ * expr.c (count_type_elements): Opaque types should
+ never have initializers.
+ * ipa-devirt.c (odr_types_equivalent_p): No type-specific handling
+ for opaque types is needed as it eventually checks the underlying
+ mode which is what is important.
+ * tree-streamer.c (record_common_node): Handle opaque types.
+ * tree.c (type_contains_placeholder_1): Handle opaque types.
+ (type_cache_hasher::equal): No additional comparison needed for
+ opaque types.
+
+2020-11-20 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Add missing
+ XSCMP* cases for IEEE 128-bit long double.
+
+2020-11-20 Jason Merrill <jason@redhat.com>
+
+ PR c++/97918
+ * dwarf2out.c (dwarf2out_early_finish): flush_limbo_die_list
+ after gen_scheduled_generic_parms_dies.
+
+2020-11-20 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97879
+ * tree-core.h (enum attribute_flags): Add ATTR_FLAG_INTERNAL.
+
+2020-11-20 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c (func_checker::hash_operand): Improve hashing of
+ decls.
+
+2020-11-20 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c (func_checker::compare_decl): Do not compare types
+ of local variables.
+
+2020-11-20 Nathan Sidwell <nathan@acm.org>
+
+ * doc/invoke.texi: Replace a couple of @code with @command
+
+2020-11-20 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-slp.c (vectorizable_slp_permutation): Update types on nodes
+ when needed.
+
+2020-11-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (maybe_push_to_hybrid_worklist): New function.
+ (vect_detect_hybrid_slp): Use it. Perform a backward walk
+ over the IL.
+
+2020-11-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_print_slp_tree): Also dump
+ SLP_TREE_REPRESENTATIVE.
+
+2020-11-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/88101
+ * builtins.def (BUILT_IN_CLEAR_PADDING): New built-in function.
+ * gimplify.c (gimplify_call_expr): Rewrite single argument
+ BUILT_IN_CLEAR_PADDING into two-argument variant.
+ * gimple-fold.c (clear_padding_unit, clear_padding_buf_size): New
+ const variables.
+ (struct clear_padding_struct): New type.
+ (clear_padding_flush, clear_padding_add_padding,
+ clear_padding_emit_loop, clear_padding_type,
+ clear_padding_union, clear_padding_real_needs_padding_p,
+ clear_padding_type_may_have_padding_p,
+ gimple_fold_builtin_clear_padding): New functions.
+ (gimple_fold_builtin): Handle BUILT_IN_CLEAR_PADDING.
+ * doc/extend.texi (__builtin_clear_padding): Document.
+
+2020-11-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/97528
+ * config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY, require
+ first POST_MODIFY operand is a REG and is equal to the first operand
+ of PLUS.
+
+2020-11-20 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gimple-ssa-store-merging.c (struct merged_store_group): Add
+ new 'consecutive' field.
+ (merged_store_group): Set it to true.
+ (do_merge): Set it to false if the store is not consecutive and
+ set string_concatenation to false in this case.
+ (merge_into): Call do_merge on entry.
+ (merge_overlapping): Likewise.
+
+2020-11-20 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c (func_checker::operand_equal_p): Fix comment.
+
+2020-11-20 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c (func_checker::hash_operand): Hash gimple clobber.
+ (func_checker::operand_equal_p): Special case gimple clobber.
+
+2020-11-20 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/97873
+ * config/i386/i386.md (*neg<mode>2_2): Rename from
+ "*neg<mode>2_cmpz". Use CCGOCmode instead of CCZmode.
+ (*negsi2_zext): Rename from *negsi2_cmpz_zext.
+ Use CCGOCmode instead of CCZmode.
+ (*neg<mode>_ccc_1): New insn pattern.
+ (*neg<dwi>2_doubleword): Use *neg<mode>_ccc_1.
+ (abs<mode>2): Add FLAGS_REG clobber.
+ Use TARGET_CMOVE insn predicate.
+ (*abs<mode>2_1): New insn_and_split pattern.
+ (*absdi2_doubleword): Ditto.
+ (<maxmin:code><mode>3): Use SWI48x mode iterator.
+ (*<maxmin:code><mode>3): Use SWI48 mode iterator.
+ * config/i386/i386-features.c
+ (general_scalar_chain::compute_convert_gain): Handle ABS code.
+ (general_scalar_chain::convert_insn): Ditto.
+ (general_scalar_to_vector_candidate_p): Ditto.
+
+2020-11-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR other/97911
+ * configure.ac: In SERIAL_LIST use lang words without .serial
+ suffix. Change $lang.prev from a target to variable and instead
+ of depending on *.serial expand to the *.serial variable if
+ the word is in the SERIAL_LIST at all, otherwise to nothing.
+ * configure: Regenerated.
+
+2020-11-20 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.md (p8_mtvsrd_df): Fix insn type.
+
+2020-11-20 Martin Uecker <muecker@gwdg.de>
+
+ * gimplify.c (gimplify_modify_expr_rhs): Optimizie
+ NOP_EXPRs that contain compound literals.
+
+2020-11-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91029
+ * range-op.cc (operator_trunc_mod::op1_range): Don't require signed
+ types, nor require that op2 >= 0. Implement (a % b) >= x && x > 0
+ implies a >= x and (a % b) <= x && x < 0 implies a <= x.
+ (operator_trunc_mod::op2_range): New method.
+
+2020-11-19 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/93781
+ * range-op.cc (get_shift_range): Rename from
+ undefined_shift_range_check and now return valid shift ranges.
+ (operator_lshift::fold_range): Use result from get_shift_range.
+ (operator_rshift::fold_range): Ditto.
+
+2020-11-19 Jan Hubicka <jh@suse.cz>
+
+ * fold-const.c (operand_compare::operand_equal_p): Fix thinko in
+ COMPONENT_REF handling and guard types_same_for_odr by
+ virtual_method_call_p.
+ (operand_compare::hash_operand): Likewise.
+
+2020-11-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/97860
+ * tree.c (array_type_nelts): For complete arrays with zero min
+ and NULL max and zero size return -1.
+
+2020-11-19 Nathan Sidwell <nathan@acm.org>
+
+ * configure.ac: Add tests for fstatat, sighandler_t, O_CLOEXEC,
+ unix-domain and ipv6 sockets.
+ * config.in: Rebuilt.
+ * configure: Rebuilt.
+
+2020-11-19 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * config/pru/alu-zext.md: Add lmbd patterns for zero_extend
+ variants.
+ * config/pru/pru.c (enum pru_builtin): Add HALT and LMBD.
+ (pru_init_builtins): Ditto.
+ (pru_builtin_decl): Ditto.
+ (pru_expand_builtin): Ditto.
+ * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Define PRU
+ value for CLZ with zero value parameter.
+ * config/pru/pru.md: Add halt, lmbd and clz patterns.
+ * doc/extend.texi: Document PRU builtins.
+
+2020-11-19 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/invoke.texi (-fvect-cost-model): Add a very-cheap model.
+ * common.opt (fvect-cost-model=): Add very-cheap as a possible option.
+ (fsimd-cost-model=): Likewise.
+ (vect_cost_model): Add very-cheap.
+ * flag-types.h (vect_cost_model): Add VECT_COST_MODEL_VERY_CHEAP.
+ Put the values in order of increasing aggressiveness.
+ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use
+ range checks when comparing against VECT_COST_MODEL_CHEAP.
+ (vect_prune_runtime_alias_test_list): Do not allow any alias
+ checks for the very-cheap cost model.
+ * tree-vect-loop.c (vect_analyze_loop_costing): Do not allow
+ any peeling for the very-cheap cost model. Also require one
+ iteration of the vector loop to pay for itself.
+
+2020-11-19 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (neoversen1_tunings): Use new
+ cortexa76_extra_costs.
+ (neoversev1_tunings): Likewise.
+ (neoversen2_tunines): Likewise.
+ * config/arm/aarch-cost-tables.h (cortexa76_extra_costs):
+ add new costs.
+
+2020-11-19 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_expand_cpymem): Cleanup code and
+ comments, tweak expansion decisions and improve tail expansion.
+
+2020-11-19 Richard Biener <rguenther@suse.de>
+
+ * fold-const.c (operand_compare::hash_operand): Fix typo.
+
+2020-11-19 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-reassoc.c (get_rank): Refactor to consistently
+ use the cache and dump ranks assigned.
+
+2020-11-19 Jan Hubicka <jh@suse.cz>
+
+ * fold-const.c (operand_compare::operand_equal_p): More OBJ_TYPE_REF
+ matching to correct place; drop OEP_ADDRESS_OF for TOKEN, OBJECT and
+ class.
+ (operand_compare::hash_operand): Hash ODR type for OBJ_TYPE_REF.
+
+2020-11-19 Joel Hutton <joel.hutton@arm.com>
+
+ * config/aarch64/aarch64-simd.md: Add vec_widen_lshift_hi/lo<mode>
+ patterns.
+ * tree-vect-stmts.c (vectorizable_conversion): Fix for widen_lshift
+ case.
+
+2020-11-19 Joel Hutton <joel.hutton@arm.com>
+
+ * doc/generic.texi: Document new widen_plus/minus_lo/hi tree codes.
+ * doc/md.texi: Document new widenening add/subtract hi/lo optabs.
+ * expr.c (expand_expr_real_2): Add widen_add, widen_subtract cases.
+ * optabs-tree.c (optab_for_tree_code): Add case for widening optabs.
+ * optabs.def (OPTAB_D): Define vectorized widen add, subtracts.
+ * tree-cfg.c (verify_gimple_assign_binary): Add case for widening adds,
+ subtracts.
+ * tree-inline.c (estimate_operator_cost): Add case for widening adds,
+ subtracts.
+ * tree-vect-generic.c (expand_vector_operations_1): Add case for
+ widening adds, subtracts
+ * tree-vect-patterns.c (vect_recog_widen_add_pattern): New recog
+ pattern.
+ (vect_recog_widen_sub_pattern): New recog pattern.
+ (vect_recog_average_pattern): Update widened add code.
+ (vect_recog_average_pattern): Update widened add code.
+ * tree-vect-stmts.c (vectorizable_conversion): Add case for widened add,
+ subtract.
+ (supportable_widening_operation): Add case for widened add, subtract.
+ * tree.def
+ (WIDEN_PLUS_EXPR): New tree code.
+ (WIDEN_MINUS_EXPR): New tree code.
+ (VEC_WIDEN_ADD_HI_EXPR): New tree code.
+ (VEC_WIDEN_PLUS_LO_EXPR): New tree code.
+ (VEC_WIDEN_MINUS_HI_EXPR): New tree code.
+ (VEC_WIDEN_MINUS_LO_EXPR): New tree code.
+
+2020-11-19 Joel Hutton <joel.hutton@arm.com>
+
+ * config/aarch64/aarch64-simd.md: New patterns
+ vec_widen_saddl_lo/hi_<mode>.
+
+2020-11-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97901
+ * tree-ssa-propagate.c (clean_up_loop_closed_phi): Compute
+ dominators and use replace_uses_by.
+
+2020-11-19 Eric Botcazou <ebotcazou@adacore.com>
+
+ * dwarf2out.h (struct fixed_point_type_info) <scale_factor>: Turn
+ numerator and denominator into a tree.
+ * dwarf2out.c (base_type_die): In the case of a fixed-point type
+ with arbitrary scale factor, call add_scalar_info on numerator and
+ denominator to emit the appropriate attributes.
+
+2020-11-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97897
+ * tree-complex.c (complex_propagate::visit_stmt): Make sure
+ abnormally used SSA names are VARYING.
+ (complex_propagate::visit_phi): Likewise.
+ * tree-ssa.c (verify_phi_args): Verify PHI arguments on abnormal
+ edges are SSA names.
+
+2020-11-19 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*<absneg:code><mode>2_i387_1):
+ Disable for TARGET_SSE_MATH modes.
+
+2020-11-19 Jeff Law <law@redhat.com>
+
+ * config/h8300/constraints.md (R constraint): Add argument to call
+ to h8300_shift_needs_scratch_p.
+ (S and T constraints): Similary.
+ * config/h8300/h8300-protos.h: Update h8300_shift_needs_scratch_p
+ prototype.
+ * config/h8300/h8300.c (expand_a_shift): Emit a different pattern
+ if the shift does not require a scratch register.
+ (h8300_shift_needs_scratch_p): Refine to be more accurate.
+ * config/h8300/shiftrotate.md (shiftqi_noscratch): New pattern.
+ (shifthi_noscratch, shiftsi_noscratch): Similarly.
+
+2020-11-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR middle-end/85811
+ * fold-const.c (tree_expr_finite_p): New function to test whether
+ a tree expression must be finite, i.e. not a FP NaN or infinity.
+ (tree_expr_infinite_p): New function to test whether a tree
+ expression must be infinite, i.e. a FP infinity.
+ (tree_expr_maybe_infinite_p): New function to test whether a tree
+ expression may be infinite, i.e. a FP infinity.
+ (tree_expr_signaling_nan_p): New function to test whether a tree
+ expression must evaluate to a signaling NaN (sNaN).
+ (tree_expr_maybe_signaling_nan_p): New function to test whether a
+ tree expression may be a signaling NaN (sNaN).
+ (tree_expr_nan_p): New function to test whether a tree expression
+ must evaluate to a (quiet or signaling) NaN.
+ (tree_expr_maybe_nan_p): New function to test whether a tree
+ expression me be a (quiet or signaling) NaN.
+ (tree_binary_nonnegative_warnv_p) [MAX_EXPR]: In the presence
+ of NaNs, MAX_EXPR is only guaranteed to be non-negative, if both
+ operands are non-negative.
+ (tree_call_nonnegative_warnv_p) [CASE_CFN_FMAX,CASE_CFN_FMAX_FN]:
+ In the presence of signaling NaNs, fmax is only guaranteed to be
+ non-negative if both operands are negative. In the presence of
+ quiet NaNs, fmax is non-negative if either operand is non-negative
+ and not a qNaN, or both operands are non-negative.
+ * fold-const.h (tree_expr_finite_p, tree_expr_infinite_p,
+ tree_expr_maybe_infinite_p, tree_expr_signaling_nan_p,
+ tree_expr_maybe_signaling_nan_p, tree_expr_nan_p,
+ tree_expr_maybe_nan_p): Prototype new functions here.
+ * builtins.c (fold_builtin_classify) [BUILT_IN_ISINF]: Fold to
+ a constant if argument is known to be (or not to be) an Infinity.
+ [BUILT_IN_ISFINITE]: Fold to a constant if argument is known to
+ be (or not to be) finite.
+ [BUILT_IN_ISNAN]: Fold to a constant if argument is known to be
+ (or not to be) a NaN.
+ (fold_builtin_fpclassify): Check tree_expr_maybe_infinite_p and
+ tree_expr_maybe_nan_p instead of HONOR_INFINITIES and HONOR_NANS
+ respectively.
+ (fold_builtin_unordered_cmp): Fold UNORDERED_EXPR to a constant
+ when its arguments are known to be (or not be) NaNs. Check
+ tree_expr_maybe_nan_p instead of HONOR_NANS when choosing between
+ unordered and regular forms of comparison operators.
+ * match.pd (ordered(x,y)->true/false): Constant fold ORDERED_EXPR
+ if its operands are known to be (or not to be) NaNs.
+ (unordered(x,y)->true/false): Constant fold UNORDERED_EXPR if its
+ operands are known to be (or not to be) NaNs.
+ (sqrt(x)*sqrt(x)->x): Check tree_expr_maybe_signaling_nan_p instead
+ of HONOR_SNANS.
+
+2020-11-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91029
+ PR tree-optimization/97888
+ * range-op.cc (operator_trunc_mod::op1_range): Only set op1
+ range to >= 0 if lhs is > 0, rather than >= 0. Fix up comments.
+
+2020-11-18 Jakub Jelinek <jakub@redhat.com>
+
+ * opts.h (struct cl_var): New type.
+ (cl_vars): Declare.
+ * optc-gen.awk: Generate cl_vars array.
+
+2020-11-18 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com>
+
+ PR tree-optimization/96671
+ * match.pd (three xor patterns): New patterns.
+
+2020-11-18 Jakub Jelinek <jakub@redhat.com>
+
+ * optc-save-gen.awk: Initialize var_opt_init. In
+ cl_optimization_stream_out for params with default values larger than
+ 10, xor the default value with the actual parameter value. In
+ cl_optimization_stream_in repeat the above xor.
+
+2020-11-18 Jakub Jelinek <jakub@redhat.com>
+
+ * configure.ac: Add $lang.prev rules, INDEX.$lang and SERIAL_LIST and
+ SERIAL_COUNT variables to Make-hooks.
+ (--enable-link-serialization): New configure option.
+ * Makefile.in (DO_LINK_SERIALIZATION, LINK_PROGRESS): New variables.
+ * doc/install.texi (--enable-link-serialization): Document.
+ * configure: Regenerated.
+
+2020-11-18 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR target/97870
+ * lra-constraints.c (curr_insn_transform): Do not delete asm goto
+ with wrong constraints. Nullify it saving CFG.
+
+2020-11-18 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.md (mulhi3): New.
+ (mulsi3): New.
+ (mulsidi3): Rename to *mulsidi3_inline.
+ (umulsidi3): Rename to *umulsidi3_inline.
+ (mulsidi3): New define_expand.
+ (umulsidi3): New define_expand.
+
+2020-11-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97886
+ * tree-vect-loop.c (vectorizable_lc_phi): Properly assign
+ vector types to invariants for SLP.
+
+2020-11-18 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * config.gcc (*-*-dragonfly*): Add dragonfly-d.o and t-dragonfly.
+ * config/dragonfly-d.c: New file.
+ * config/t-dragonfly: New file.
+
+2020-11-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/97862
+ * omp-expand.c (expand_omp_for_init_vars): Don't use the sqrt path
+ if number of iterations is constant 0.
+
+2020-11-18 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_ext_version): New.
+ (riscv_ext_version_table): Ditto.
+ (get_default_version): Ditto.
+ (riscv_subset_t::implied_p): New field.
+ (riscv_subset_t::riscv_subset_t): Init implied_p.
+ (riscv_subset_list::add): New.
+ (riscv_subset_list::handle_implied_ext): Pass riscv_subset_t
+ instead of separated argument.
+ (riscv_subset_list::to_string): Handle zifencei and zicsr, and
+ omit version if version is unknown.
+ (riscv_subset_list::parsing_subset_version): New argument `ext`,
+ remove default_major_version and default_minor_version, get
+ default version info via get_default_version.
+ (riscv_subset_list::parse_std_ext): Update argument for
+ parsing_subset_version calls.
+ Handle 2.2 ISA spec, always enable zicsr and zifencei, they are
+ included in baseline ISA in that time.
+ (riscv_subset_list::parse_multiletter_ext): Update argument for
+ `parsing_subset_version` and `add` calls.
+ (riscv_subset_list::parse): Adjust argument for
+ riscv_subset_list::handle_implied_ext call.
+ * config.gcc (riscv*-*-*): Handle --with-isa-spec=.
+ * config.in (HAVE_AS_MISA_SPEC): New.
+ (HAVE_AS_MARCH_ZIFENCEI): Ditto.
+ * config/riscv/riscv-opts.h (riscv_isa_spec_class): New.
+ (riscv_isa_spec): Ditto.
+ * config/riscv/riscv.h (HAVE_AS_MISA_SPEC): New.
+ (ASM_SPEC): Pass -misa-spec if gas supported.
+ * config/riscv/riscv.opt (riscv_isa_spec_class) New.
+ * configure.ac (HAVE_AS_MARCH_ZIFENCEI): New test.
+ (HAVE_AS_MISA_SPEC): Ditto.
+ * configure: Regen.
+
+2020-11-18 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_implied_info):
+ d and f implied zicsr.
+ (riscv_ext_flag_table): Handle zicsr and zifencei.
+ * config/riscv/riscv-opts.h (MASK_ZICSR): New.
+ (MASK_ZIFENCEI): Ditto.
+ (TARGET_ZICSR): Ditto.
+ (TARGET_ZIFENCEI): Ditto.
+ * config/riscv/riscv.md (clear_cache): Check TARGET_ZIFENCEI.
+ (fence_i): Ditto.
+ * config/riscv/riscv.opt (riscv_zi_subext): New.
+
+2020-11-18 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (single_letter_subset_rank): New.
+ (multi_letter_subset_rank): Ditto.
+ (subset_cmp): Ditto.
+ (riscv_subset_list::add): Insert subext in canonical ordering.
+ (riscv_subset_list::parse_std_ext): Move handle_implied_ext to ...
+ (riscv_subset_list::parse): ... here.
+
+2020-11-18 Jiufu Guo <guojiufu@linux.ibm.com>
+
+ * cfgloop.h (loop_optimizer_finalize): Add flag argument.
+ * loop-init.c (loop_optimizer_finalize): Call clean_up_loop_closed_phi.
+ * tree-cfgcleanup.h (clean_up_loop_closed_phi): New declare.
+ * tree-ssa-loop.c (tree_ssa_loop_done): Call loop_optimizer_finalize
+ with flag argument.
+ * tree-ssa-propagate.c (clean_up_loop_closed_phi): New function.
+
+2020-11-17 Sebastian Pop <spop@amazon.com>
+
+ * config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64}
+ as alias flags for --with-{cpu,arch,tune} on AArch64.
+ * doc/install.texi: Document new flags for aarch64.
+
+2020-11-17 Sebastian Pop <spop@amazon.com>
+
+ * config.gcc: Add --with-tune to AArch64 configure flags.
+
+2020-11-17 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/91029
+ * range-op.cc (operator_trunc_mod::op1_range): New.
+
+2020-11-17 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf.c (sem_function::hash_stmt): Fix conditional on
+ variably_modified_type_p.
+
+2020-11-17 Nathan Sidwell <nathan@acm.org>
+
+ * tree.h (cache_integer_cst): Add defaulted might_duplicate parm.
+ * tree.c (cache_integer_cst): Return the integer cst, add
+ might_duplicate parm to permit finding a small duplicate.
+
+2020-11-17 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/83072
+ * range-op.cc (wi_optimize_and_or): Remove zero from IOR range when
+ mask is non-zero.
+
+2020-11-17 Joseph Myers <joseph@codesourcery.com>
+
+ * ginclude/float.h (CR_DECIMAL_DIG): Also define for
+ [__STDC_WANT_IEC_60559_EXT__].
+
+2020-11-17 Joseph Myers <joseph@codesourcery.com>
+
+ * ginclude/float.h [__STDC_VERSION__ > 201710L] (FLT_IS_IEC_60559,
+ DBL_IS_IEC_60559, LDBL_IS_IEC_60559): New macros.
+
+2020-11-17 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ PR target/96791
+ * mode-classes.def: Add MODE_OPAQUE.
+ * machmode.def: Add OPAQUE_MODE.
+ * tree.def: Add OPAQUE_TYPE for types that will use
+ MODE_OPAQUE.
+ * doc/generic.texi: Document OPAQUE_TYPE.
+ * doc/rtl.texi: Document MODE_OPAQUE.
+ * machmode.h: Add OPAQUE_MODE_P().
+ * genmodes.c (complete_mode): Add MODE_OPAQUE.
+ (opaque_mode): New function.
+ * tree.c (tree_code_size): Add OPAQUE_TYPE.
+ * tree.h: Add OPAQUE_TYPE_P().
+ * stor-layout.c (int_mode_for_mode): Treat MODE_OPAQUE modes
+ like BLKmode.
+ * ira.c (find_moveable_pseudos): Treat MODE_OPAQUE modes more
+ like integer/float modes here.
+ * dbxout.c (dbxout_type): Treat OPAQUE_TYPE like VOID_TYPE.
+ * tree-pretty-print.c (dump_generic_node): Treat OPAQUE_TYPE
+ like like other types.
+
+2020-11-17 Jan Hubicka <hubicka@ucw.cz>
+ Martin Liska <mliska@suse.cz>
+
+ * ipa-icf.c: Include data-streamer.h and alias.h.
+ (sem_function::sem_function): Initialize memory_access_types
+ and m_alias_sets_hash.
+ (sem_function::hash_stmt): For memory accesses and when going to
+ do lto streaming add base and ref types into memory_access_types.
+ (sem_item_optimizer::write_summary): Stream memory access types.
+ (sem_item_optimizer::read_section): Likewise and also iniitalize
+ m_alias_sets_hash.
+ (sem_item_optimizer::execute): Call
+ sem_item_optimizer::update_hash_by_memory_access_type.
+ (sem_item_optimizer::update_hash_by_memory_access_type): Updat.
+ * ipa-icf.h (sem_function): Add memory_access_types and
+ m_alias_sets_hash.
+
+2020-11-17 Jan Hubicka <jh@suse.cz>
+
+ PR bootstrap/97857
+ * ipa-devirt.c (odr_based_tbaa_p): Do not ICE when
+ odr_hash is not initialized
+ * ipa-utils.h (type_with_linkage_p): Do not sanity check
+ CXX_ODR_P.
+ * tree-streamer-out.c (pack_ts_type_common_value_fields): Set
+ CXX_ODR_P according to the canonical type.
+
+2020-11-17 Nathan Sidwell <nathan@acm.org>
+
+ * langhooks-def.h (LANG_HOOKS_PREPROCESS_MAIN_FILE)
+ (LANG_HOOKS_PREPROCESS_OPTIONS, LANG_HOOKS_PREPROCESS_UNDEF)
+ (LANG_HOOKS_PREPROCESS_TOKEN): New.
+ (LANG_HOOKS_INITIALIZER): Add them.
+ * langhooks.h (struct lang_hooks): Add preprocess_main_file,
+ preprocess_options, preprocess_undef, preprocess_token hooks. Add
+ enum PT_flags.
+
+2020-11-17 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/97693
+ * tree-vect-stmts.c (vectorizable_call): Pass the required vectype
+ to vect_get_vec_defs_for_operand.
+
+2020-11-17 Liu Hao <lh_mouse@126.com>
+
+ * config/i386/msformat-c.c: Add more length modifiers.
+
+2020-11-17 Tamar Christina <tamar.christina@arm.com>
+
+ PR driver/97574
+ * gcc.c (convert_filename): Don't add suffix to things that are
+ not files.
+ (not_actual_file_p): Use supplied argument.
+
+2020-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * final.c (final_scan_insn_1): Set jump table relocatable as the
+ second argument of targetm.asm_out.function_rodata_section.
+ * output.h (default_function_rodata_section,
+ default_no_function_rodata_section): Add the second argument to the
+ declarations.
+ * target.def (function_rodata_section): Change the doc and add
+ the second argument.
+ * doc/tm.texi: Regenerate.
+ * varasm.c (jumptable_relocatable): Implement.
+ (default_function_rodata_section): Add the second argument
+ and the support for relocatable read only sections.
+ (default_no_function_rodata_section): Add the second argument.
+ (function_mergeable_rodata_prefix): Set the second argument to false.
+ * config/mips/mips.c (mips_function_rodata_section): Add the second
+ arugment and set it to false.
+ * config/s390/s390.c (targetm.asm_out.function_rodata_section): Set
+ the second argument to false.
+ * config/s390/s390.md: Likewise.
+
+2020-11-17 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97194
+ * config/i386/i386-expand.c (ix86_expand_vector_set_var): New function.
+ * config/i386/i386-protos.h (ix86_expand_vector_set_var): New Decl.
+ * config/i386/predicates.md (vec_setm_operand): New predicate,
+ true for const_int_operand or register_operand under TARGET_AVX2.
+ * config/i386/sse.md (vec_set<mode>): Support both constant
+ and variable index vec_set.
+
+2020-11-17 Martin Sebor <msebor@redhat.com>
+
+ * tree-ssa-uninit.c (maybe_warn_operand): Call is_empty_type.
+ * tree.c (default_is_empty_type): Rename...
+ (is_empty_type): ...to this.
+ * tree.h (is_empty_type): Declare.
+
+2020-11-17 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/95673
+ * tree-ssa-strlen.c (used_only_for_zero_equality): Rename...
+ (use_in_zero_equality): ...to this. Add a default argument.
+ (handle_builtin_memcmp): Adjust to the name change above.
+ (handle_builtin_string_cmp): Same.
+ (maybe_warn_pointless_strcmp): Same. Pass in an explicit argument.
+
+2020-11-17 Joseph Myers <joseph@codesourcery.com>
+
+ * ginclude/float.h (DEC32_SNAN, DEC64_SNAN, DEC128_SNAN): New C2x
+ macros.
+
+2020-11-17 Joseph Myers <joseph@codesourcery.com>
+
+ * ginclude/float.h (INFINITY, NAN, FLT_SNAN, DBL_SNAN, LDBL_SNAN)
+ (FLT16_SNAN, FLT32_SNAN, FLT64_SNAN, FLT128_SNAN, FLT32X_SNAN)
+ (FLT64X_SNAN, FLT128X_SNAN, DEC_INFINITY, DEC_NAN): New C2x
+ macros.
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document inff.
+
+2020-11-17 Armin Brauns via Gcc-patches <gcc-patches@gcc.gnu.org>
+
+ * gcc.c: Document %T spec file directive.
+ * doc/invoke.texi: Remove %p, %P spec file directives.
+ Add %M, %R, %V, %nSTR, %>S, %<S*, %{%:function(args):X}, %@{...} spec
+ file directives add sanitize, version-compare, include, gt and
+ debug-level-gt spec functions.
+
+2020-11-16 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR rtl-optimization/92180
+ * config/i386/i386.c (ix86_hardreg_mov_ok): New function to
+ determine whether (set DST SRC) should be allowed at this point.
+ * config/i386/i386-protos.h (ix86_hardreg_mov_ok): Prototype here.
+ * config/i386/i386-expand.c (ix86_expand_move): Check whether
+ this is a complex set of a likely spilled hard register, and if
+ so place the value in a pseudo, and load the hard reg from it.
+ * config/i386/i386.md (*movdi_internal, *movsi_internal)
+ (*movhi_internal, *movqi_internal): Make these instructions
+ conditional on ix86_hardreg_mov_ok.
+ (*lea<mode>): Make this define_insn_and_split conditional on
+ ix86_hardreg_mov_ok.
+
+2020-11-16 Martin Liska <mliska@suse.cz>
+
+ * params.opt: Add missing dot.
+
+2020-11-16 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (escape_point): New type.
+ (modref_lattice): New type.
+ (escape_entry): New type.
+ (escape_summary): New type.
+ (escape_summaries_t): New type.
+ (escape_summaries): New static variable.
+ (eaf_flags_useful_p): New function.
+ (modref_summary::useful_p): Add new check_flags
+ attribute; check eaf_flags for usefulness.
+ (modref_summary_lto): Add arg_flags.
+ (modref_summary_lto::useful_p): Add new check_flags
+ attribute; check eaf_flags for usefulness.
+ (dump_modref_edge_summaries): New function.
+ (remove_modref_edge_summaries): New function.
+ (ignore_retval_p): New predicate.
+ (ignore_stores_p): Also ignore for const.
+ (remove_summary): Call remove_modref_edge_summaries.
+ (modref_lattice::init): New member function.
+ (modref_lattice::release): New member unction.
+ (modref_lattice::dump): New member function.
+ (modref_lattice::add_escape_point): New member function.
+ (modref_lattice::merge): Two new member functions.
+ (modref_lattice::merge_deref): New member functions.
+ (modref_lattice::merge_direct_load): New member function.
+ (modref_lattice::merge_direct_store): New member function.
+ (call_lhs_flags): Rename to ...
+ (merge_call_lhs_flags): ... this one; reimplement using
+ modreflattice.
+ (analyze_ssa_name_flags): Replace KNOWN_FLAGS param by LATTICE;
+ add IPA parametr; use modref_lattice.
+ (analyze_parms): New parameter IPA and SUMMARY_LTO; update for
+ modref_lattice; initialize escape_summary.
+ (analyze_function): Allocate escape_summaries; update uses of useful_p.
+ (modref_write_escape_summary): New function.
+ (modref_read_escape_summary): New function.
+ (modref_write): Write escape summary.
+ (read_section): Read escape summary.
+ (modref_read): Initialie escape_summaries.
+ (remap_arg_flags): New function.
+ (update_signature): Use it.
+ (escape_map): New structure.
+ (update_escape_summary_1, update_escape_summary): New functions.
+ (ipa_merge_modref_summary_after_inlining): Merge escape summaries.
+ (propagate_unknown_call): Do not remove useless summaries.
+ (remove_useless_summaries): Remove them here.
+ (modref_propagate_in_scc): Update; do not dump scc.
+ (modref_propagate_dump_scc): New function.
+ (modref_merge_call_site_flags): New function.
+ (modref_propagate_flags_in_scc): New function.
+ (pass_ipa_modref::execute): Use modref_propagate_flags_in_scc
+ and modref_propagate_dump_scc; delete escape_summaries.
+ (ipa_modref_c_finalize): Remove escape_summaries.
+ * ipa-modref.h (modref_summary): Update prototype of useful_p.
+ * params.opt (param=modref-max-escape-points): New param.
+ * doc/invoke.texi (modref-max-escape-points): Document.
+
+2020-11-16 Jan Hubicka <jh@suse.cz>
+
+ PR middle-end/97840
+ * ipa-modref.c (analyze_ssa_name_flags): Skip clobbers if inlining
+ is done.
+ * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Make stmt gcall;
+ skip const calls and unused arguments.
+ (warn_uninitialized_vars): Update prototype.
+
+2020-11-16 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_gather_slp_loads): Declare.
+ * tree-vect-loop.c (vect_analyze_loop_2): Call
+ vect_gather_slp_loads.
+ * tree-vect-slp.c (vect_build_slp_instance): Do not gather
+ SLP loads here.
+ (vect_gather_slp_loads): Remove wrapper, new function.
+ (vect_slp_analyze_bb_1): Call it.
+
+2020-11-16 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-loop-im.c (analyze_memory_references): Add
+ store_motion parameter and elide unnecessary work.
+ (tree_ssa_lim_initialize): Likewise.
+ (loop_invariant_motion_in_fun): Pass down store_motion.
+
+2020-11-16 Martin Liska <mliska@suse.cz>
+
+ * params.opt: All modref parameters miss Optimization and Param
+ keyword as seen in testsuite failure.
+
+2020-11-16 Jan Hubicka <jh@suse.cz>
+
+ * params.opt (-param=modref-max-depth=): Add missing full stop.
+
+2020-11-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * common.opt (fprofile-info-section): New.
+ * coverage.c (build_gcov_info_var_registration): New.
+ (coverage_obj_init): Evaluate profile_info_section and use
+ build_gcov_info_var_registration().
+ * doc/invoke.texi (fprofile-info-section): Document.
+ * opts.c (common_handle_option): Process fprofile-info-section
+ option.
+
+2020-11-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97838
+ * tree-vect-slp.c (vect_slp_build_vertices): Properly handle
+ not backwards reachable cycles.
+ (vect_optimize_slp): Check a node is leaf before marking it
+ visited.
+
+2020-11-16 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/97736
+ * tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement):
+ Prefer bit tests.
+
+2020-11-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97835
+ * tree-vect-loop.c (vectorizable_induction): Convert step
+ scalars rather than step vector.
+
+2020-11-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97830
+ * tree-ssa-sccvn.c (vn_reference_eq): Check for incomplete
+ types before comparing TYPE_SIZE.
+
+2020-11-16 Cui,Lili <lili.cui@intel.com>
+
+ * config/i386/i386.h: Add PREFETCHW to march=broadwell.
+ * doc/invoke.texi: Put PREFETCHW back to relation arch.
+
+2020-11-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_output_labelref): Don't process mspabi
+ hwmult library function names into GCC-style names.
+
+2020-11-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_use_16bit_hwmult): New.
+ (use_32bit_hwmult): Rename to..
+ (msp430_use_32bit_hwmult): ..this.
+ (msp430_muldiv_costs): Use msp430_use_16bit_hwmult and
+ msp430_use_32bit_hwmult.
+ (msp430_expand_helper): Use msp430_use_16bit_hwmult and
+ msp430_use_32bit_hwmult.
+ (msp430_output_labelref): Use msp430_use_32bit_hwmult.
+
+2020-11-15 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_rtx_costs): Use `rtx_code' rather than
+ `int' for `code'.
+
+2020-11-15 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_output_int_add) <E_DImode>: Fix a typo
+ in NO_EXTERNAL_INDIRECT_ADDRESS.
+
+2020-11-15 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/vax/vax.c (vax_output_int_add) <E_SImode>: Also check
+ `operands[2]' for being symbolic with PIC rather than checking
+ `operands[1]' twice.
+
+2020-11-15 Aldy Hernandez <aldyh@redhat.com>
+
+ * vr-values.c (vr_values::extract_range_builtin): Rename to...
+ (vr_values::extract_range_from_ubsan_builtin): ...this.
+ Remove everything but UBSAN code.
+ (vr_values::extract_range_basic): Call ranger version for
+ everything except UBSAN built-ins.
+ * vr-values.h (class vr_values): Rename extract_range_builtin to
+ extract_range_from_ubsan_builtin.
+
+2020-11-15 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * lra.c (lra_process_new_insns): Don't put reload insns in the
+ last empty BB.
+
+2020-11-15 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (analyze_ssa_name_flags): Make return to clear
+ EAF_UNUSED flag.
+
+2020-11-14 Jan Hubicka <jh@suse.cz>
+
+ * gimple.c: Include ipa-modref-tree.h and ipa-modref.h.
+ (gimple_call_arg_flags): Use modref to determine flags.
+ * ipa-modref.c: Include gimple-ssa.h, tree-phinodes.h,
+ tree-ssa-operands.h, stringpool.h and tree-ssanames.h.
+ (analyze_ssa_name_flags): Declare.
+ (modref_summary::useful_p): Summary is also useful if arg flags are
+ known.
+ (dump_eaf_flags): New function.
+ (modref_summary::dump): Use it.
+ (get_modref_function_summary): Be read for current_function_decl
+ being NULL.
+ (memory_access_to): New function.
+ (deref_flags): New function.
+ (call_lhs_flags): New function.
+ (analyze_parms): New function.
+ (analyze_function): Use it.
+ * ipa-modref.h (struct modref_summary): Add arg_flags.
+ * doc/invoke.texi (ipa-modref-max-depth): Document.
+ * params.opt (ipa-modref-max-depth): New param.
+
+2020-11-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/97599
+ * dwarf2out.c (gen_subprogram_die): Call
+ gen_unspecified_parameters_die even if not early dwarf, but only
+ if subr_die is a newly created DIE.
+
+2020-11-14 Monk Chiang <monk.chiang@sifive.com>
+
+ PR target/97682
+ * config/riscv/riscv.h (RISCV_PROLOGUE_TEMP_REGNUM): Change register
+ to t0.
+ (RISCV_CALL_ADDRESS_TEMP_REGNUM): New Marco, define t1 register.
+ (RISCV_CALL_ADDRESS_TEMP): Use it for call instructions.
+ * config/riscv/riscv.c (riscv_legitimize_call_address): Use
+ RISCV_CALL_ADDRESS_TEMP.
+ (riscv_compute_frame_info): Change temporary register to t0 form t1.
+ (riscv_trampoline_init): Adjust comment.
+
+2020-11-14 Jim Wilson <jimw@sifive.com>
+ cooper.joshua <cooper.joshua@linux.alibaba.com>
+
+ * config/riscv/riscv.c (riscv_asan_shadow_offset): New.
+ (TARGET_ASAN_SHADOW_OFFSET): New.
+ * doc/tm.texi: Regenerated.
+ * target.def (asan_shadow_offset); Mention that it can return zero.
+ * toplev.c (process_options): Check for and handle zero return from
+ targetm.asan_shadow_offset call.
+
+2020-11-14 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (gimplify_omp_for): Add OMP_CLAUSE_ALLOCATE_ALLOCATOR
+ decls as firstprivate on task clauses even when allocate clause
+ decl is not lastprivate.
+ * omp-low.c (install_var_field): Don't dereference omp_is_reference
+ types if mask is 33 rather than 1.
+ (scan_sharing_clauses): Populate allocate_map even for task
+ constructs. For now remove it back for variables mentioned in
+ reduction and in_reduction clauses on task/taskloop constructs
+ or on VLA task firstprivates. For firstprivate on task construct,
+ install the var field into field_map with by_ref and 33 instead
+ of false and 1 if mentioned in allocate clause.
+ (lower_private_allocate): Set TREE_THIS_NOTRAP on the created
+ MEM_REF.
+ (lower_rec_input_clauses): Handle allocate for task firstprivatized
+ non-VLA variables.
+ (create_task_copyfn): Likewise.
+
+2020-11-13 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-alias.c (ao_ref_base_alias_ptr_type): Remove accidental
+ commit.
+ (ao_ref_alias_ptr_type): Remove accidental commit.
+
+2020-11-13 Kwok Cheung Yeung <kcy@codesourcery.com>
+
+ * omp-oacc-kernels-decompose.cc (maybe_build_inner_data_region):
+ Use langhook instead of accessing language-specific decl
+ information.
+
+2020-11-13 Gergö Barany <gergo@codesourcery.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-kernels-decompose.cc: New.
+ * Makefile.in (OBJS): Add it.
+ * passes.def: Instantiate it.
+ * tree-pass.h (make_pass_omp_oacc_kernels_decompose): Declare.
+ * flag-types.h (enum openacc_kernels): Add.
+ * doc/invoke.texi (-fopenacc-kernels): Document.
+ * gimple.h (enum gf_mask): Add
+ 'GF_OMP_TARGET_KIND_OACC_PARALLEL_KERNELS_PARALLELIZED',
+ 'GF_OMP_TARGET_KIND_OACC_PARALLEL_KERNELS_GANG_SINGLE',
+ 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
+ (is_gimple_omp_oacc, is_gimple_omp_offloaded): Handle these.
+ * gimple-pretty-print.c (dump_gimple_omp_target): Likewise.
+ * omp-expand.c (expand_omp_target, build_omp_regions_1)
+ (omp_make_gimple_edges): Likewise.
+ * omp-low.c (scan_sharing_clauses, scan_omp_for)
+ (check_omp_nesting_restrictions, lower_oacc_reductions)
+ (lower_oacc_head_mark, lower_omp_target): Likewise.
+ * omp-offload.c (execute_oacc_device_lower): Likewise.
+
+2020-11-13 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_sharing_clauses, scan_omp_for)
+ (lower_oacc_reductions, lower_omp_target): More explicit checking
+ of which OMP constructs we're expecting.
+
+2020-11-13 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-expand.c (expand_omp_target): Attach an attribute to all
+ outlined OpenACC compute regions.
+ * omp-offload.c (execute_oacc_device_lower): Adjust.
+
+2020-11-13 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_summaries::insert,
+ modref_summaries_lto::insert): Remove summary if ipa-modref is disabled.
+
+2020-11-13 Jan Hubicka <jh@suse.cz>
+
+ * attr-fnspec.h (attr_fnspec::arg_readonly_p): Accept '1'...'9'.
+
+2020-11-13 Peter Jones <pjones@redhat.com>
+
+ * doc/extend.texi: Clarify the documentation for the ms_abi
+ function attribute.
+
+2020-11-13 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range.h (gimple_range_handler): Cast to gimple stmt
+ kinds before asking for code and type.
+ * gimple.h (gimple_expr_code): Call gassign and gcond routines
+ to get their expr_code.
+
+2020-11-13 Jason Merrill <jason@redhat.com>
+
+ * dwarf2out.c (gen_enumeration_type_die): Call
+ equate_decl_number_to_die for enumerators.
+ (gen_member_die): Don't move enumerators to their
+ enclosing class.
+ (dwarf2out_imported_module_or_decl_1): Allow importing
+ individual enumerators.
+ (force_decl_die): Handle CONST_DECL.
+
+2020-11-13 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * cfgexpand.c (expand_asm_stmt): Output asm goto with outputs too.
+ Place insns after asm goto on edges.
+ * doc/extend.texi: Reflect the changes in asm goto documentation.
+ * gimple.c (gimple_build_asm_1): Remove an assert checking output
+ absence for asm goto.
+ * gimple.h (gimple_asm_label_op, gimple_asm_set_label_op): Take
+ possible asm goto outputs into account.
+ * ira.c (ira): Remove critical edges for potential asm goto output
+ reloads.
+ (ira_nullify_asm_goto): New function.
+ * ira.h (ira_nullify_asm_goto): New prototype.
+ * lra-assigns.c (lra_split_hard_reg_for): Use ira_nullify_asm_goto.
+ Check that splitting is done inside a basic block.
+ * lra-constraints.c (curr_insn_transform): Permit output reloads
+ for any jump insn.
+ * lra-spills.c (lra_final_code_change): Remove USEs added in ira
+ for asm gotos.
+ * lra.c (lra_process_new_insns): Place output reload insns after
+ jumps in the beginning of destination BBs.
+ * reload.c (find_reloads): Report error for asm gotos with
+ outputs. Modify them to keep CFG consistency to avoid crashes.
+ * tree-into-ssa.c (rewrite_stmt): Don't put debug stmt after asm
+ goto.
+
+2020-11-13 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-low.c (scan_sharing_clauses): For now remove for reduction
+ clauses with inscan or task modifiers decl from allocate_map.
+ (lower_private_allocate): Handle TYPE_P (new_var).
+ (lower_rec_input_clauses): Handle allocate clause for C/C++ array
+ reductions.
+
+2020-11-13 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/97816
+ * ipa-cp.c (value_topo_info<valtype>::propagate_effects): Use
+ safe_add instead of a simple addition.
+
+2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (TARGET_INSN_COST): Define.
+ (msp430_insn_cost): New function.
+ * config/msp430/msp430.h (BRANCH_COST): Define.
+ (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.
+
+2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430-protos.h (msp430x_extendhisi): Return int
+ instead of char *.
+ (msp430_output_asm_shift_insns): Likewise.
+ Add new return_length argument.
+ (msp430x_insn_required): Add prototype.
+ * config/msp430/msp430.c (msp430_output_asm_shift_insns): Return the
+ total length, in bytes, of the emitted instructions.
+ (msp430x_insn_required): New function.
+ (msp430x_extendhisi): Return the total length, in bytes, of the
+ emitted instructions.
+ * config/msp430/msp430.h (ADJUST_INSN_LENGTH): Define.
+ * config/msp430/msp430.md: New define_attr "type".
+ New define_attr "extension".
+ New define_attr "length_multiplier".
+ New define_attr "extra_length".
+ Rewrite define_attr "length".
+ Set type, extension, length, length_multiplier or extra_length insn
+ attributes on all insns, as appropriate.
+ (andneghi3): Rewrite using constraints instead of C code to decide
+ output insns.
+ * config/msp430/predicates.md (msp430_cheap_operand): New predicate.
+ (msp430_high_memory_operand): New predicate.
+
+2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (use_helper_for_const_shift): Add forward
+ declaration.
+ Remove unused argument.
+ (struct msp430_multlib_costs): New struct.
+ (msp430_is_mem_indirect): New function.
+ (msp430_costs): Likewise.
+ (msp430_shift_costs): Likewise.
+ (msp430_muldiv_costs): Likewise.
+ (msp430_get_inner_dest_code): Likewise.
+ (msp430_single_op_cost): Likewise.
+ (msp430_rtx_costs): Rewrite from scratch.
+ (msp430_expand_shift): Adjust use_helper_for_const_shift call.
+
+2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (struct single_op_cost): New struct.
+ (struct double_op_cost): Likewise.
+ (TARGET_REGISTER_MOVE_COST): Don't define but add comment.
+ (TARGET_MEMORY_MOVE_COST): Define to...
+ (msp430_memory_move_cost): New function.
+ (BRANCH_COST): Don't define but add comment.
+
+2020-11-13 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c: Include tree-ssa-alias-compare.h.
+ (find_checker::func_checker): Initialize m_tbaa.
+ (func_checker::hash_operand): Use hash_ao_ref for memory accesses.
+ (func_checker::compare_operand): Use compare_ao_refs for memory
+ accesses.
+ (func_checker::cmopare_gimple_assign): Do not check LHS types
+ of memory stores.
+ * ipa-icf-gimple.h (func_checker): Derive from ao_compare;
+ add m_tbaa.
+ * ipa-icf.c: Include tree-ssa-alias-compare.h.
+ (sem_function::equals_private): Update call of
+ func_checker::func_checker.
+ * ipa-utils.h (lto_streaming_expected_p): New inline
+ predicate.
+ * tree-ssa-alias-compare.h: New file.
+ * tree-ssa-alias.c: Include tree-ssa-alias-compare.h
+ and bultins.h
+ (view_converted_memref_p): New function.
+ (types_equal_for_same_type_for_tbaa_p): New function.
+ (ao_ref_alias_ptr_type, ao_ref_base_alias_ptr_type): New functions.
+ (ao_compare::compare_ao_refs): New member function.
+ (ao_compare::hash_ao_ref): New function
+ * tree-ssa-alias.h (ao_ref_base_alias_ptr_type,
+ ao_ref_alias_ptr_type): Declare.
+
+2020-11-13 Jan Hubicka <jh@suse.cz>
+
+ * ipa-icf-gimple.c: Include gimple-walk.h.
+ (func_checker::compare_ssa_name): Update call of compare_operand.
+ (func_checker::hash_operand): Fix comment and add variant taking
+ operand_access_type parameter.
+ (func_checker::compare_operand): Add operand_access_type parameter.
+ (func_checker::compare_asm_inputs_outputs): Add
+ operand_access_type_map parameter; update use of
+ func_checker::compare_operand.
+ (func_checker::compare_gimple_call): Update use of
+ func_checker::compare_operand.
+ (func_checker::compare_gimple_assign): Likewise.
+ (func_checker::compare_gimple_cond): Likewise.
+ (func_checker::compare_gimple_switch): Likewise.
+ (func_checker::compare_gimple_return): Likewise.
+ (func_checker::compare_gimple_goto): Likewise.
+ (func_checker::compare_gimple_asm): Likewise.
+ (visit_load_store): New static functio.
+ (func_checker::classify_operands): New member function.
+ (func_checker::get_operand_access_type): New member function.
+ * ipa-icf-gimple.h (func_checker::operand_access_type): New enum
+ (func_checker::operand_access_type_map): New typedef.
+ (func_checker::compare_operand): Update prototype.
+ (func_checker::compare_asm_inputs_outputs): Likewise.
+ (func_checker::cleassify_operands): Declare.
+ (func_checker::get_operand_access_type): Declare.
+ (func_checker::hash_operand): New variant with operand_access_type.
+ * ipa-icf.c (sem_function::hash_stmt): Update uses of hash_operand.
+ (sem_function::compare_phi_node): Update use of compare_operand.
+
+2020-11-13 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/aarch-common.c (aarch_accumulator_forwarding): Use
+ RTL predicates where possible.
+ * config/arm/arm.c (legitimate_pic_operand_p)
+ (legitimize_pic_address, arm_is_segment_info_known)
+ (can_avoid_literal_pool_for_label_p)
+ (thumb1_legitimate_address_p, arm_legitimize_address)
+ (arm_tls_referenced_p, thumb_legitimate_constant_p)
+ (REG_OR_SUBREG_REG, thumb1_rtx_costs, thumb1_size_rtx_costs)
+ (arm_adjust_cost, arm_coproc_mem_operand_wb)
+ (neon_vector_mem_operand, neon_struct_mem_operand)
+ (symbol_mentioned_p, label_mentioned_p, )
+ (load_multiple_sequence, store_multiple_sequence)
+ (arm_select_cc_mode, arm_reload_in_hi, arm_reload_out_hi)
+ (mem_ok_for_ldrd_strd, arm_emit_call_insn, output_move_neon)
+ (arm_attr_length_move_neon, arm_assemble_integer)
+ (arm_emit_coreregs_64bit_shift, arm_valid_symbolic_address_p)
+ (extract_base_offset_in_addr, fusion_load_store): Likewise.
+
+2020-11-13 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range.cc: (gimple_ranger::range_of_range_op): Check for
+ ADDR_EXPR and call range_of_address.
+ (gimple_ranger::range_of_address): Rename from
+ range_of_non_trivial_assignment and match vrp_stmt_computes_nonzero.
+ * gimple-range.h: (range_of_address): Renamed.
+ * range-op.cc: (pointer_table): Add INTEGER_CST handler.
+
+2020-11-13 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/94406
+ * tree-ssa-loop-im.c (tree_ssa_lim): Renamed to
+ loop_invariant_motion_in_fun, added a parameter to control store
+ motion.
+ (pass_lim::execute): Adjust call to tree_ssa_lim, now
+ loop_invariant_motion_in_fun.
+ * tree-ssa-loop-manip.h (loop_invariant_motion_in_fun): Declare.
+ * gimple-loop-interchange.cc (pass_linterchange::execute): Call
+ loop_invariant_motion_in_fun if any interchange has been done.
+
+2020-11-13 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (vn_phi_compute_hash): Always hash the
+ number of predecessors. Hash the block number also for
+ loop header PHIs.
+ (expressions_equal_p): Short-cut SSA name compares, remove
+ test for NULL operands.
+ (vn_phi_eq): Cache number of predecessors, change inlined
+ test from expressions_equal_p.
+
+2020-11-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * doc/extend.texi: Don't try to line-wrap an @r command.
+
+2020-11-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97812
+ * tree-vrp.c (register_edge_assert_for_2): Extend the range
+ according to its sign before seeing whether it fits.
+
+2020-11-13 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/aarch64.c (tls_symbolic_operand_type)
+ (aarch64_load_symref_appropriately, aarch64_mov128_immediate)
+ (aarch64_expand_mov_immediate)
+ (aarch64_maybe_expand_sve_subreg_move)
+ (aarch64_tls_referenced_p, aarch64_cannot_force_const_mem)
+ (aarch64_base_register_rtx_p, aarch64_classify_index)
+ (aarch64_classify_address, aarch64_symbolic_address_p)
+ (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p)
+ (aarch64_can_const_movi_rtx_p, aarch64_select_cc_mode)
+ (aarch64_print_operand, aarch64_label_mentioned_p)
+ (aarch64_secondary_reload, aarch64_preferred_reload_class)
+ (aarch64_address_cost, aarch64_tls_symbol_p)
+ (aarch64_classify_symbol, aarch64_legitimate_pic_operand_p)
+ (aarch64_legitimate_constant_p)
+ (aarch64_sve_float_arith_immediate_p)
+ (aarch64_sve_float_mul_immediate_p, aarch64_mov_operand_p)
+ (fusion_load_store): Use RTL operands where possible.
+
+2020-11-13 Sudakshina Das <sudi.das@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_expand_setmem): New
+ declaration.
+ * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case for
+ E_V16QImode.
+ (aarch64_set_one_block_and_progress_pointer): New helper for
+ aarch64_expand_setmem.
+ (aarch64_expand_setmem): Define the expansion for memset.
+ * config/aarch64/aarch64.h (CLEAR_RATIO): Tweak to favor
+ aarch64_expand_setmem when allowed and profitable.
+ (SET_RATIO): Likewise.
+ * config/aarch64/aarch64.md: Define pattern for setmemdi.
+
+2020-11-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR objc/90707
+ * doc/extend.texi: Document the objc_nullability attribute.
+
+2020-11-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR objc/77404
+ * doc/extend.texi: Document the objc_root_class attribute.
+ * doc/invoke.texi: Document -Wobjc-root-class.
+
+2020-11-13 Richard Biener <rguenther@suse.de>
+
+ * cfgexpand.c (gimple_assign_rhs_to_tree): Use
+ gimple_assign_rhs_class.
+ (expand_gimple_stmt_1): Likewise.
+ * gimplify-me.c (gimple_regimplify_operands): Use
+ gimple_assign_single_p.
+ * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
+ Remove redundant compare.
+ (func_checker::compare_gimple_cond): Use gimple_cond_code.
+ * tree-ssa-tail-merge.c (gimple_equal_p): Likewise.
+ * predict.c (predict_loops): Use gimple_assign_rhs_code.
+
+2020-11-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (class vrp_folder): Make visit_stmt, visit_phi,
+ and m_vr_values private.
+ (vrp_folder::vrp_evaluate_conditional): Remove.
+ (vrp_folder::vrp_simplify_stmt_using_ranges): Remove.
+ (vrp_folder::fold_predicate_in): Inline
+ vrp_evaluate_conditional and vrp_simplify_stmt_using_ranges.
+ (vrp_folder::fold_stmt): Same.
+
+2020-11-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (class vrp_prop): Rename vr_values to m_vr_values.
+ (vrp_prop::vrp_prop): New.
+ (vrp_prop::initialize): Rename vr_values to m_vr_values.
+ (vrp_prop::visit_stmt): Same.
+ (vrp_prop::visit_phi): Same.
+ (vrp_prop::finalize): Same.
+ (execute_vrp): Instantiate vrp_vr_values and pass it to folder
+ and propagator.
+
+2020-11-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (class vrp_prop): Move entire class...
+ (class vrp_folder): ...before here.
+
+2020-11-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (identify_jump_threads): Refactor to..
+ (vrp_jump_threader::vrp_jump_threader): ...here
+ (vrp_jump_threader::~vrp_jump_threader): ...and here.
+ (vrp_jump_threader::after_dom_children): Rename vr_values to
+ m_vr_values.
+ (execute_vrp): Use vrp_jump_threader.
+
+2020-11-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (struct assert_locus): Move.
+ (class vrp_insert): Rename to vrp_asserts.
+ (vrp_insert::build_assert_expr_for): Move to vrp_asserts.
+ (fp_predicate): Same.
+ (vrp_insert::dump): Same.
+ (vrp_insert::register_new_assert_for): Same.
+ (extract_code_and_val_from_cond_with_ops): Move.
+ (vrp_insert::finish_register_edge_assert_for): Move to vrp_asserts.
+ (maybe_set_nonzero_bits): Move.
+ (vrp_insert::find_conditional_asserts): Move to vrp_asserts.
+ (stmt_interesting_for_vrp): Move.
+ (struct case_info): Move.
+ (compare_case_labels): Move.
+ (lhs_of_dominating_assert): Move.
+ (find_case_label_index): Move.
+ (find_case_label_range): Move.
+ (class vrp_asserts): New.
+ (vrp_asserts::build_assert_expr_for): Rename from vrp_insert.
+ (vrp_asserts::dump): Same.
+ (vrp_asserts::register_new_assert_for): Same.
+ (vrp_asserts::finish_register_edge_assert_for): Same.
+ (vrp_asserts::find_conditional_asserts): Same.
+ (vrp_asserts::compare_case_labels): Same.
+ (vrp_asserts::find_switch_asserts): Same.
+ (vrp_asserts::find_assert_locations_in_bb): Same.
+ (vrp_asserts::find_assert_locations): Same.
+ (vrp_asserts::process_assert_insertions_for): Same.
+ (vrp_asserts::compare_assert_loc): Same.
+ (vrp_asserts::process_assert_insertions): Same.
+ (vrp_asserts::insert_range_assertions): Same.
+ (vrp_asserts::all_imm_uses_in_stmt_or_feed_cond): Same.
+ (vrp_asserts::remove_range_assertions): Same.
+ (class vrp_prop): Move.
+ (all_imm_uses_in_stmt_or_feed_cond): Move.
+ (vrp_prop::vrp_initialize): Move.
+ (class vrp_folder): Move.
+ (vrp_folder::fold_predicate_in): Move.
+ (vrp_folder::fold_stmt): Move.
+ (vrp_prop::initialize): Move.
+ (vrp_prop::visit_stmt): Move.
+ (enum ssa_prop_result): Move.
+ (vrp_prop::visit_phi): Move.
+ (vrp_prop::finalize): Move.
+ (class vrp_dom_walker): Rename to...
+ (class vrp_jump_threader): ...this.
+ (vrp_jump_threader::before_dom_children): Rename from
+ vrp_dom_walker.
+ (simplify_stmt_for_jump_threading): Rename to...
+ (vrp_jump_threader::simplify_stmt): ...here.
+ (vrp_jump_threader::after_dom_children): Same.
+ (identify_jump_threads): Move.
+ (vrp_prop::vrp_finalize): Move array bounds setup code to...
+ (execute_vrp): ...here.
+
+2020-11-13 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range.h (gimple_range_handler): Use gimple_assign and
+ gimple_cond routines to get type and code.
+ * range-op.cc (range_op_handler): Check for integral types.
+
+2020-11-12 Nelson Chu <nelson.chu@sifive.com>
+
+ * configure: Regenerated.
+ * configure.ac: If ifunc was supported in the binutils for
+ linux toolchain, then set enable_gnu_indirect_function to yes.
+
+2020-11-12 Joseph Myers <joseph@codesourcery.com>
+
+ * doc/cpp.texi (__has_attribute): Document when scopes are allowed
+ for C.
+ (__has_c_attribute): New.
+
+2020-11-12 Jakub Jelinek <jakub@redhat.com>
+
+ * builtin-types.def (BT_FN_PTR_SIZE_SIZE_PTRMODE): New function type.
+ * omp-builtins.def (BUILT_IN_GOACC_DECLARE): Move earlier.
+ (BUILT_IN_GOMP_ALLOC, BUILT_IN_GOMP_FREE): New builtins.
+ * gimplify.c (gimplify_scan_omp_clauses): Force allocator into a
+ decl if it is not NULL, INTEGER_CST or decl.
+ (gimplify_adjust_omp_clauses): Clear GOVD_EXPLICIT on explicit clauses
+ which are being removed. Remove allocate clauses for variables not seen
+ if they are private, firstprivate or linear too. Call
+ omp_notice_variable on the allocator otherwise.
+ (gimplify_omp_for): Handle iterator vars mentioned in allocate clauses
+ similarly to non-is_gimple_reg iterators.
+ * omp-low.c (struct omp_context): Add allocate_map field.
+ (delete_omp_context): Delete it.
+ (scan_sharing_clauses): Fill it from allocate clauses. Remove it
+ if mentioned also in shared clause.
+ (lower_private_allocate): New function.
+ (lower_rec_input_clauses): Handle allocate clause for privatized
+ variables, except for task/taskloop, C/C++ array reductions for now
+ and task/inscan variables.
+ (lower_send_shared_vars): Don't consider variables in allocate_map
+ as shared.
+ * omp-expand.c (expand_omp_for_generic, expand_omp_for_static_nochunk,
+ expand_omp_for_static_chunk): Use expand_omp_build_assign instead of
+ gimple_build_assign + gsi_insert_after.
+ * builtins.c (builtin_fnspec): Handle BUILTIN_GOMP_ALLOC and
+ BUILTIN_GOMP_FREE.
+ * tree-ssa-ccp.c (evaluate_stmt): Handle BUILTIN_GOMP_ALLOC.
+ * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Handle
+ BUILTIN_GOMP_ALLOC.
+ (mark_all_reaching_defs_necessary_1): Handle BUILTIN_GOMP_ALLOC
+ and BUILTIN_GOMP_FREE.
+ (propagate_necessity): Likewise.
+
+2020-11-12 Martin Jambor <mjambor@suse.cz>
+
+ * cgraphclones.c (cgraph_node::materialize_clone): Check that clone
+ info is not NULL before attempting to dump it.
+
+2020-11-12 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-cp.c (class ipcp_value_base): Change the type of
+ local_time_benefit and prop_time_benefit to sreal. Adjust the
+ constructor initializer.
+ (ipcp_lattice::print): Dump sreals.
+ (struct caller_statistics): Change the type of freq_sum to sreal.
+ (gather_caller_stats): Work with sreal freq_sum.
+ (incorporate_penalties): Work with sreal evaluation.
+ (good_cloning_opportunity_p): Adjusted for sreal sreal time_benefit
+ and freq_sum. Bail out if size_cost is INT_MAX.
+ (perform_estimation_of_a_value): Work with sreal time_benefit. Avoid
+ unnecessary capping.
+ (estimate_local_effects): Pass sreal time benefit to
+ good_cloning_opportunity_p without capping it. Adjust dumping.
+ (safe_add): If there can be overflow, return INT_MAX.
+ (propagate_effects): Work with sreal times.
+ (get_info_about_necessary_edges): Work with sreal frequencies.
+ (decide_about_value): Likewise and with sreal time benefits.
+
+2020-11-12 Marek Polacek <polacek@redhat.com>
+
+ * system.h (WARN_UNUSED_RESULT): Define for GCC >= 3.4.
+ * tree.h (maybe_wrap_with_location): Add WARN_UNUSED_RESULT.
+
+2020-11-12 Jan Hubicka <jh@suse.cz>
+
+ * fold-const.c (operand_compare::operand_equal_p): Compare field
+ offsets in operand_equal_p and OEP_ADDRESS_OF.
+ (operand_compare::hash_operand): Update.
+
+2020-11-12 Richard Biener <rguenther@suse.de>
+
+ * bitmap.c (bitmap_list_view): Restore head->current.
+ * tree-ssa-pre.c (pre_expr_DFS): Elide expr_visited bitmap.
+ Special-case value expression bitmaps with one element.
+ (bitmap_find_leader): Likewise.
+ (sorted_array_from_bitmap_set): Elide expr_visited bitmap.
+
+2020-11-12 Jan Hubicka <jh@suse.cz>
+
+ * attr-fnspec.h: Update topleve comment.
+ (attr_fnspec::arg_direct_p): Accept 1...9.
+ (attr_fnspec::arg_maybe_written_p): Reject 1...9.
+ (attr_fnspec::arg_copied_to_arg_p): New member function.
+ * builtins.c (builtin_fnspec): Update fnspec of block copy.
+ * tree-ssa-alias.c (attr_fnspec::verify): Update.
+
+2020-11-12 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (bitmap_value_replace_in_set): Return
+ whether we have changed anything.
+ (do_pre_regular_insertion): Get topologically sorted array
+ of expressions from caller.
+ (do_pre_partial_partial_insertion): Likewise.
+ (insert): Compute topologically sorted arrays of expressions
+ here and locally iterate actual insertion. Iterate only
+ when AVAIL_OUT of an already visited block source changed.
+
+2020-11-12 Alex Coplan <alex.coplan@arm.com>
+
+ PR target/97730
+ * config/aarch64/aarch64-sve2.md (@aarch64_sve2_bcax<mode>):
+ Change to define_expand, add missing (trivially-predicated) not
+ rtx to fix wrong code bug.
+ (*aarch64_sve2_bcax<mode>): New.
+
+2020-11-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97806
+ * tree-ssa-pre.c (pre_expr_DFS): New overload for visiting
+ values, visiting all leaders for a value. Use a bitmap
+ for visited values.
+ (sorted_array_from_bitmap_set): Walk over values and adjust.
+
+2020-11-12 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR target/97326
+ * config/s390/vector.md: Support vector floating point modes in
+ vec_cmp.
+
+2020-11-12 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/vector.md: Rename tointvec to TOINTVEC.
+ * config/s390/vx-builtins.md: Likewise.
+
+2020-11-12 Jason Merrill <jason@redhat.com>
+
+ PR debug/97060
+ * dwarf2out.c (gen_subprogram_die): It's a declaration
+ if DECL_INITIAL isn't set.
+
+2020-11-12 David Malcolm <dmalcolm@redhat.com>
+
+ PR tree-optimization/97424
+ * doc/invoke.texi (Static Analyzer Options): Add
+ -Wno-analyzer-shift-count-negative and
+ -Wno-analyzer-shift-count-overflow.
+ (-Wno-analyzer-shift-count-negative): New.
+ (-Wno-analyzer-shift-count-overflow): New.
+
+2020-11-11 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-protos.h (darwin_make_eh_symbol_indirect): New.
+ * config/darwin.c (darwin_make_eh_symbol_indirect): New. Use
+ Mach-O semantics for personality and ldsa indirections.
+ * config/darwin.h (TARGET_ASM_MAKE_EH_SYMBOL_INDIRECT): New.
+ * doc/tm.texi: Regenerate.
+ * doc/tm.texi.in: Add TARGET_ASM_MAKE_EH_SYMBOL_INDIRECT hook.
+ * dwarf2out.c (dwarf2out_do_cfi_startproc): If the target defines
+ a hook for indirecting personality and ldsa references, use that
+ otherwise default to ELF semantics.
+ * target.def (make_eh_symbol_indirect): New target hook.
+
+2020-11-11 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/88115
+ * common.opt (-fabi-version): Document =15.
+ * doc/invoke.texi (C++ Dialect Options): Likewise.
+
+2020-11-11 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97518
+ * tree.c (maybe_wrap_with_location): Don't add a location
+ wrapper around an artificial and ignored decl.
+
+2020-11-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97623
+ * tree-ssa-pre.c (create_expression_by_pieces): Guard
+ NEW_SETS access.
+ (insert_into_preds_of_block): Likewise.
+
+2020-11-11 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (pre_expr_DFS): New function.
+ (sorted_array_from_bitmap_set): Use it to properly
+ topologically sort the expression set.
+ (clean): Verify we've cleaned everything we should.
+
+2020-11-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97623
+ * params.opt (-param=max-pre-hoist-insert-iterations): Remove
+ again.
+ * doc/invoke.texi (max-pre-hoist-insert-iterations): Likewise.
+ * tree-ssa-pre.c (insert): Move hoist insertion after PRE
+ insertion iteration and do not iterate it.
+
+2020-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (@vcond_mask_<mode><vpred>): Extend
+ from SVE_FULL to SVE_ALL.
+ (*vcond_mask_<mode><vpred>): Likewise.
+ (@aarch64_sel_dup<mode>): Likewise.
+ (vcond<SVE_FULL:mode><v_int_equiv>): Extend to...
+ (vcond<SVE_ALL:mode><SVE_I:mode>): ...this, but requiring the
+ sizes of the container modes to match.
+ (vcondu<SVE_FULL:mode><v_int_equiv>): Extend to...
+ (vcondu<SVE_ALL:mode><SVE_I:mode>): ...this.
+ (vec_cmp<SVE_FULL_I:mode><vpred>): Extend to...
+ (vec_cmp<SVE_I:mode><vpred>): ...this.
+ (vec_cmpu<SVE_FULL_I:mode><vpred>): Extend to...
+ (vec_cmpu<SVE_I:mode><vpred>): ...this.
+ (@aarch64_pred_cmp<cmp_op><SVE_FULL_I:mode>): Extend to...
+ (@aarch64_pred_cmp<cmp_op><SVE_I:mode>): ...this.
+ (*cmp<cmp_op><SVE_FULL_I:mode>_cc): Extend to...
+ (*cmp<cmp_op><SVE_I:mode>_cc): ...this.
+ (*cmp<cmp_op><SVE_FULL_I:mode>_ptest): Extend to...
+ (*cmp<cmp_op><SVE_I:mode>_ptest): ...this.
+ (*cmp<cmp_op><SVE_FULL_I:mode>_and): Extend to...
+ (*cmp<cmp_op><SVE_I:mode>_and): ...this.
+
+2020-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * optabs-tree.c (expand_vec_cond_expr_p): Allow the compared values
+ and the selected values to have different mode sizes.
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Likewise.
+
+2020-11-11 Hongtao Liu <hongtao.liu@intel.com>
+ Hongyu Wang <hongyu.wang@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Detect AVXVNNI.
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA2_AVXVNNI_SET,
+ OPTION_MASK_ISA2_AVXVNNI_UNSET): New.
+ (OPTION_MASK_ISA2_AVX2_UNSET): Add AVXVNNI.
+ (ix86_hanlde_option): Handle -mavxvnni, unset avxvnni when
+ avx2 is disabled.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ Add FEATURE_AVXVNNI.
+ * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY
+ for avxvnni.
+ * config.gcc: Add avxvnniintrin.h.
+ * config/i386/avx512vnnivlintrin.h: Reimplement 128/256 bit non-mask
+ intrinsics with macros to support unified interface.
+ * config/i386/avxvnniintrin.h: New header file.
+ * config/i386/cpuid.h (bit_AVXVNNI): New.
+ * config/i386/i386-builtins.c (def_builtin): Handle AVXVNNI mask
+ for unified builtin.
+ * config/i386/i386-builtin.def (BDESC): Adjust AVX512VNNI
+ builtins for AVXVNNI.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __AVXVNNI__.
+ * config/i386/i386-expand.c (ix86_expand_builtin): Handle bisa
+ for AVXVNNI to support unified intrinsic name, since there is no
+ dependency between AVX512VNNI and AVXVNNI.
+ * config/i386/i386-options.c (isa2_opts): Add -mavxvnni.
+ (ix86_valid_target_attribute_inner_p): Handle avxnnni.
+ (ix86_option_override_internal): Ditto.
+ * config/i386/i386.h (TARGET_AVXVNNI, TARGET_AVXVNNI_P,
+ TARGET_AVXVNNI_P, PTA_AVXVNNI): New.
+ (PTA_SAPPHIRERAPIDS): Add AVX_VNNI.
+ (PTA_ALDERLAKE): Likewise.
+ * config/i386/i386.md ("isa"): Add avxvnni, avx512vnnivl.
+ ("enabled"): Adjust for avxvnni and avx512vnnivl.
+ * config/i386/i386.opt: Add option -mavxvnni.
+ * config/i386/immintrin.h: Include avxvnniintrin.h.
+ * config/i386/sse.md (vpdpbusd_<mode>): Adjust for AVXVNNI.
+ (vpdpbusds_<mode>): Likewise.
+ (vpdpwssd_<mode>): Likewise.
+ (vpdpwssds_<mode>): Likewise.
+ (vpdpbusd_v16si): New.
+ (vpdpbusds_v16si): Likewise.
+ (vpdpwssd_v16si): Likewise.
+ (vpdpwssds_v16si): Likewise.
+ * doc/invoke.texi: Document -mavxvnni.
+ * doc/extend.texi: Document avxvnni.
+ * doc/sourcebuild.texi: Document target avxvnni.
+
+2020-11-11 Martin Liska <mliska@suse.cz>
+
+ * tree.c (copy_node): Fix spelling.
+
+2020-11-11 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (phi_translate_set): Do not sort the
+ expression set topologically.
+
+2020-11-11 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::set): Early exit on VR_VARYING.
+
+2020-11-11 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for arithmetic operation intrinsics.
+
+2020-11-11 Strager Neds <strager.nds@gmail.com>
+
+ * cgraph.h (symtab_node::set_section_for_node): Declare new
+ overload.
+ (symtab_node::set_section_from_string): Rename from set_section.
+ (symtab_node::set_section_from_node): Declare.
+ * symtab.c (symtab_node::set_section_for_node): Define new
+ overload.
+ (symtab_node::set_section_from_string): Rename from set_section.
+ (symtab_node::set_section_from_node): Define.
+ (symtab_node::set_section): Call renamed set_section_from_string.
+ (symtab_node::set_section): Call new set_section_from_node.
+
+2020-11-11 Strager Neds <strager.nds@gmail.com>
+
+ * symtab.c (symtab_node::set_section_for_node): Extract reference
+ counting logic into ...
+ (retain_section_hash_entry): ... here (new function) and ...
+ (release_section_hash_entry): ... here (new function).
+
+2020-11-11 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.h (PTA_MOVDIRI, PTA_MOVDIR64B,
+ PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16, PTA_HRESET):
+ Formatting.
+
+2020-11-11 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390.h (HAVE_TF): Use opaque value when
+ GENERATOR_FILE is defined.
+
+2020-11-10 Strager Neds <strager.nds@gmail.com>
+
+ * cgraph.h (symtab_node::get_section): Constify.
+ (symtab_node::set_section): Declare new overload.
+ * symtab.c (symtab_node::set_section): Define new overload.
+ (symtab_node::copy_visibility_from): Use new overload of
+ symtab_node::set_section.
+ (symtab_node::resolve_alias): Same.
+ * tree.h (set_decl_section_name): Declare new overload.
+ * tree.c (set_decl_section_name): Define new overload.
+ * tree-emutls.c (get_emutls_init_templ_addr): Same.
+ * cgraphclones.c (cgraph_node::create_virtual_clone): Use new
+ overload of symtab_node::set_section.
+ (cgraph_node::create_version_clone_with_body): Same.
+ * trans-mem.c (ipa_tm_create_version): Same.
+
+2020-11-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::set): Early exit for poly ints.
+
+2020-11-10 Tobias Burnus <tobias@codesourcery.com>
+
+ * gimplify.c (gimplify_scan_omp_clauses, gimplify_omp_loop): Use 'do'
+ instead of 'for' in error messages for Fortran.
+ * omp-low.c (check_omp_nesting_restrictions): Likewise
+
+2020-11-10 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * opts.c (control_options_for_live_patching): Reform 'is incompatible
+ with' error messages to use a standard message with differing format
+ arguments.
+ (finish_options): Likewise.
+
+2020-11-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97769
+ * tree-vect-data-refs.c (vect_update_misalignment_for_peel):
+ Remove assert.
+
+2020-11-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97780
+ * tree-ssa-pre.c (fini_pre): Deal with added basic blocks
+ when freeing PHI_TRANS_TABLE.
+
+2020-11-10 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for tbl/tbx intrinsics.
+
+2020-11-10 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * gimplify.c (is_or_contains_p): New static helper function.
+ (omp_target_reorder_clauses): New function.
+ (gimplify_scan_omp_clauses): Add use of omp_target_reorder_clauses to
+ reorder clause list according to OpenMP 5.0 rules. Add handling of
+ GOMP_MAP_ATTACH_DETACH for OpenMP cases.
+ * omp-low.c (is_omp_target): New static helper function.
+ (scan_sharing_clauses): Add scan phase handling of GOMP_MAP_ATTACH/DETACH
+ for OpenMP cases.
+ (lower_omp_target): Add lowering handling of GOMP_MAP_ATTACH/DETACH for
+ OpenMP cases.
+
+2020-11-10 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390-modes.def (FPRX2): New mode.
+ * config/s390/s390-protos.h (s390_fma_allowed_p): New function.
+ * config/s390/s390.c (s390_fma_allowed_p): Likewise.
+ (s390_build_signbit_mask): Support 128-bit masks.
+ (print_operand): Support printing the second word of a TFmode
+ operand as vector register.
+ (constant_modes): Add FPRX2mode.
+ (s390_class_max_nregs): Return 1 for TFmode on z14+.
+ (s390_is_fpr128): New function.
+ (s390_is_vr128): Likewise.
+ (s390_can_change_mode_class): Use s390_is_fpr128 and
+ s390_is_vr128 in order to determine whether mode refers to a FPR
+ pair or to a VR.
+ (s390_emit_compare): Force TFmode operands into registers on
+ z14+.
+ * config/s390/s390.h (HAVE_TF): New macro.
+ (EXPAND_MOVTF): New macro.
+ (EXPAND_TF): Likewise.
+ * config/s390/s390.md (PFPO_OP_TYPE_FPRX2): PFPO_OP_TYPE_TF
+ alias.
+ (ALL): Add FPRX2.
+ (FP_ALL): Add FPRX2 for z14+, restrict TFmode to z13-.
+ (FP): Likewise.
+ (FP_ANYTF): New mode iterator.
+ (BFP): Add FPRX2 for z14+, restrict TFmode to z13-.
+ (TD_TF): Likewise.
+ (xde): Add FPRX2.
+ (nBFP): Likewise.
+ (nDFP): Likewise.
+ (DSF): Likewise.
+ (DFDI): Likewise.
+ (SFSI): Likewise.
+ (DF): Likewise.
+ (SF): Likewise.
+ (fT0): Likewise.
+ (bt): Likewise.
+ (_d): Likewise.
+ (HALF_TMODE): Likewise.
+ (tf_fpr): New mode_attr.
+ (type): New mode_attr.
+ (*cmp<mode>_ccz_0): Use type instead of mode with fsimp.
+ (*cmp<mode>_ccs_0_fastmath): Likewise.
+ (*cmptf_ccs): New pattern for wfcxb.
+ (*cmptf_ccsfps): New pattern for wfkxb.
+ (mov<mode>): Rename to mov<mode><tf_fpr>.
+ (signbit<mode>2): Rename to signbit<mode>2<tf_fpr>.
+ (isinf<mode>2): Renamed to isinf<mode>2<tf_fpr>.
+ (*TDC_insn_<mode>): Use type instead of mode with fsimp.
+ (fixuns_trunc<FP:mode><GPR:mode>2): Rename to
+ fixuns_trunc<FP:mode><GPR:mode>2<FP:tf_fpr>.
+ (fix_trunctf<mode>2): Rename to fix_trunctf<mode>2_fpr.
+ (floatdi<mode>2): Rename to floatdi<mode>2<tf_fpr>, use type
+ instead of mode with itof.
+ (floatsi<mode>2): Rename to floatsi<mode>2<tf_fpr>, use type
+ instead of mode with itof.
+ (*floatuns<GPR:mode><FP:mode>2): Use type instead of mode for
+ itof.
+ (floatuns<GPR:mode><FP:mode>2): Rename to
+ floatuns<GPR:mode><FP:mode>2<tf_fpr>.
+ (trunctf<mode>2): Rename to trunctf<mode>2_fpr, use type instead
+ of mode with fsimp.
+ (extend<DSF:mode><BFP:mode>2): Rename to
+ extend<DSF:mode><BFP:mode>2<BFP:tf_fpr>.
+ (<FPINT:fpint_name><BFP:mode>2): Rename to
+ <FPINT:fpint_name><BFP:mode>2<BFP:tf_fpr>, use type instead of
+ mode with fsimp.
+ (rint<BFP:mode>2): Rename to rint<BFP:mode>2<BFP:tf_fpr>, use
+ type instead of mode with fsimp.
+ (<FPINT:fpint_name><DFP:mode>2): Use type instead of mode for
+ fsimp.
+ (rint<DFP:mode>2): Likewise.
+ (trunc<BFP:mode><DFP_ALL:mode>2): Rename to
+ trunc<BFP:mode><DFP_ALL:mode>2<BFP:tf_fpr>.
+ (trunc<DFP_ALL:mode><BFP:mode>2): Rename to
+ trunc<DFP_ALL:mode><BFP:mode>2<BFP:tf_fpr>.
+ (extend<BFP:mode><DFP_ALL:mode>2): Rename to
+ extend<BFP:mode><DFP_ALL:mode>2<BFP:tf_fpr>.
+ (extend<DFP_ALL:mode><BFP:mode>2): Rename to
+ extend<DFP_ALL:mode><BFP:mode>2<BFP:tf_fpr>.
+ (add<mode>3): Rename to add<mode>3<tf_fpr>, use type instead of
+ mode with fsimp.
+ (*add<mode>3_cc): Use type instead of mode with fsimp.
+ (*add<mode>3_cconly): Likewise.
+ (sub<mode>3): Rename to sub<mode>3<tf_fpr>, use type instead of
+ mode with fsimp.
+ (*sub<mode>3_cc): Use type instead of mode with fsimp.
+ (*sub<mode>3_cconly): Likewise.
+ (mul<mode>3): Rename to mul<mode>3<tf_fpr>, use type instead of
+ mode with fsimp.
+ (fma<mode>4): Restrict using s390_fma_allowed_p.
+ (fms<mode>4): Restrict using s390_fma_allowed_p.
+ (div<mode>3): Rename to div<mode>3<tf_fpr>, use type instead of
+ mode with fdiv.
+ (neg<mode>2): Rename to neg<mode>2<tf_fpr>.
+ (*neg<mode>2_cc): Use type instead of mode with fsimp.
+ (*neg<mode>2_cconly): Likewise.
+ (*neg<mode>2_nocc): Likewise.
+ (*neg<mode>2): Likeiwse.
+ (abs<mode>2): Rename to abs<mode>2<tf_fpr>, use type instead of
+ mode with fdiv.
+ (*abs<mode>2_cc): Use type instead of mode with fsimp.
+ (*abs<mode>2_cconly): Likewise.
+ (*abs<mode>2_nocc): Likewise.
+ (*abs<mode>2): Likewise.
+ (*negabs<mode>2_cc): Likewise.
+ (*negabs<mode>2_cconly): Likewise.
+ (*negabs<mode>2_nocc): Likewise.
+ (*negabs<mode>2): Likewise.
+ (sqrt<mode>2): Rename to sqrt<mode>2<tf_fpr>, use type instead
+ of mode with fsqrt.
+ (cbranch<mode>4): Use FP_ANYTF instead of FP.
+ (copysign<mode>3): Rename to copysign<mode>3<tf_fpr>, use type
+ instead of mode with fsimp.
+ * config/s390/s390.opt (flag_vx_long_double_fma): New
+ undocumented option.
+ * config/s390/vector.md (V_HW): Add TF for z14+.
+ (V_HW2): Likewise.
+ (VFT): Likewise.
+ (VF_HW): Likewise.
+ (V_128): Likewise.
+ (tf_vr): New mode_attr.
+ (tointvec): Add TF.
+ (mov<mode>): Rename to mov<mode><tf_vr>.
+ (movetf): New dispatcher.
+ (*vec_tf_to_v1tf): Rename to *vec_tf_to_v1tf_fpr, restrict to
+ z13-.
+ (*vec_tf_to_v1tf_vr): New pattern for z14+.
+ (*fprx2_to_tf): Likewise.
+ (*mov_tf_to_fprx2_0): Likewise.
+ (*mov_tf_to_fprx2_1): Likewise.
+ (add<mode>3): Rename to add<mode>3<tf_vr>.
+ (addtf3): New dispatcher.
+ (sub<mode>3): Rename to sub<mode>3<tf_vr>.
+ (subtf3): New dispatcher.
+ (mul<mode>3): Rename to mul<mode>3<tf_vr>.
+ (multf3): New dispatcher.
+ (div<mode>3): Rename to div<mode>3<tf_vr>.
+ (divtf3): New dispatcher.
+ (sqrt<mode>2): Rename to sqrt<mode>2<tf_vr>.
+ (sqrttf2): New dispatcher.
+ (fma<mode>4): Restrict using s390_fma_allowed_p.
+ (fms<mode>4): Likewise.
+ (neg_fma<mode>4): Likewise.
+ (neg_fms<mode>4): Likewise.
+ (neg<mode>2): Rename to neg<mode>2<tf_vr>.
+ (negtf2): New dispatcher.
+ (abs<mode>2): Rename to abs<mode>2<tf_vr>.
+ (abstf2): New dispatcher.
+ (float<mode>tf2_vr): New forwarder.
+ (float<mode>tf2): New dispatcher.
+ (floatuns<mode>tf2_vr): New forwarder.
+ (floatuns<mode>tf2): New dispatcher.
+ (fix_trunctf<mode>2_vr): New forwarder.
+ (fix_trunctf<mode>2): New dispatcher.
+ (fixuns_trunctf<mode>2_vr): New forwarder.
+ (fixuns_trunctf<mode>2): New dispatcher.
+ (<FPINT:fpint_name><VF_HW:mode>2<VF_HW:tf_vr>): New pattern.
+ (<FPINT:fpint_name>tf2): New forwarder.
+ (rint<mode>2<tf_vr>): New pattern.
+ (rinttf2): New forwarder.
+ (*trunctfdf2_vr): New pattern.
+ (trunctfdf2_vr): New forwarder.
+ (trunctfdf2): New dispatcher.
+ (trunctfsf2_vr): New forwarder.
+ (trunctfsf2): New dispatcher.
+ (extenddftf2_vr): New pattern.
+ (extenddftf2): New dispatcher.
+ (extendsftf2_vr): New forwarder.
+ (extendsftf2): New dispatcher.
+ (signbittf2_vr): New forwarder.
+ (signbittf2): New dispatchers.
+ (isinftf2_vr): New forwarder.
+ (isinftf2): New dispatcher.
+ * config/s390/vx-builtins.md (*vftci<mode>_cconly): Use VF_HW
+ instead of VECF_HW, add missing constraint, add vw support.
+ (vftci<mode>_intcconly): Use VF_HW instead of VECF_HW.
+ (*vftci<mode>): Rename to vftci<mode>, use VF_HW instead of
+ VECF_HW, and vw support.
+ (vftci<mode>_intcc): Use VF_HW instead of VECF_HW.
+
+2020-11-10 Eric Botcazou <ebotcazou@adacore.com>
+
+ * range-op.cc (operator_logical_not::fold_range): Tidy up.
+ (operator_logical_not::op1_range): Call above method.
+ (operator_bitwise_not::fold_range): If the type is compatible
+ with boolean, call op_logical_not.fold_range.
+ (operator_bitwise_not::op1_range): If the type is compatible
+ with boolean, call op_logical_not.op1_range.
+
+2020-11-10 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (pre_expr_d::value_id): Add.
+ (constant_value_expressions): Turn into an array of pre_expr.
+ (get_or_alloc_expr_for_nary): New function.
+ (get_or_alloc_expr_for_reference): Likewise.
+ (add_to_value): For constant values only ever add a single
+ CONSTANT.
+ (get_expr_value_id): Return the new value_id member.
+ (vn_valnum_from_value_id): Split out and simplify constant
+ value id handling.
+ (get_or_alloc_expr_for_constant): Set the value_id member.
+ (phi_translate_1): Use get_or_alloc_expr_for_*.
+ (compute_avail): Likewise.
+ (bitmap_find_leader): Simplify constant value id handling.
+
+2020-11-10 Alex Coplan <alex.coplan@arm.com>
+
+ * doc/md.texi (Modifiers): Fix grammar in description of
+ earlyclobber constraint modifier.
+
+2020-11-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97764
+ * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): For
+ little-endian stores with negative pd.offset, subtract
+ BITS_PER_UNIT - amnt from size if amnt is non-zero.
+
+2020-11-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97760
+ * tree-vect-loop.c (check_reduction_path): Reject
+ reduction paths we do not handle in epilogue generation.
+
+2020-11-10 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97767
+ * value-range.cc (dump_bound_with_infinite_markers): Use
+ wi::min_value and wi::max_value.
+ (range_tests_strict_enum): New.
+ (range_tests): Call range_tests_strict_enum.
+ * value-range.h (irange::varying_p): Use wi::min_value
+ and wi::max_value.
+ (irange::set_varying): Same.
+ (irange::normalize_min_max): Remove comment.
+
+2020-11-10 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97567
+ * gimple-range-gori.cc: (gori_compute::logical_combine): False
+ OR operations should intersect the 2 results.
+ (gori_compute::compute_logical_operands_in_chain): If def chains
+ are outside the current basic block, don't follow them.
+
+2020-11-09 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (arc_split_move): Recognize vadd2 instructions.
+ * config/arc/arc.md (movdi_insn): Update pattern to use vadd2
+ instructions.
+ (movdf_insn): Likewise.
+ (maddhisi4): New pattern.
+ (umaddhisi4): Likewise.
+ * config/arc/simdext.md (mov<mode>_int): Update pattern to use
+ vadd2.
+ (sdot_prodv4hi): New pattern.
+ (udot_prodv4hi): Likewise.
+ (arc_vec_<V_US>mac_hi_v4hi): Update/renamed to
+ arc_vec_<V_US>mac_v2hiv2si.
+ (arc_vec_<V_US>mac_v2hiv2si_zero): New pattern.
+ * config/arc/constraints.md (Ral): Accumulator register
+ constraint.
+
+2020-11-09 Aldy Hernandez <aldyh@redhat.com>
+
+ * function-tests.c (test_ranges): Call range_op_tests.
+ * range-op.cc (build_range3): Move to value-range.cc.
+ (range3_tests): Same.
+ (int_range_max_tests): Same.
+ (multi_precision_range_tests): Same.
+ (range_tests): Same.
+ (operator_tests): Split up...
+ (range_op_tests): Split up...
+ (range_op_cast_tests): ...here.
+ (range_op_lshift_tests): ...here.
+ (range_op_rshift_tests): ...here.
+ (range_op_bitwise_and_tests): ...here.
+ * selftest.h (range_op_tests): New.
+ * value-range.cc (build_range3): New.
+ (range_tests_irange3): New.
+ (range_tests_int_range_max): New.
+ (range_tests_legacy): New.
+ (range_tests_misc): New.
+ (range_tests): New.
+
+2020-11-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97761
+ * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Remove
+ premature end of DFS walk.
+
+2020-11-09 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::swap_out_of_order_endpoints): Rewrite
+ into static function.
+ (irange::set): Cleanup redundant manipulations.
+ * value-range.h (irange::normalize_min_max): Modify object
+ in-place instead of modifying arguments.
+
+2020-11-09 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_expand_fcmla_builtin): Do not alter force_reg returned
+ register.
+
+2020-11-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97753
+ * tree-vect-loop.c (vectorizable_induction): Fill vec_steps
+ when CSEing inside the group.
+
+2020-11-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97746
+ * tree-vect-patterns.c (vect_determine_precisions): First walk PHIs.
+
+2020-11-09 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (get_representative_for): CSE VN_INFO calls.
+ (create_expression_by_pieces): Likewise.
+ (insert_into_preds_of_block): Likewsie.
+ (do_pre_regular_insertion): Likewsie.
+ * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_insert):
+ Likewise.
+ (eliminate_dom_walker::eliminate_stmt): Likewise.
+
+2020-11-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97765
+ * tree-ssa-pre.c (bb_bitmap_sets::phi_translate_table): Add.
+ (PHI_TRANS_TABLE): New macro.
+ (phi_translate_table): Remove.
+ (expr_pred_trans_d::pred): Remove.
+ (expr_pred_trans_d::hash): Simplify.
+ (expr_pred_trans_d::equal): Likewise.
+ (phi_trans_add): Adjust.
+ (phi_translate): Likewise. Remove hash-table expansion
+ detection and optimization.
+ (phi_translate_set): Allocate PHI_TRANS_TABLE here.
+ (init_pre): Adjsust.
+ (fini_pre): Free PHI_TRANS_TABLE.
+
+2020-11-09 Lili Cui <lili.cui@intel.com>
+
+ PR target/97685
+ * config/i386/i386.h:
+ (PTA_BROADWELL): Delete PTA_PRFCHW.
+ (PTA_SILVERMONT): Add PTA_PRFCHW.
+ (PTA_KNL): Add PTA_PREFETCHWT1.
+ (PTA_TREMONT): Add PTA_MOVDIRI, PTA_MOVDIR64B, PTA_CLDEMOTE and PTA_WAITPKG.
+ * doc/invoke.texi: Delete PREFETCHW for broadwell, skylake, knl, knm,
+ skylake-avx512, cannonlake, icelake-client, icelake-server, cascadelake,
+ cooperlake, tigerlake and sapphirerapids.
+ Add PREFETCHW for silvermont, goldmont, goldmont-plus and tremont.
+ Add XSAVEC and XSAVES for goldmont, goldmont-plus and tremont.
+ Add MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for tremont.
+ Add KEYLOCKER and HREST for alderlake.
+ Add AMX-BF16, AMX-TILE, AMX-INT8 and UINTR for sapphirerapids.
+ Add KEYLOCKER for tigerlake.
+
+2020-11-09 Kewen Lin <linkw@linux.ibm.com>
+
+ PR rtl-optimization/97705
+ * ira.c (ira): Refactor some regstat free/init/compute invocation
+ into lambda function regstat_recompute_for_max_regno, and call it
+ when max_regno increases as remove_scratches succeeds.
+
+2020-11-08 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Change
+ DECL_IS_BUILTIN -> DECL_IS_UNDECLARED_BUILTIN.
+
+2020-11-07 Martin Uecker <muecker@gwdg.de>
+
+ * doc/extend.texi: Document mixing labels and code.
+ * doc/invoke.texi: Likewise.
+
+2020-11-06 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't abuse
+ operands[].
+ (@tablejump<mode>_nospec): Ditto.
+
+2020-11-06 Peter Bergner <bergner@linux.ibm.com>
+
+ * config/rs6000/rs6000.h (BIGGEST_ALIGNMENT): Revert previous commit
+ so as not to break the ABI.
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Set the ABI
+ mandated alignment for __vector_pair and __vector_quad types.
+
+2020-11-06 Jeff Law <law@torsion.usersys.redhat.com>
+
+ PR target/91489
+ * config/i386/i386.md (simple_return): Also check
+ for ms_hook_prologue function attribute.
+ * config/i386/i386.c (ix86_can_use_return_insn_p):
+ Also check for ms_hook_prologue function attribute.
+ * config/i386/i386-protos.h (ix86_function_ms_hook_prologue): Declare.
+
+2020-11-06 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/96933
+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use
+ TARGET_POWERPC64 instead of TARGET_64BIT.
+
+2020-11-06 Joseph Myers <joseph@codesourcery.com>
+
+ * builtins.def (BUILT_IN_NANSD32, BUILT_IN_NANSD64)
+ (BUILT_IN_NANSD128): New built-in functions.
+ * fold-const-call.c (fold_const_call): Handle the new built-in
+ functions.
+ * doc/extend.texi (__builtin_nansd32, __builtin_nansd64)
+ (__builtin_nansd128): Document.
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document
+ fenv_exceptions_dfp.
+
+2020-11-06 Bin Cheng <bin.cheng@linux.alibaba.com>
+
+ * tree-ssa-uninit.c (find_var_cmp_const): New function.
+ (use_pred_not_overlap_with_undef_path_pred): Call above.
+
+2020-11-06 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-c.c: Allow for Darwin20 to correspond to macOS 11.
+ * config/darwin-driver.c: Likewise.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (expr_pred_trans_d): Modify so elements
+ are embedded rather than allocated. Remove hashval member,
+ make all members integers.
+ (phi_trans_add): Adjust accordingly.
+ (phi_translate): Likewise. Deal with re-allocation
+ of the table.
+
+2020-11-06 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97737
+ PR tree-optimization/97741
+ * gimple-range.cc: (gimple_ranger::range_of_stmt): Intersect newly
+ calculated ranges with the existing known global range.
+
+2020-11-06 Darius Galis <darius.galis@cyberthorstudios.com>
+
+ * config/rx/rx.md (CTRLREG_PC): Add.
+ * config/rx/rx.c (CTRLREG_PC): Add
+ (rx_expand_builtin_mvtc): Add warning: PC register cannot
+ be used as dest.
+
+2020-11-06 Nathan Sidwell <nathan@acm.org>
+
+ * tree.h (DECL_IS_BUILTIN): Rename to ...
+ (DECL_IS_UNDECLARED_BUILTIN): ... here. No need to use SOURCE_LOCUS.
+ * calls.c (maybe_warn_alloc_args_overflow): Adjust for rename.
+ * cfgexpand.c (pass_expand::execute): Likewise.
+ * dwarf2out.c (base_type_die, is_naming_typedef_decl): Likewise.
+ * godump.c (go_decl, go_type_decl): Likewise.
+ * print-tree.c (print_decl_identifier): Likewise.
+ * tree-pretty-print.c (dump_generic_node): Likewise.
+ * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Likewise.
+ * xcoffout.c (xcoff_assign_fundamental_type_number): Likewise.
+
+2020-11-06 David Candler <david.candler@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (TYPES_SHIFT2IMM): Add define.
+ (TYPES_SHIFT2IMM_UUSS): Add define.
+ (TYPES_USHIFT2IMM): Add define.
+ * config/aarch64/aarch64-simd.md
+ (aarch64_<sur>q<r>shr<u>n2_n<mode>): Add new insn for upper saturating shift right.
+ * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
+ * config/aarch64/arm_neon.h:
+ (vqrshrn_high_n_s16): Expand using intrinsic rather than inline asm.
+ (vqrshrn_high_n_s32): Likewise.
+ (vqrshrn_high_n_s64): Likewise.
+ (vqrshrn_high_n_u16): Likewise.
+ (vqrshrn_high_n_u32): Likewise.
+ (vqrshrn_high_n_u64): Likewise.
+ (vqrshrun_high_n_s16): Likewise.
+ (vqrshrun_high_n_s32): Likewise.
+ (vqrshrun_high_n_s64): Likewise.
+ (vqshrn_high_n_s16): Likewise.
+ (vqshrn_high_n_s32): Likewise.
+ (vqshrn_high_n_s64): Likewise.
+ (vqshrn_high_n_u16): Likewise.
+ (vqshrn_high_n_u32): Likewise.
+ (vqshrn_high_n_u64): Likewise.
+ (vqshrun_high_n_s16): Likewise.
+ (vqshrun_high_n_s32): Likewise.
+ (vqshrun_high_n_s64): Likewise.
+
+2020-11-06 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-modes.def (VNx2BF, VNx4BF): Adjust nunits
+ and alignment based on the current VG.
+ * config/aarch64/iterators.md (SVE_ALL, SVE_24, SVE_2, SVE_4): Add
+ partial SVE BF modes.
+ (UNSPEC_REVBHW): New unspec.
+ (Vetype, Vesize, Vctype, VEL, Vel, vwcore, V_INT_CONTAINER)
+ (v_int_container, VPRED, vpred): Handle partial SVE BF modes.
+ (container_bits, Vcwtype): New mode attributes.
+ * config/aarch64/aarch64-sve.md
+ (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>): New pattern.
+ (@aarch64_sve_dup_lane<mode>): Extended from SVE_FULL to SVE_ALL.
+ (@aarch64_sve_rev<mode>, @aarch64_sve_<perm_insn><mode>): Likewise.
+ (@aarch64_sve_ext<mode>): Likewise.
+ * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
+ E_VNx2BFmode and E_VNx4BFmode.
+ (aarch64_evpc_rev_local): Base the analysis on the container size
+ instead of the element size. Use the new aarch64_sve_revbhw
+ patterns for SVE.
+ (aarch64_evpc_dup): Handle partial SVE data modes. Use the
+ container size instead of the element size when applying the
+ SVE immediate limit. Fix a previously incorrect bounds check.
+ (aarch64_expand_vec_perm_const_1): Handle partial SVE data modes.
+
+2020-11-06 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Add new -fbit-tests option.
+ * doc/invoke.texi: Document the option.
+ * tree-switch-conversion.c (bit_test_cluster::find_bit_tests):
+ Use the option.
+ * tree-switch-conversion.h (is_enabled): New function.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.h (get_max_constant_value_id): Declare.
+ (get_next_constant_value_id): Likewise.
+ (value_id_constant_p): Inline and simplify.
+ * tree-ssa-sccvn.c (constant_value_ids): Remove.
+ (next_constant_value_id): Add.
+ (get_or_alloc_constant_value_id): Adjust.
+ (value_id_constant_p): Remove definition.
+ (get_max_constant_value_id): Define.
+ (get_next_value_id): Add assert for overflow.
+ (get_next_constant_value_id): Define.
+ (run_rpo_vn): Adjust.
+ (free_rpo_vn): Likewise.
+ (do_rpo_vn): Initialize next_constant_value_id.
+ * tree-ssa-pre.c (constant_value_expressions): New.
+ (add_to_value): Split into constant/non-constant value
+ handling. Avoid exact re-allocation.
+ (vn_valnum_from_value_id): Adjust.
+ (phi_translate_1): Remove spurious exact re-allocation.
+ (bitmap_find_leader): Adjust. Make sure we return
+ a CONSTANT value for a constant value id.
+ (do_pre_regular_insertion): Use 2 auto-elements for avail.
+ (do_pre_partial_partial_insertion): Likewise.
+ (init_pre): Allocate constant_value_expressions.
+ (fini_pre): Release constant_value_expressions.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97706
+ * tree-vect-patterns.c (possible_vector_mask_operation_p):
+ PHIs are possible mask operations.
+ (vect_determine_mask_precision): Handle PHIs.
+ (vect_determine_precisions): Walk PHIs in BB analysis.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_analyze_slp): Pass down the
+ SLP graph entry kind.
+ (vect_analyze_slp_instance): Simplify.
+ (vect_build_slp_instance): Adjust.
+ (vect_slp_check_for_constructors): Perform more
+ eligibility checks here.
+
+2020-11-06 Jan Hubicka <jh@suse.cz>
+
+ * ipa-ref.h (enum ipa_ref_use): Remove GTY marker.
+ (struct ipa_ref): Remove GTY marker; reorder for better packing.
+ (struct ipa_ref_list): Remove GTY marker; turn references
+ nad referring to va_heap, vl_ptr vectors; update accesors.
+ * cgraph.h (symtab_node::iterate_reference): Update.
+ * ipa-ref.c (ipa_ref::remove_reference): Update.
+ * symtab.c (symtab_node::create_reference): Update.
+ (symtab_node::remove_all_references): Update.
+ (symtab_node::resolve_alias): Update.
+
+2020-11-06 Jakub Jelinek <jakub@redhat.com>
+
+ * ipa-modref-tree.h: Fix comment typos.
+ * ipa-modref.c: Likewise.
+
+2020-11-06 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/s390.c (s390_option_override_internal): Remove
+ override of inline params.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97706
+ * tree-vect-patterns.c (vect_determine_mask_precision):
+ Remove worklist operation.
+ (vect_determine_stmt_precisions): Do not call
+ vect_determine_mask_precision here.
+ (vect_determine_precisions): Compute mask precision
+ in a forward walk.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97732
+ * tree-vect-loop.c (vectorizable_induction): Convert the
+ init elements to the vector component type.
+ * gimple-fold.c (gimple_build_vector): Use CONSTANT_CLASS_P
+ rather than TREE_CONSTANT to determine if elements are
+ eligible for VECTOR_CSTs.
+
+2020-11-06 Jan Hubicka <jh@suse.cz>
+
+ * attr-fnspec.h (attr_fnspec::get_str): New accessor
+ * ipa-fnsummary.c (read_ipa_call_summary): Store also parm info
+ for builtins.
+ * ipa-modref.c (class fnspec_summary): New type.
+ (class fnspec_summaries_t): New type.
+ (modref_summary::modref_summary): Initialize writes_errno.
+ (struct modref_summary_lto): Add writes_errno.
+ (modref_summary_lto::modref_summary_lto): Initialize writes_errno.
+ (modref_summary::dump): Check for NULL pointers.
+ (modref_summary_lto::dump): Dump writes_errno.
+ (collapse_loads): Move up in source file.
+ (collapse_stores): New function.
+ (process_fnspec): Handle also internal calls.
+ (analyze_call): Likewise.
+ (analyze_stmt): Store fnspec string if needed.
+ (analyze_function): Initialize fnspec_sumarries.
+ (modref_summaries_lto::duplicate): Copy writes_errno.
+ (modref_write): Store writes_errno and fnspec summaries.
+ (read_section): Read writes_errno and fnspec summaries.
+ (modref_read): Initialize fnspec summaries.
+ (update_signature): Fix formating.
+ (compute_parm_map): Return true if sucessful.
+ (get_parm_type): New function.
+ (get_access_for_fnspec): New function.
+ (propagate_unknown_call): New function.
+ (modref_propagate_in_scc): Use it.
+ (pass_ipa_modref::execute): Delete fnspec_summaries.
+ (ipa_modref_c_finalize): Delete fnspec_summaries.
+ * ipa-prop.c: Include attr-fnspec.h.
+ (ipa_compute_jump_functions_for_bb): Also compute jump functions
+ for functions with fnspecs.
+ (ipa_read_edge_info): Read jump functions for builtins.
+
+2020-11-06 Jan Hubicka <jh@suse.cz>
+
+ * ipa-fnsummary.h (class size_time_entry): Do not GTY annotate.
+ (class ipa_fnsummary): Turn size_time_table to auto_vec and
+ call_size_time_table to effecient vec; update constructors.
+ * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Update.
+ (ipa_fn_summary::~ipa_fn_summary): Update.
+ (ipa_fn_summary_t::duplicate): Update.
+ (ipa_dump_fn_summary): Update.
+ (set_switch_stmt_execution_predicate): Update.
+ (analyze_function_body): Update.
+ (estimate_calls_size_and_time): Update.
+ (ipa_call_context::estimate_size_and_time): Update.
+ (ipa_merge_fn_summary_after_inlining): Update.
+ (ipa_update_overall_fn_summary): Update.
+ (inline_read_section): Update.
+ (ipa_fn_summary_write): Update.
+
+2020-11-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97733
+ * tree-vect-slp.c (vect_analyze_slp_instance): If less
+ than two reductions were relevant or live do nothing.
+
+2020-11-06 Jeff Law <law@redhat.com>
+
+ PR tree-optimization/97223
+ * match.pd (overflow detection and optimization): Handle conversions.
+
+2020-11-06 Eugene Rozenfeld <erozen@microsoft.com>
+
+ * match.pd (x >> x): New pattern.
+
+2020-11-06 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_implied_info):
+ Add static and const.
+ (riscv_subset_list::handle_implied_ext): Add const due to
+ riscv_implied_info changed to const.
+
+2020-11-06 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/96307
+ * toplev.c (process_options): Remove param_asan_stack checking for kasan
+ option checking.
+
+2020-11-05 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97675
+ * doc/invoke.texi: Document -Wexceptions.
+
+2020-11-05 Marek Polacek <polacek@redhat.com>
+
+ PR c++/25814
+ * doc/invoke.texi: Document -Wvexing-parse.
+
+2020-11-05 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97725
+ * range-op.cc (operator_equal::fold_range): Use new tmp value.
+ (operator_not_equal::fold_range): Ditto.
+ * value-query.cc (range_query::value_of_expr): Use int_range_max
+ not a value_range.
+ (range_query::value_on_edge): Ditto.
+ (range_query::value_of_stmt): Ditto.
+
+2020-11-05 Olivier Hainque <hainque@adacore.com>
+
+ * config/aarch64/aarch64-vxworks.h (TARGET_OS_USES_R18):
+ Remove definition.
+ (STATIC_CHAIN_REGNUM): Redefine to 9.
+
+2020-11-05 Olivier Hainque <hainque@adacore.com>
+
+ * config/aarch64/aarch64.md: Define PROBE_STACK_FIRST_REGNUM
+ and PROBE_STACK_SECOND_REGNUM constants, designating r10/r11.
+ Replacements for the PROBE_STACK_FIRST/SECOND_REG constants in
+ aarch64.c.
+ * config/aarch64/aarch64.c (PROBE_STACK_FIRST_REG): Remove.
+ (PROBE_STACK_SECOND_REG): Remove.
+ (aarch64_emit_probe_stack_range): Adjust to the _REG -> _REGNUM
+ suffix update for PROBE_STACK register numbers.
+
+2020-11-05 Jan Hubicka <jh@suse.cz>
+
+ * gimple.c (gimple_call_fnspec): Handle C++ new and delete.
+ * gimple.h (gimple_call_from_new_or_delete): Constify parameter.
+
+2020-11-05 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97721
+ * gimple-range.cc (get_tree_range): Drop overflow from constants.
+
+2020-11-05 David Malcolm <dmalcolm@redhat.com>
+
+ * tree-diagnostic-path.cc (struct path_summary::event_range): Move
+ out of path_summary to...
+ (struct event_range): ...here.
+ (class path_summary): Convert to...
+ (struct path_summary): ...this.
+ (path_summary::m_ranges): Drop "private".
+ (path_summary::print): Convert to...
+ (print_path_summary_as_text): ...this, passing in the path_summary
+ explicitly.
+ (default_tree_diagnostic_path_printer): Update for above change.
+ (selftest::test_empty_path): Likewise.
+ (selftest::test_intraprocedural_path): Likewise.
+ (selftest::test_interprocedural_path_1): Likewise.
+ (selftest::test_interprocedural_path_2): Likewise.
+ (selftest::test_recursion): Likewise.
+
+2020-11-05 qing zhao <qinzhao@gcc.gnu.org>
+
+ PR target/97715
+ * config/i386/i386.c (zero_all_st_registers): Return
+ earlier when the FPU is disabled.
+
+2020-11-05 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (parm_map_for_arg): Initialize parm_offset and
+ parm_offset_knonw.
+ (read_section): Set writes_errno to false.
+
+2020-11-05 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
+ Use the original stmts.
+ (vect_slp_analyze_node_alignment): Use the pattern stmt.
+ * tree-vect-slp.c (vect_fixup_store_groups_with_patterns):
+ New function.
+ (vect_slp_analyze_bb_1): Call it.
+
+2020-11-05 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-slp.c (vect_slp_tree_permute_noop_p): New.
+ (vect_optimize_slp): Optimize permutes.
+ (vectorizable_slp_permutation): Fix typo.
+
+2020-11-05 Richard Biener <rguenther@suse.de>
+
+ PR debug/97718
+ * dwarf2out.c (add_abstract_origin_attribute): Make sure to
+ point to the abstract instance.
+
+2020-11-05 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-loop.c (vect_analyze_loop_2): Check kind.
+ * tree-vect-slp.c (vect_build_slp_instance): New.
+ (enum slp_instance_kind): Move to...
+ * tree-vectorizer.h (enum slp_instance_kind): .. Here
+ (SLP_INSTANCE_KIND): New.
+
+2020-11-05 Kewen Lin <linkw@linux.ibm.com>
+
+ PR target/96933
+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use direct move
+ instructions for vector construction with char/short types.
+ * config/rs6000/rs6000.md (p8_mtvsrwz_v16qisi2): New define_insn.
+ (p8_mtvsrd_v16qidi2): Likewise.
+
+2020-11-04 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vect-slp.c (vect_analyze_slp_instance): Moved load/store lanes
+ check to ...
+ * tree-vect-loop.c (vect_analyze_loop_2): ..Here
+
+2020-11-04 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390.c (NR_C_MODES): Unhardcode.
+ (s390_alloc_pool): Use size_t for iterating from 0 to
+ NR_C_MODES.
+ (s390_add_constant): Likewise.
+ (s390_find_constant): Likewise.
+ (s390_dump_pool): Likewise.
+ (s390_free_pool): Likewise.
+
+2020-11-04 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390.md (RRe): Remove.
+ (RXe): Remove.
+
+2020-11-04 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97515
+ * gimple-range-cache.h (class ranger_cache): New prototypes plus
+ temporal cache pointer.
+ * gimple-range-cache.cc (struct range_timestamp): New.
+ (class temporal_cache): New.
+ (temporal_cache::temporal_cache): New.
+ (temporal_cache::~temporal_cache): New.
+ (temporal_cache::get_timestamp): New.
+ (temporal_cache::set_dependency): New.
+ (temporal_cache::temporal_value): New.
+ (temporal_cache::current_p): New.
+ (temporal_cache::set_timestamp): New.
+ (temporal_cache::set_always_current): New.
+ (ranger_cache::ranger_cache): Allocate the temporal cache.
+ (ranger_cache::~ranger_cache): Free temporal cache.
+ (ranger_cache::get_non_stale_global_range): New.
+ (ranger_cache::set_global_range): Add a timestamp.
+ (ranger_cache::register_dependency): New. Add timestamp dependency.
+ * gimple-range.cc (gimple_ranger::range_of_range_op): Add operand
+ dependencies.
+ (gimple_ranger::range_of_phi): Ditto.
+ (gimple_ranger::range_of_stmt): Check if global range is stale, and
+ recalculate if so.
+
+2020-11-04 Tobias Burnus <tobias@codesourcery.com>
+
+ * targhooks.c (default_zero_call_used_regs): Fix flag-name typo
+ in sorry.
+
+2020-11-04 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vectorizable_phi): Adjust prototype.
+ * tree-vect-stmts.c (vect_transform_stmt): Adjust.
+ (vect_analyze_stmt): Pass cost_vec to vectorizable_phi.
+ * tree-vect-loop.c (vectorizable_phi): Do costing.
+
+2020-11-04 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97709
+ * tree-vect-loop.c (vectorizable_live_operation): Set
+ SSA_NAME_OCCURS_IN_ABNORMAL_PHI when necessary.
+
+2020-11-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97690
+ * tree-ssa-phiopt.c (conditional_replacement): Also optimize
+ cond ? pow2p_cst : 0 as ((type) cond) << cst.
+
+2020-11-04 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vectorizable_induction): Re-instantiate
+ previously removed CSE of SLP IVs.
+
+2020-11-04 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-options.c (ix86_recompute_optlev_based_flags):
+ Fix Intel MCU psABI comment w.r.t DEFAULT_PCC_STRUCT_RETURN.
+
+2020-11-04 Richard Biener <rguenther@suse.de>
+
+ PR bootstrap/97666
+ * tree-vect-slp.c (vect_build_slp_tree_2): Revert previous
+ fix and instead adjust the memset.
+
+2020-11-04 Pat Bernardi <bernardi@adacore.com>
+
+ * config/i386/i386elf.h (SUBTARGET_RETURN_IN_MEMORY): Remove.
+ (ASM_OUTPUT_ASCII): Likewise.
+ (DEFAULT_PCC_STRUCT_RETURN): Define.
+ * config/i386/i386.c (ix86_return_in_memory): Remove
+ SUBTARGET_RETURN_IN_MEMORY.
+
+2020-11-04 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97540
+ * ira.c: (ira_setup_alts): Extract memory from operand only
+ for special memory constraint.
+ * recog.c (asm_operand_ok): Ditto.
+ * lra-constraints.c (process_alt_operands): MEM_P is
+ required for normal memory constraint.
+
+2020-11-04 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97532
+ * lra-constraints.c (valid_address_p): Handle operand of
+ special memory constraint.
+ (process_address_1): Ditto.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97695
+ * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Fix ICE with
+ in dumping code.
+ (cgraph_node::remove): Save clone info before releasing it and pass it
+ to unregister.
+ * cgraph.h (symtab_node::unregister): Add clone_info parameter.
+ (cgraph_clone::unregister): Likewise.
+ * cgraphclones.c (cgraph_node::find_replacement): Copy clone info
+ * symtab-clones.cc (clone_infos_t::duplicate): Remove.
+ (clone_info::get_create): Simplify.
+ * symtab.c (symtab_node::unregister): Pass around clone info.
+ * varpool.c (varpool_node::remove): Update.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: Use proper location to
+ 'inform' of enclosing parent compute construct.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97698
+ * cgraphclones.c (duplicate_thunk_for_node): Check that info is
+ non-NULL.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_function_arg_regno_p): Use up to
+ SSE_REGPARM_MAX registers to pass function parameters
+ for 32bit Mach-O targets.
+ * config/i386/i386.h (X86_32_MMX_REGPARM_MAX): New macro.
+ (MMX_REGPARM_MAX): Use it.
+
+2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry.
+ (vget_hi_half): Likewise.
+ * config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry.
+ (aarch64_vget_hi_halfv8bf): Likewise.
+ * config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic.
+ (vget_high_bf16): Likewise.
+
+2020-11-03 Yang Yang <yangyang305@huawei.com>
+
+ * cgraph.h (struct cgraph_simd_clone): Change field "simdlen" of
+ struct cgraph_simd_clone from unsigned int to poly_uint64.
+ * config/aarch64/aarch64.c
+ (aarch64_simd_clone_compute_vecsize_and_simdlen): adaptation of
+ operations on "simdlen".
+ * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+ Printf formats update.
+ * gengtype.c (main): Handle poly_uint64.
+ * omp-simd-clone.c (simd_clone_mangle): Likewise.Re
+ (simd_clone_adjust_return_type): Likewise.
+ (create_tmp_simd_array): Likewise.
+ (simd_clone_adjust_argument_types): Likewise.
+ (simd_clone_init_simd_arrays): Likewise.
+ (ipa_simd_modify_function_body): Likewise.
+ (simd_clone_adjust): Likewise.
+ (expand_simd_clones): Likewise.
+ * poly-int-types.h (vector_unroll_factor): New macro.
+ * poly-int.h (constant_multiple_p): Add two-argument versions.
+ * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97623
+ * params.opt (-param=max-pre-hoist-insert-iterations): New.
+ * doc/invoke.texi (max-pre-hoist-insert-iterations): Document.
+ * tree-ssa-pre.c (insert): Do at most max-pre-hoist-insert-iterations
+ hoist insert iterations.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97579
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Use
+ the correct types for the vcond_mask/vec_cmp optab queries.
+
+2020-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (ssa_global_cache::get_global_range): Return
+ true if there was a previous range set.
+ (ranger_cache::ranger_cache): Take a gimple_ranger parameter.
+ (ranger_cache::set_global_range): Propagate the value if updating.
+ (ranger_cache::propagate_cache): Renamed from iterative_cache_update.
+ (ranger_cache::propagate_updated_value): New. Split from:
+ (ranger_cache::fill_block_cache): Split out value propagator.
+ * gimple-range-cache.h (ssa_global_cache): Update prototypes.
+ (ranger_cache): Update prototypes.
+
+2020-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.h (block_range_cache): Add new entry point.
+ (ranger_cache): Privatize global abnd block cache members.
+ * gimple-range-cache.cc (ssa_block_ranges::set_bb_range): Add bounds
+ check.
+ (ssa_block_ranges::set_bb_varying): Ditto.
+ (ssa_block_ranges::get_bb_range): Ditto.
+ (ssa_block_ranges::bb_range_p): Ditto.
+ (block_range_cache::get_block_ranges): Fix formatting.
+ (block_range_cache::query_block_ranges): New.
+ (block_range_cache::get_bb_range): Use Query_block_ranges.
+ (block_range_cache::bb_range_p): Ditto.
+ (ranger_cache::dump): New.
+ (ranger_cache::get_global_range): New.
+ (ranger_cache::set_global_range): New.
+ * gimple-range.cc (gimple_ranger::range_of_expr): Use new API.
+ (gimple_ranger::range_of_stmt): Ditto.
+ (gimple_ranger::export_global_ranges): Ditto.
+ (gimple_ranger::dump): Ditto.
+
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * fold-const.c (getbyterep): Remove duplicated statement.
+
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/97205
+ * cfgexpand.c (align_local_variable): Make SSA_NAMEs
+ at least MODE_ALIGNED.
+ (expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs.
+
+2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for AES/SHA/SM3/SM4 intrinsics.
+
+2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for compare intrinsics.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ * dwarf2out.c (maybe_create_die_with_external_ref): Remove
+ hashtable entry.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst2_lane_bf16, vst2q_lane_bf16)
+ (vst3_lane_bf16, vst3q_lane_bf16, vst4_lane_bf16)
+ (vst4q_lane_bf16): New intrinsics.
+ * config/arm/arm_neon_builtins.def: Touch it for:
+ __builtin_neon_vst2_lanev4bf, __builtin_neon_vst2_lanev8bf,
+ __builtin_neon_vst3_lanev4bf, __builtin_neon_vst3_lanev8bf,
+ __builtin_neon_vst4_lanev4bf,__builtin_neon_vst4_lanev8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vld2_lane_bf16, vld2q_lane_bf16)
+ (vld3_lane_bf16, vld3q_lane_bf16, vld4_lane_bf16)
+ (vld4q_lane_bf16): Add intrinsics.
+ * config/arm/arm_neon_builtins.def: Touch for:
+ __builtin_neon_vld2_lanev4bf, __builtin_neon_vld2_lanev8bf,
+ __builtin_neon_vld3_lanev4bf, __builtin_neon_vld3_lanev8bf,
+ __builtin_neon_vld4_lanev4bf, __builtin_neon_vld4_lanev8bf.
+ * config/arm/iterators.md (VQ_HS): Add V8BF to the iterator.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics.
+ * config/arm/arm_neon_builtins.def : Touch for:
+ __builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm-builtins.c (VAR14): Define macro.
+ * config/arm/arm_neon_builtins.def: Touch for:
+ __builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf.
+ * config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add
+ intrinsics.
+ * config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf.
+ * config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add
+ intrinsics.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR bootstrap/97666
+ * tree-vect-slp.c (vect_build_slp_tree_2): Scale
+ allocation of skip_args by sizeof (bool).
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/80928
+ * tree-vect-loop.c (vectorizable_induction): SLP vectorize
+ nested inductions.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97578
+ * ipa-inline-transform.c (maybe_materialize_called_clones): New
+ function.
+ (inline_transform): Use it.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97678
+ * tree-vect-slp.c (vect_build_slp_tree_2): Do not track
+ the initial values of inductions when not nested.
+ * tree-vect-loop.c (vectorizable_induction): Look at
+ PHI node initial values again for SLP and not nested
+ inductions. Handle LOOP_VINFO_MASK_SKIP_NITERS and cost
+ invariants.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (aes<aeswideklvariant>u8):
+ Do not use xmm_regs array. Fix whitespace.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_builtin): Fix comment.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: Move earlier inconsistent
+ nested 'reduction' clauses checking.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for
+ 'gang', 'worker', 'vector' clauses with arguments only allowed in
+ 'kernels' regions.
+
+2020-11-03 Kewen Lin <linkw@gcc.gnu.org>
+
+ PR tree-optimization/96789
+ * function.h (struct function): New member unsigned pending_TODOs.
+ * passes.c (class pass_pre_slp_scalar_cleanup): New class.
+ (make_pass_pre_slp_scalar_cleanup): New function.
+ (pass_data_pre_slp_scalar_cleanup): New pass data.
+ * passes.def: (pass_pre_slp_scalar_cleanup): New pass, add
+ pass_fre and pass_dse as its children.
+ * timevar.def (TV_SCALAR_CLEANUP): New timevar.
+ * tree-pass.h (PENDING_TODO_force_next_scalar_cleanup): New
+ pending TODO flag.
+ (make_pass_pre_slp_scalar_cleanup): New declare.
+ * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1):
+ Once any outermost loop gets unrolled, flag cfun pending_TODOs
+ PENDING_TODO_force_next_scalar_cleanup on.
+
+2020-11-02 Alan Modra <amodra@gmail.com>
+
+ PR middle-end/97267
+ * calls.h (maybe_complain_about_tail_call): Declare.
+ * calls.c (maybe_complain_about_tail_call): Make global.
+ (can_implement_as_sibling_call_p): Delete reg_parm_stack_space
+ param. Adjust caller. Move REG_PARM_STACK_SPACE check to..
+ * config/i386/i386.c (ix86_function_ok_for_sibcall): ..here.
+
+2020-11-02 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * ira.c (ira_remove_scratches): Rename to remove_scratches. Make
+ it static and returning flag of any change.
+ (ira.c): Call ira_expand_reg_equiv in case of removing scratches.
+
+2020-11-02 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97140
+ * config/i386/i386-expand.c (ix86_expand_builtin): Require MMX
+ for __builtin_ia32_maskmovq.
+
+2020-11-02 Martin Sebor <msebor@redhat.com>
+
+ * doc/invoke.texi (-Wstringop-overflow): Correct default setting.
+ (-Wstringop-overread): Move past -Wstringop-overflow.
+
+2020-11-02 François-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ PR bootstrap/57076
+ * Makefile.in (gcc-vers.texi): Quote @, { and }.
+
+2020-11-02 Carl Love <cel@us.ibm.com>
+
+ PR target/93449
+ * config/rs6000/altivec.h (__builtin_bcdadd, __builtin_bcdadd_lt,
+ __builtin_bcdadd_eq, __builtin_bcdadd_gt, __builtin_bcdadd_ofl,
+ __builtin_bcdadd_ov, __builtin_bcdsub, __builtin_bcdsub_lt,
+ __builtin_bcdsub_eq, __builtin_bcdsub_gt, __builtin_bcdsub_ofl,
+ __builtin_bcdsub_ov, __builtin_bcdinvalid, __builtin_bcdmul10,
+ __builtin_bcddiv10, __builtin_bcd2dfp, __builtin_bcdcmpeq,
+ __builtin_bcdcmpgt, __builtin_bcdcmplt, __builtin_bcdcmpge,
+ __builtin_bcdcmple): Add defines.
+ * config/rs6000/altivec.md: Add UNSPEC_BCDSHIFT.
+ (BCD_TEST): Add le, ge to code iterator.
+ Add VBCD mode iterator.
+ (bcd<bcd_add_sub>_test, *bcd<bcd_add_sub>_test2,
+ bcd<bcd_add_sub>_<code>, bcd<bcd_add_sub>_<code>): Add mode to name.
+ Change iterator from V1TI to VBCD.
+ (*bcdinvalid_<mode>, bcdshift_v16qi): New define_insn.
+ (bcdinvalid_<mode>, bcdmul10_v16qi, bcddiv10_v16qi): New define.
+ * config/rs6000/dfp.md (dfp_denbcd_v16qi_inst): New define_insn.
+ (dfp_denbcd_v16qi): New define_expand.
+ * config/rs6000/rs6000-builtin.def (BU_P8V_MISC_1): New define.
+ (BCDADD): Replaced with BCDADD_V1TI and BCDADD_V16QI.
+ (BCDADD_LT): Replaced with BCDADD_LT_V1TI and BCDADD_LT_V16QI.
+ (BCDADD_EQ): Replaced with BCDADD_EQ_V1TI and BCDADD_EQ_V16QI.
+ (BCDADD_GT): Replaced with BCDADD_GT_V1TI and BCDADD_GT_V16QI.
+ (BCDADD_OV): Replaced with BCDADD_OV_V1TI and BCDADD_OV_V16QI.
+ (BCDSUB_V1TI, BCDSUB_V16QI, BCDSUB_LT_V1TI, BCDSUB_LT_V16QI,
+ BCDSUB_LE_V1TI, BCDSUB_LE_V16QI, BCDSUB_EQ_V1TI, BCDSUB_EQ_V16QI,
+ BCDSUB_GT_V1TI, BCDSUB_GT_V16QI, BCDSUB_GE_V1TI, BCDSUB_GE_V16QI,
+ BCDSUB_OV_V1TI, BCDSUB_OV_V16QI, BCDINVALID_V1TI, BCDINVALID_V16QI,
+ BCDMUL10_V16QI, BCDDIV10_V16QI, DENBCD_V16QI): New builtin definitions.
+ (BCDADD, BCDADD_LT, BCDADD_EQ, BCDADD_GT, BCDADD_OV, BCDSUB, BCDSUB_LT,
+ BCDSUB_LE, BCDSUB_EQ, BCDSUB_GT, BCDSUB_GE, BCDSUB_OV, BCDINVALID,
+ BCDMUL10, BCDDIV10, DENBCD): New overload definitions.
+ * config/rs6000/rs6000-call.c (P8V_BUILTIN_VEC_BCDADD, P8V_BUILTIN_VEC_BCDADD_LT,
+ P8V_BUILTIN_VEC_BCDADD_EQ, P8V_BUILTIN_VEC_BCDADD_GT, P8V_BUILTIN_VEC_BCDADD_OV,
+ P8V_BUILTIN_VEC_BCDINVALID, P9V_BUILTIN_VEC_BCDMUL10, P8V_BUILTIN_VEC_DENBCD.
+ P8V_BUILTIN_VEC_BCDSUB, P8V_BUILTIN_VEC_BCDSUB_LT, P8V_BUILTIN_VEC_BCDSUB_LE,
+ P8V_BUILTIN_VEC_BCDSUB_EQ, P8V_BUILTIN_VEC_BCDSUB_GT, P8V_BUILTIN_VEC_BCDSUB_GE,
+ P8V_BUILTIN_VEC_BCDSUB_OV): New overloaded specifications.
+ (CODE_FOR_bcdadd): Replaced with CODE_FOR_bcdadd_v16qi and CODE_FOR_bcdadd_v1ti.
+ (CODE_FOR_bcdadd_lt): Replaced with CODE_FOR_bcdadd_lt_v16qi and CODE_FOR_bcdadd_lt_v1ti.
+ (CODE_FOR_bcdadd_eq): Replaced with CODE_FOR_bcdadd_eq_v16qi and CODE_FOR_bcdadd_eq_v1ti.
+ (CODE_FOR_bcdadd_gt): Replaced with CODE_FOR_bcdadd_gt_v16qi and CODE_FOR_bcdadd_gt_v1ti.
+ (CODE_FOR_bcdsub): Replaced with CODE_FOR_bcdsub_v16qi and CODE_FOR_bcdsub_v1ti.
+ (CODE_FOR_bcdsub_lt): Replaced with CODE_FOR_bcdsub_lt_v16qi and CODE_FOR_bcdsub_lt_v1ti.
+ (CODE_FOR_bcdsub_eq): Replaced with CODE_FOR_bcdsub_eq_v16qi and CODE_FOR_bcdsub_eq_v1ti.
+ (CODE_FOR_bcdsub_gt): Replaced with CODE_FOR_bcdsub_gt_v16qi and CODE_FOR_bcdsub_gt_v1ti.
+ (rs6000_expand_ternop_builtin): Add CODE_FOR_dfp_denbcd_v16qi to else if.
+ * doc/extend.texi: Add documentation for new builtins.
+
+2020-11-02 Nathan Sidwell <nathan@acm.org>
+
+ * tree.c (cache_integer_cst): Fixup pointer caching to match
+ wide_int_to_type_1's expectations. Add comment.
+
+2020-11-02 Nathan Sidwell <nathan@acm.org>
+
+ * tree.h (id_equal): Call the symetric predicate with swapped
+ arguments.
+
+2020-11-02 Nathan Sidwell <nathan@acm.org>
+
+ * print-tree.c (print_node): Display all the operands of a call
+ expr.
+
+2020-11-02 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Add hint *
+ to 2nd alternative of the 1st scratch.
+
+2020-11-02 Sudakshina Das <sudi.das@arm.com>
+
+ PR target/97638
+ * config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Update
+ return value on INSN_P check.
+
+2020-11-02 Richard Biener <rguenther@suse.de>
+
+ * tree.h (build_real_from_wide): Declare.
+ * tree.c (build_real_from_wide): New function.
+ * tree-vect-slp.c (vect_build_slp_tree_2): Remove
+ restriction on induction vectorization, represent
+ the initial value.
+ * tree-vect-loop.c (vect_model_induction_cost): Inline ...
+ (vectorizable_induction): ... here. Rewrite SLP
+ code generation.
+
+2020-11-02 Martin Jambor <mjambor@suse.cz>
+
+ * dbgcnt.def (ipa_cp_values): New counter.
+ (ipa_cp_vr): Likewise.
+ * ipa-cp.c (decide_about_value): Check and bump ipa_cp_values debug
+ counter.
+ (decide_whether_version_node): Likewise.
+ (ipcp_store_vr_results):Check and bump ipa_cp_vr debug counter.
+
+2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/arm.c (arm_thumb1_mi_thunk): Build mi_delta in r3 and
+ do not emit function address and delta when -mpure-code is used.
+
+2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/thumb1.md (thumb1_movsi_insn): Call
+ thumb1_gen_const_int_print.
+ * config/arm/arm-protos.h (thumb1_gen_const_int_print): Add
+ prototype.
+ * config/arm/arm.c (thumb1_gen_const_int_print): New.
+
+2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/arm.c (thumb1_const_rtl, thumb1_const_print): New
+ classes.
+ (thumb1_gen_const_int): Rename to ...
+ (thumb1_gen_const_int_1): ... New helper function. Add capability
+ to emit either RTL or asm, improve generated code.
+ (thumb1_gen_const_int_rtl): New function.
+ * config/arm/arm-protos.h (thumb1_gen_const_int): Rename to
+ thumb1_gen_const_int_rtl.
+ * config/arm/thumb1.md: Call thumb1_gen_const_int_rtl instead
+ of thumb1_gen_const_int.
+
+2020-11-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97558
+ * tree-vect-loop.c (vectorizable_reduction): For nested SLP
+ cycles compute invariant operands vector type.
+
+2020-11-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97558
+ * tree-vect-loop.c (vect_fixup_scalar_cycles_with_patterns):
+ Check for any mismatch in pattern vs. non-pattern and dissolve
+ the group if there is one.
+ * tree-vect-slp.c (vect_analyze_slp_instance): Avoid
+ analyzing not relevant reductions.
+ (vect_analyze_slp): Avoid analyzing not relevant reduction
+ groups.
+
+2020-11-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97650
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Check
+ for SSA_NAME before checking SSA_NAME_IS_DEFAULT_DEF.
+
+2020-11-02 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c
+ (riscv_subset_list::parse_multiletter_ext): Checking multiletter
+ extension has more than 1 letter.
+
+2020-11-02 Kito Cheng <kito.cheng@sifive.com>
+
+ * config.gcc (riscv*-*-*): Handle --with-multilib-generator.
+ * configure: Regen.
+ * configure.ac: Add --with-multilib-generator.
+ * config/riscv/multilib-generator: Exit when parsing arch string error.
+ * config/riscv/t-withmultilib-generator: New.
+ * doc/install.texi: Document --with-multilib-generator.
+
+2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/96770
+ * config/arm/arm.c (thumb_legitimate_constant_p): Accept
+ (symbol_ref + addend) when literal pool is disabled.
+ (arm_valid_symbolic_address_p): Add support for thumb-1 without
+ MOVT/MOVW.
+ * config/arm/thumb1.md (*thumb1_movsi_insn): Accept (symbol_ref +
+ addend) in the pure-code alternative.
+
+2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/96967
+ * config/arm/arm.c (thumb_legitimate_constant_p): Add support for
+ disabled literal pool in thumb-1.
+ * config/arm/thumb1.md (thumb1_movsi_symbol_ref): Remove.
+ (*thumb1_movsi_insn): Add support for SYMBOL_REF with -mpure-code.
+
+2020-11-01 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/host-darwin.c: Align pch_address_space to 16384.
+
+2020-11-01 Pat Bernardi <bernardi@adacore.com>
+
+ * config/i386/i386.c (ix86_expand_prologue): Set the stack usage to 0
+ for naked functions.
+
+2020-11-01 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ PR ipa/97660
+ * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Don't call
+ clone_info::get when cgraph_node::get returns NULL.
+
+2020-10-31 Jan Hubicka <jh@suse.cz>
+
+ * Makefile.in: (OBJS): Add symtab-clones.o
+ (GTFILES): Add symtab-clones.h
+ * cgraph.c: Include symtab-clones.h.
+ (cgraph_edge::resolve_speculation): Fix formating
+ (cgraph_edge::redirect_call_stmt_to_callee): Update.
+ (cgraph_update_edges_for_call_stmt): Update
+ (release_function_body): Fix formating.
+ (cgraph_node::remove): Fix formating.
+ (cgraph_node::dump): Fix formating.
+ (cgraph_node::get_availability): Fix formating.
+ (cgraph_node::call_for_symbol_thunks_and_aliases): Fix formating.
+ (set_const_flag_1): Fix formating.
+ (set_pure_flag_1): Fix formating.
+ (cgraph_node::can_remove_if_no_direct_calls_p): Fix formating.
+ (collect_callers_of_node_1): Fix formating.
+ (clone_of_p): Update.
+ (cgraph_node::verify_node): Update.
+ (cgraph_c_finalize): Call clone_info::release ().
+ * cgraph.h (struct cgraph_clone_info): Move to symtab-clones.h.
+ (cgraph_node): Remove clone_info.
+ (symbol_table): Add m_clones.
+ * cgraphclones.c: Include symtab-clone.h.
+ (duplicate_thunk_for_node): Update.
+ (cgraph_node::create_clone): Update.
+ (cgraph_node::create_virtual_clone): Update.
+ (cgraph_node::find_replacement): Update.
+ (cgraph_node::materialize_clone): Update.
+ * gengtype.c (open_base_files): Include symtab-clones.h.
+ * ipa-cp.c: Include symtab-clones.h.
+ (initialize_node_lattices): Update.
+ (want_remove_some_param_p): Update.
+ (create_specialized_node): Update.
+ * ipa-fnsummary.c: Include symtab-clones.h.
+ (ipa_fn_summary_t::duplicate): Update.
+ * ipa-modref.c: Include symtab-clones.h.
+ (update_signature): Update.
+ * ipa-param-manipulation.c: Include symtab-clones.h.
+ (ipa_param_body_adjustments::common_initialization): Update.
+ * ipa-prop.c: Include symtab-clones.h.
+ (adjust_agg_replacement_values): Update.
+ (ipcp_get_parm_bits): Update.
+ (ipcp_update_bits): Update.
+ (ipcp_update_vr): Update.
+ * ipa-sra.c: Include symtab-clones.h.
+ (process_isra_node_results): Update.
+ (disable_unavailable_parameters): Update.
+ * lto-cgraph.c: Include symtab-clone.h.
+ (output_cgraph_opt_summary_p): Update.
+ (output_node_opt_summary): Update.
+ (input_node_opt_summary): Update.
+ * symtab-clones.cc: New file.
+ * symtab-clones.h: New file.
+ * tree-inline.c (expand_call_inline): Update.
+ (update_clone_info): Update.
+ (tree_function_versioning): Update.
+
+2020-10-31 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_summary::dump): Dump writes_errno.
+ (parm_map_for_arg): Break out from ...
+ (merge_call_side_effects): ... here.
+ (get_access_for_fnspec): New function.
+ (process_fnspec): New function.
+ (analyze_call): Use it.
+ (analyze_stmt): Update.
+ (analyze_function): Initialize writes_errno.
+ (modref_summaries::duplicate): Duplicate writes_errno.
+ * ipa-modref.h (struct modref_summary): Add writes_errno.
+ * tree-ssa-alias.c (call_may_clobber_ref_p_1): Check errno.
+
+2020-10-30 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (glibc_supports_ieee_128bit): New helper
+ function.
+ (rs6000_option_override_internal): Call it.
+
+2020-10-30 Qing Zhao <qing.zhao@oracle.com>
+ H.J.Lu <hjl.tools@gmail.com>
+
+ * common.opt: Add new option -fzero-call-used-regs
+ * config/i386/i386.c (zero_call_used_regno_p): New function.
+ (zero_call_used_regno_mode): Likewise.
+ (zero_all_vector_registers): Likewise.
+ (zero_all_st_registers): Likewise.
+ (zero_all_mm_registers): Likewise.
+ (ix86_zero_call_used_regs): Likewise.
+ (TARGET_ZERO_CALL_USED_REGS): Define.
+ * df-scan.c (df_epilogue_uses_p): New function.
+ (df_get_exit_block_use_set): Replace EPILOGUE_USES with
+ df_epilogue_uses_p.
+ * df.h (df_epilogue_uses_p): Declare.
+ * doc/extend.texi: Document the new zero_call_used_regs attribute.
+ * doc/invoke.texi: Document the new -fzero-call-used-regs option.
+ * doc/tm.texi: Regenerate.
+ * doc/tm.texi.in (TARGET_ZERO_CALL_USED_REGS): New hook.
+ * emit-rtl.h (struct rtl_data): New field must_be_zero_on_return.
+ * flag-types.h (namespace zero_regs_flags): New namespace.
+ * function.c (gen_call_used_regs_seq): New function.
+ (class pass_zero_call_used_regs): New class.
+ (pass_zero_call_used_regs::execute): New function.
+ (make_pass_zero_call_used_regs): New function.
+ * optabs.c (expand_asm_reg_clobber_mem_blockage): New function.
+ * optabs.h (expand_asm_reg_clobber_mem_blockage): Declare.
+ * opts.c (zero_call_used_regs_opts): New structure array
+ initialization.
+ (parse_zero_call_used_regs_options): New function.
+ (common_handle_option): Handle -fzero-call-used-regs.
+ * opts.h (zero_call_used_regs_opts): New structure array.
+ * passes.def: Add new pass pass_zero_call_used_regs.
+ * recog.c (valid_insn_p): New function.
+ * recog.h (valid_insn_p): Declare.
+ * resource.c (init_resource_info): Replace EPILOGUE_USES with
+ df_epilogue_uses_p.
+ * target.def (zero_call_used_regs): New hook.
+ * targhooks.c (default_zero_call_used_regs): New function.
+ * targhooks.h (default_zero_call_used_regs): Declare.
+ * tree-pass.h (make_pass_zero_call_used_regs): Declare.
+
+2020-10-30 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * lra.c (get_scratch_reg): New function.
+ (remove_scratches_1): Rename remove_insn_scratches. Use
+ ira_remove_insn_scratches and get_scratch_reg.
+ (remove_scratches): Do not
+ initialize scratches, scratch_bitmap, and scratch_operand_bitmap.
+ (lra): Call ira_restore_scratches instead of restore_scratches.
+ (struct sloc, sloc_t, scratches, scratch_bitmap)
+ (scratch_operand_bitmap, lra_former_scratch_p)
+ (lra_former_scratch_operand_p, lra_register_new_scratch_op)
+ (restore_scratches): Move them to ...
+ * ira.c: ... here.
+ (former_scratch_p, former_scratch_operand_p): Rename to
+ ira_former_scratch_p and ira_former_scratch_operand_p.
+ (contains_X_constraint_p): New function.
+ (register_new_scratch_op): Rename to ira_register_new_scratch_op.
+ Change it to work for IRA and LRA.
+ (restore_scratches): Rename to ira_restore_scratches.
+ (get_scratch_reg, ira_remove_insn_scratches): New functions.
+ (ira): Call ira_remove_scratches if we use LRA.
+ * ira.h (ira_former_scratch_p, ira_former_scratch_operand_p): New
+ prototypes.
+ (ira_register_new_scratch_op, ira_restore_scratches): New prototypes.
+ (ira_remove_insn_scratches): New prototype.
+ * lra-int.h (lra_former_scratch_p, lra_former_scratch_operand_p):
+ Remove prototypes.
+ (lra_register_new_scratch_op): Ditto.
+ * lra-constraints.c: Rename lra_former_scratch_p and
+ lra_former_scratch_p to ira_former_scratch_p and to
+ ira_former_scratch_p.
+ * lra-remat.c: Ditto.
+ * lra-spills.c: Rename lra_former_scratch_p to ira_former_scratch_p.
+
+2020-10-30 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97556
+ * builtins.c (access_ref::add_offset): Cap offset lower bound
+ to at most the the upper bound.
+
+2020-10-30 Jan Hubicka <jh@suse.cz>
+
+ PR pch/97593
+ * cgraph.c (cgraph_node::create_thunk): Register thunk as early during
+ parsing.
+ * cgraphunit.c (analyze_functions): Call
+ thunk_info::process_early_thunks.
+ * symtab-thunks.cc (struct unprocessed_thunk): New struct.
+ (thunks): New static variable.
+ (thunk_info::register_early): New member function.
+ (thunk_info::process_early_thunks): New member function.
+ * symtab-thunks.h (thunk_info::register_early): Declare.
+ (thunk_info::process_early_thunks): Declare.
+
+2020-10-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97623
+ * tree-ssa-pre.c (insert): First do hoist insertion in
+ a backward walk.
+
+2020-10-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97626
+ * tree-vect-slp.c (vect_slp_analyze_node_operations):
+ Exchange the lvisited hash-set for a vector, roll back
+ recursive adds to visited when analysis failed.
+ (vect_slp_analyze_operations): Likewise.
+
+2020-10-30 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for conversion intrinsics.
+
+2020-10-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97633
+ * tree-vect-slp.c (): Update backedges in single-node cycles.
+ Optimize processing of externals.
+
+2020-10-30 Alex Coplan <alex.coplan@arm.com>
+
+ PR target/96998
+ * combine.c (make_extraction): Also handle shifts written as
+ (mult x 2^n), avoid creating an extract rtx for these.
+ * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Delete.
+ (aarch64_classify_index): Remove extract-based address handling.
+ (aarch64_strip_extend): Likewise.
+ (aarch64_rtx_arith_op_extract_p): Likewise, remove now-unused parameter.
+ Update callers...
+ (aarch64_rtx_costs): ... here.
+
+2020-10-30 Olivier Hainque <hainque@adacore.com>
+
+ * config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Also
+ builtin_define __ppc and __ppc__ for VxWorks 7.
+
+2020-10-30 Olivier Hainque <hainque@adacore.com>
+ Douglas Rupp <rupp@adacore.com>
+ Pat Bernardi <bernardi@adacore.com>
+
+ * config.gcc: Adjust the ix86/x86_64-wrs-vxworks filters
+ to apply to VxWorks 7 as well.
+ * config/i386/t-vxworks (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
+ Remove the fPIC multilib and add one for the large code model
+ on x86_64.
+ * config/i386/vxworks.h: Separate sections for TARGET_VXWORKS7,
+ other variants and common bits.
+ (TARGET_OS_CPP_BUILTINS): Augment to support a range of CPU
+ families. Leverage VX_CPU_PREFIX.
+ (CC1_SPEC): Add definition.
+ (STACK_CHECK_PROTECT): Use conditional expression instead of
+ heavier to read conditioned macro definitions.
+
+2020-10-30 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (gimplify_scan_omp_clauses): Force
+ OMP_CLAUSE_ALLOCATE_ALLOCATOR into a temporary if it is non-NULL and
+ non-constant.
+ (gimplify_omp_for): Only put allocate on inner taskloop if lastprivate
+ for the same variable is going to be put there, and in that case
+ if the OMP_CLAUSE_ALLOCATE_ALLOCATOR is non-NULL non-constant, make
+ the allocator firstprivate on task.
+
+2020-10-30 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Allow
+ long double type to be changed for C/C++ if glibc 2.32 or newer.
+ (rs6000_invalid_binary_op): Update error messages about mixing IBM
+ long double and IEEE 128-bit.
+
+2020-10-29 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (compute_avail): Free operands consistently.
+ * tree-vect-loop.c (vectorizable_phi): Make sure all operand
+ defs vectors are released.
+
+2020-10-29 Jan Hubicka <jh@suse.cz>
+
+ * vec.h (vec<T, va_heap, vl_ptr>::copy): Pass mem stat info.
+
+2020-10-29 Jan Hubicka <jh@suse.cz>
+
+ * wide-int.h (trailing_wide_ints <N>): Turn len to array of structures
+ so it does not imply typeless storage.
+ (trailing_wide_ints <N>::operator): update
+ (trailing_wide_ints <N>::operator []): Update.
+
+2020-10-29 Joseph Myers <joseph@codesourcery.com>
+
+ * ginclude/stdbool.h [__STDC_VERSION__ > 201710L] (true, false):
+ Define with type _Bool.
+
+2020-10-29 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97505
+ * vr-values.c (vr_values::extract_range_basic): Enable
+ trap again for everything except UBSAN builtins.
+
+2020-10-29 Richard Sandiford <richard.sandiford@arm.com>
+
+ * tree-vectorizer.h (vect_transform_slp_perm_load): Take an
+ optional extra parameter.
+ * tree-vect-slp.c (vect_transform_slp_perm_load): Calculate
+ the number of loads as well as the number of permutes, taking
+ the counting loop from...
+ * tree-vect-stmts.c (vect_model_load_cost): ...here. Use the
+ value computed by vect_transform_slp_perm_load for ncopies.
+
+2020-10-29 Martin Liska <mliska@suse.cz>
+
+ PR lto/97508
+ * langhooks.c (lhd_begin_section): Call get_section with
+ not_existing = true.
+ * output.h (get_section): Add new argument.
+ * varasm.c (get_section): Fail when NOT_EXISTING is true
+ and a section already exists.
+ * ipa-cp.c (ipcp_write_summary): Remove.
+ (ipcp_read_summary): Likewise.
+ * ipa-fnsummary.c (ipa_fn_summary_read): Always read jump
+ functions summary.
+ (ipa_fn_summary_write): Always stream it.
+
+2020-10-29 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_bb_slp_scalar_cost): Pass
+ SLP_TREE_VECTYPE to record_stmt_cost.
+
+2020-10-29 Martin Liska <mliska@suse.cz>
+
+ * optc-gen.awk: Check that params start with -param=.
+ * params.opt: Fix ipa-jump-function-lookups.
+
+2020-10-29 Alexandre Oliva <oliva@adacore.com>
+
+ * tree-ssa-math-opts.c (sincos_stats): Add conv_removed.
+ (execute_cse_conv_1): New.
+ (execute_cse_sincos_1): Call it. Fix return within
+ FOR_EACH_IMM_USE_STMT.
+ (pass_cse_sincos::execute): Report conv_inserted.
+
+2020-10-29 Xuepeng Guo <xuepeng.guo@intel.com>
+ Hongyu Wang <hongyu.wang@intel.com>
+ Hongtao Liu <hongtao.liu@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Detect KL, AESKLE and WIDEKL features.
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA_KL_SET): New.
+ (OPTION_MASK_ISA_WIDEKL_SET): Likewise.
+ (OPTION_MASK_ISA_KL_UNSET): Likewise.
+ (OPTION_MASK_ISA_WIDEKL_UNSET): Likewise.
+ (OPTION_MASK_ISA2_AVX2_UNSET): Likewise.
+ (OPTION_MASK_ISA2_AVX_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE4_2_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE4_1_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE4_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSSE3_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE3_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE2_UNSET): Likewise.
+ (OPTION_MASK_ISA2_SSE_UNSET): Likewise.
+ (ix86_handle_option): Handle kl and widekl, add dependency chain
+ for KL and SSE2.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ (FEATURE_KL, FEATURE_AESKLE, FEATURE_WIDEKL): New.
+ * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY
+ for KL, AESKLE and WIDEKL.
+ * config.gcc: Add keylockerintrin.h.
+ * doc/invoke.texi: Document new option -mkl and -mwidekl.
+ * doc/extend.texi: Document kl and widekl.
+ * config/i386/cpuid.h (bit_KL, bit_AESKLE, bit_WIDEKL): New.
+ * config/i386/i386-builtin-types.def ((UINT, UINT, V2DI, V2DI, PVOID),
+ (UINT, UINT, V2DI, PVOID), (VOID, V2DI, V2DI, V2DI, UINT),
+ (UINT8, PV2DI, V2DI, PCVOID), (UINT8, PV2DI, PCV2DI, PCVOID)): New
+ function types.
+ * config/i386/i386-builtin.def: Add
+ __builtin_ia32_loadiwkey,
+ __builtin_ia32_aesdec128kl_u8,
+ __builtin_ia32_aesdec256kl_u8,
+ __builtin_ia32_aesenc128kl_u8,
+ __builtin_ia32_aesenc256kl_u8,
+ __builtin_ia32_aesdecwide128kl_u8,
+ __builtin_ia32_aesdecwide256kl_u8,
+ __builtin_ia32_aesencwide128kl_u8,
+ __builtin_ia32_aesencwide256kl_u8,
+ __builtin_ia32_encodekey128_u32,
+ __builtin_ia32_encodekey256_u32.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Handle
+ kl and widekl.
+ * config/i386/i386-options.c (isa2_opts): Add -mkl and -mwidekl.
+ (ix86_option_override_internal): Handle KL and WIDEKL.
+ (ix86_valid_target_attribute_inner_p): Add attribute for kl and widekl.
+ * config/i386/i386-expand.c
+ (ix86_expand_builtin): Expand Keylocker Builtins.
+ * config/i386/i386.h (TARGET_KL): New.
+ (TARGET_KL_P): Likewise.
+ (TARGET_WIDEKL): Likewise.
+ (TARGET_WIDEKL_P): Likewise.
+ (PTA_KL): Likewise.
+ (PTA_WIDEKL): Likewise.
+ (PTA_TIGERLAKE): Add PTA_KL, PTA_WIDEKL.
+ (PTA_ALDERLAKE): Likewise.
+ * config/i386/i386.opt: Add new option mkl and mwidekl.
+ * config/i386/keylockerintrin.h: New header file for Keylocker.
+ * config/i386/immintrin.h: Include keylockerintrin.h.
+ * config/i386/predicates.md (encodekey128_operation): New
+ predicate.
+ (encodekey256_operation): Likewise.
+ (aeswidekl_operation): Likewise.
+ * config/i386/sse.md (UNSPECV_LOADIWKEY): New.
+ (UNSPECV_AESDEC128KLU8): Likewise.
+ (UNSPECV_AESENC128KLU8): Likewise.
+ (UNSPECV_AESDEC256KLU8): Likewise.
+ (UNSPECV_AESENC256KLU8): Likewise.
+ (UNSPECV_AESDECWIDE128KLU8): Likewise.
+ (UNSPECV_AESENCWIDE128KLU8): Likewise.
+ (UNSPECV_AESDECWIDE256KLU8): Likewise.
+ (UNSPECV_AESENCWIDE256KLU8): Likewise.
+ (UNSPECV_ENCODEKEY128U32): Likewise.
+ (UNSPECV_ENCODEKEY256U32): Likewise.
+ (encodekey128u32): New expander.
+ (encodekey256u32): Likewise.
+ (aes<aeswideklvariant>u8): Likewise.
+ (loadiwkey): New insn pattern.
+ (*encodekey128u32): Likewise.
+ (*encodekey256u32): Likewise.
+ (aes<aesklvariant>u8): Likewise.
+ (*aes<aeswideklvariant>u8): Likewise.
+
+2020-10-29 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_2): Allow splatting
+ not vectorizable loads.
+ (vect_build_slp_instance): Amend dumping with address.
+ (vect_slp_convert_to_external): Likewise.
+
+2020-10-29 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97609
+ * gimple-range-cache.cc (non_null_ref::process_name): Call
+ infer_nonnull_range directly instead of infer_value_range.
+
+2020-10-29 David Malcolm <dmalcolm@redhat.com>
+
+ * Makefile.in (ANALYZER_OBJS): Add analyzer/complexity.o.
+
+2020-10-28 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97573
+ * doc/invoke.texi: Document -Wdeprecated-enum-enum-conversion
+ and -Wdeprecated-enum-float-conversion. -Wenum-conversion is
+ no longer C/ObjC only.
+
+2020-10-28 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/97457
+ * value-range.cc (irange::set): Don't decay POLY_INT_CST ranges
+ to integer ranges.
+
+2020-10-28 Carl Love <cel@us.ibm.com>
+
+ * config/rs6000/vsx.md(xxgenpcvm_<mode>_internal): Remove TARGET_64BIT.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_slp_analyze_node_operations_1): Dump
+ when shared vectype update fails.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): For skipped
+ args just push NULLs and vect_uninitialized_def.
+ (vect_build_slp_tree_2): Allocate skip_args for all ops
+ and pass it down to vect_get_and_check_slp_defs.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97615
+ * tree-vect-slp.c (vect_build_slp_tree_2): Do not build
+ an external from pattern defs.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_optimize_slp): Fix iteration over
+ all loads.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_instance): Split the store
+ group at the failure boundary and also re-analyze a large enough
+ matching rest.
+
+2020-10-28 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_slp_analyze_node_alignment):
+ Dump when vect_update_shared_vectype fails.
+
+2020-10-28 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/arm_neon.h (__ST2_LANE_FUNC, __ST3_LANE_FUNC)
+ (__ST4_LANE_FUNC): Rename the macro generating the 'q' variants
+ into __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC so they
+ all can be undefed at the and of the file.
+ (vst2_lane_bf16, vst2q_lane_bf16, vst3_lane_bf16, vst3q_lane_bf16)
+ (vst4_lane_bf16, vst4q_lane_bf16): Add new intrinsics.
+
+2020-10-28 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/arm_neon.h (__LD2_LANE_FUNC, __LD3_LANE_FUNC)
+ (__LD4_LANE_FUNC): Rename the macro generating the 'q' variants
+ into __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC so they
+ all can be undefed at the and of the file.
+ (vld2_lane_bf16, vld2q_lane_bf16, vld3_lane_bf16, vld3q_lane_bf16)
+ (vld4_lane_bf16, vld4q_lane_bf16): Add new intrinsics.
+
+2020-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_ALLOCATE.
+ * tree.h (OMP_CLAUSE_ALLOCATE_ALLOCATOR,
+ OMP_CLAUSE_ALLOCATE_COMBINED): Define.
+ * tree.c (omp_clause_num_ops, omp_clause_code_name): Add allocate
+ clause.
+ (walk_tree_1): Handle OMP_CLAUSE_ALLOCATE.
+ * tree-pretty-print.c (dump_omp_clause): Likewise.
+ * gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses,
+ gimplify_omp_for): Likewise.
+ * tree-nested.c (convert_nonlocal_omp_clauses,
+ convert_local_omp_clauses): Likewise.
+ * omp-low.c (scan_sharing_clauses): Likewise.
+
+2020-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-offload.c (omp_declare_target_tgt_fn_r): Handle direct calls to
+ declare variant base functions.
+
+2020-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR lto/96680
+ * lto-streamer.h (omp_lto_output_declare_variant_alt,
+ omp_lto_input_declare_variant_alt): Declare variant.
+ * symtab.c (symtab_node::get_partitioning_class): Return
+ SYMBOL_DUPLICATE for declare_variant_alt nodes.
+ * passes.c (ipa_write_summaries): Add declare_variant_alt to
+ partition.
+ * lto-cgraph.c (output_refs): Call omp_lto_output_declare_variant_alt
+ on declare_variant_alt nodes.
+ (input_refs): Call omp_lto_input_declare_variant_alt on
+ declare_variant_alt nodes.
+ * lto-streamer-out.c (output_function): Don't call
+ collect_block_tree_leafs if DECL_INITIAL is error_mark_node.
+ (lto_output): Call output_function even for declare_variant_alt
+ nodes.
+ * omp-general.c (omp_lto_output_declare_variant_alt,
+ omp_lto_input_declare_variant_alt): New functions.
+
+2020-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ * wide-int.cc (wi::set_bit_large): Call canonize unless setting
+ msb bit and clearing bits above it.
+
+2020-10-28 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-gori.cc (gori_compute_cache::cache_stmt): Accumulate
+ return values and only set cache when everything returned true.
+ * gimple-range.cc (get_tree_range): Set the return range to UNDEFINED
+ when the range isn't supported.
+ (gimple_ranger::calc_stmt): Return varying if the type is supported,
+ even if the stmt processing failed. False otherwise.
+ (range_of_builtin_ubsan_call): Don't use gcc_assert.
+ (range_of_builtin_call): Ditto.
+ (gimple_ranger::range_of_cond_expr): Ditto.
+ (gimple_ranger::range_of_expr): Ditto
+ (gimple_ranger::range_on_entry): Ditto.
+ (gimple_ranger::range_on_exit): Ditto.
+ (gimple_ranger::range_on_edge): DItto.
+ (gimple_ranger::range_of_stmt): Don't use gcc_assert, and initialize
+ return value to UNDEFINED.
+
+2020-10-27 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR rtl-optimization/97497
+ * config/s390/s390.c (s390_hard_regno_call_part_clobbered): Do not
+ return true for r12 when -fpic is used.
+
+2020-10-27 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/97535
+ * config/aarch64/aarch64.c (aarch64_expand_cpymem): Use unsigned
+ arithmetic in check.
+
+2020-10-27 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/arm_neon.h (vcopy_lane_bf16, vcopyq_lane_bf16)
+ (vcopyq_laneq_bf16, vcopy_laneq_bf16): New intrinsics.
+
+2020-10-27 Olivier Hainque <hainque@adacore.com>
+
+ * config/vxworks.h (VX_CPU_PREFIX): #define here.
+ * config/rs6000/vxworks.h: Remove #definition.
+
+2020-10-27 Olivier Hainque <hainque@adacore.com>
+
+ * config/rs6000/vxworks.h (CPP_SPEC): Fix macro definition
+ for -mcpu=e6500.
+
+2020-10-27 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_instance): Use ceil_log2
+ to compute maximum group-size.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97586
+ * ipa-modref-tree.h (modref_tree::remap_params): New member function.
+ * ipa-modref.c (modref_summaries_lto::duplicate): Check that
+ optimization summaries are not duplicated.
+ (remap_arguments): Remove.
+ (modref_transform): Rename to ...
+ (update_signature): ... this one; handle also lto summary.
+ (pass_ipa_modref::execute): Update signatures here rather
+ than in transform hook.
+
+2020-10-27 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_slp_bbs): Remove no-op
+ slp-max-insns-in-bb check.
+ (vect_slp_function): Dump when splitting the function.
+ Adjust the split condition for control altering stmts.
+ * params.opt (-param=slp-max-insns-in-bb): Remove.
+ * doc/invoke.texi (-param=slp-max-insns-in-bb): Likewise.
+
+2020-10-27 Richard Biener <rguenther@suse.de>
+
+ * gimple.h (gimple_expr_type): For PHIs return the type
+ of the result.
+ * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
+ Make sure edge order into copied loop headers line up with the
+ originals.
+ * tree-vect-loop.c (vect_transform_cycle_phi): Handle nested
+ loops with SLP.
+ (vectorizable_phi): New function.
+ (vectorizable_live_operation): For BB vectorization compute insert
+ location here.
+ * tree-vect-slp.c (vect_free_slp_tree): Deal with NULL
+ SLP_TREE_CHILDREN entries.
+ (vect_create_new_slp_node): Add overloads with pre-existing node
+ argument.
+ (vect_print_slp_graph): Likewise.
+ (vect_mark_slp_stmts): Likewise.
+ (vect_mark_slp_stmts_relevant): Likewise.
+ (vect_gather_slp_loads): Likewise.
+ (vect_optimize_slp): Likewise.
+ (vect_slp_analyze_node_operations): Likewise.
+ (vect_bb_slp_scalar_cost): Likewise.
+ (vect_remove_slp_scalar_calls): Likewise.
+ (vect_get_and_check_slp_defs): Handle PHIs.
+ (vect_build_slp_tree_1): Handle PHIs.
+ (vect_build_slp_tree_2): Continue SLP build, following PHI
+ arguments. Fix memory leak.
+ (vect_build_slp_tree): Put stub node into the hash-map so
+ we can discover cycles directly.
+ (vect_build_slp_instance): Set the backedge SLP def for
+ reduction chains.
+ (vect_analyze_slp_backedges): Remove.
+ (vect_analyze_slp): Do not call it.
+ (vect_slp_convert_to_external): Release SLP_TREE_LOAD_PERMUTATION.
+ (vect_slp_analyze_node_operations): Handle stray failed
+ backedge defs by failing.
+ (vect_slp_build_vertices): Adjust leaf condition.
+ (vect_bb_slp_mark_live_stmts): Handle PHIs, use visited
+ hash-set to handle cycles.
+ (vect_slp_analyze_operations): Adjust.
+ (vect_bb_partition_graph_r): Likewise.
+ (vect_slp_function): Adjust split condition to allow CFG
+ merges.
+ (vect_schedule_slp_instance): Rename to ...
+ (vect_schedule_slp_node): ... this. Move DFS walk to ...
+ (vect_schedule_scc): ... this new function.
+ (vect_schedule_slp): Call it. Remove ad-hoc vectorized
+ backedge fill code.
+ * tree-vect-stmts.c (vect_analyze_stmt): Call
+ vectorizable_phi.
+ (vect_transform_stmt): Likewise.
+ (vect_is_simple_use): Handle vect_backedge_def.
+ * tree-vectorizer.c (vec_info::new_stmt_vec_info): Only
+ set loop header PHIs to vect_unknown_def_type for loop
+ vectorization.
+ * tree-vectorizer.h (enum vect_def_type): Add vect_backedge_def.
+ (enum stmt_vec_info_type): Add phi_info_type.
+ (vectorizable_phi): Declare.
+
+2020-10-27 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_2): When vectorizing
+ BBs splat uniform operands and stop SLP discovery.
+
+2020-10-27 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_D_CRITSEC_SIZE):
+ Remove.
+ * config/glibc-d.c (glibc_d_critsec_size): Likewise.
+ (TARGET_D_CRITSEC_SIZE): Likewise.
+ * config/i386/linux-common.h (GNU_USER_TARGET_D_CRITSEC_SIZE):
+ Likewise.
+ * config/sol2-d.c (solaris_d_critsec_size): Likewise.
+ (TARGET_D_CRITSEC_SIZE): Likewise.
+ * doc/tm.texi.in (TARGET_D_CRITSEC_SIZE): Likewise.
+ * doc/tm.texi: Regenerate.
+
+2020-10-27 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/97461
+ * gcov-io.h (GCOV_PREALLOCATED_KVP): Pre-allocate 64
+ static counters.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-alias.c (attr_fnspec::verify): Re-enabl checking.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ * builtin-attrs.def (STRERRNOC): New macro.
+ (STRERRNOP): New macro.
+ (ATTR_ERRNOCONST_NOTHROW_LEAF_LIST): New attr list.
+ (ATTR_ERRNOPURE_NOTHROW_LEAF_LIST): New attr list.
+ * builtins.def (ATTR_MATHFN_ERRNO): Use
+ ATTR_ERRNOCONST_NOTHROW_LEAF_LIST.
+ (ATTR_MATHFN_FPROUNDING_ERRNO): Use ATTR_ERRNOCONST_NOTHROW_LEAF_LIST
+ or ATTR_ERRNOPURE_NOTHROW_LEAF_LIST.
+
+2020-10-27 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (opt_var_ref_t): New.
+ (riscv_ext_flag_table_t): New.
+ (riscv_ext_flag_table): New.
+ (riscv_parse_arch_string): Pass gcc_options* instead of
+ &opts->x_target_flags only, and using riscv_arch_option_table to
+ setup flags.
+ (riscv_handle_option): Update argument for riscv_parse_arch_string.
+ (riscv_expand_arch): Ditto.
+ (riscv_expand_arch_from_cpu): Ditto.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-ccp.c (evaluate_stmt): Use EAF_RETURN_ARG; do not handle
+ string buitings specially.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ * tree.c (set_call_expr_flags): Fix string for ECF_RET1.
+ (build_common_builtin_nodes): Do not set ECF_RET1 for memcpy, memmove,
+ and memset. They are handled by builtin_fnspec.
+
+2020-10-27 Jan Hubicka <jh@suse.cz>
+
+ * builtins.c (builtin_fnspec): Add bzero, memcmp, memcmp_eq, bcmp,
+ strncmp, strncmp_eq, strncasecmp, rindex, strlen, strlnen, strcasecmp,
+ strcspn, strspn, strcmp, strcmp_eq.
+
+2020-10-27 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (slp_tree_pool): Declare.
+ (_slp_tree::operator new): Likewise.
+ (_slp_tree::operator delete): Likewise.
+ * tree-vectorizer.c (vectorize_loops): Allocate and free the
+ slp_tree_pool.
+ (pass_slp_vectorize::execute): Likewise.
+ * tree-vect-slp.c (slp_tree_pool): Define.
+ (_slp_tree::operator new): Likewise.
+ (_slp_tree::operator delete): Likewise.
+
+2020-10-27 Martin Liska <mliska@suse.cz>
+
+ * lto-wrapper.c (run_gcc): Do not use sub-make when jobserver is
+ not detected properly.
+
+2020-10-27 Martin Liska <mliska@suse.cz>
+
+ * symbol-summary.h (call_summary_base): Pass symtab hooks to
+ base and register (or unregister) hooks directly.
+
+2020-10-27 Martin Liska <mliska@suse.cz>
+
+ * symbol-summary.h (function_summary_base::unregister_hooks):
+ Call disable_insertion_hook and disable_duplication_hook.
+ (function_summary_base::symtab_insertion): New field.
+ (function_summary_base::symtab_removal): Likewise.
+ (function_summary_base::symtab_duplication): Likewise.
+ Register hooks in function_summary_base and directly register
+ (or unregister) hooks.
+
+2020-10-26 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97567
+ * gimple-range-gori.cc (gori_compute::logical_combine): Union the
+ ranges of operand1 and operand2, not intersect.
+
+2020-10-26 Jan Hubicka <jh@suse.cz>
+
+ * attr-fnspec.h: Update toplevel comment.
+ (attr_fnspec::attr_fnspec): New constructor.
+ (attr_fnspec::arg_read_p,
+ attr_fnspec::arg_written_p,
+ attr_fnspec::arg_access_size_given_by_arg_p,
+ attr_fnspec::arg_single_access_p
+ attr_fnspec::loads_known_p
+ attr_fnspec::stores_known_p,
+ attr_fnspec::clobbers_errno_p): New member functions.
+ (gimple_call_fnspec): Declare.
+ (builtin_fnspec): Declare.
+ * builtins.c: Include attr-fnspec.h
+ (builtin_fnspec): New function.
+ * builtins.def (BUILT_IN_MEMCPY): Do not specify RET1 fnspec.
+ (BUILT_IN_MEMMOVE): Do not specify RET1 fnspec.
+ (BUILT_IN_MEMSET): Do not specify RET1 fnspec.
+ (BUILT_IN_STRCAT): Do not specify RET1 fnspec.
+ (BUILT_IN_STRCPY): Do not specify RET1 fnspec.
+ (BUILT_IN_STRNCAT): Do not specify RET1 fnspec.
+ (BUILT_IN_STRNCPY): Do not specify RET1 fnspec.
+ (BUILT_IN_MEMCPY_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_MEMMOVE_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_MEMSET_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_STRCAT_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_STRCPY_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_STRNCAT_CHK): Do not specify RET1 fnspec.
+ (BUILT_IN_STRNCPY_CHK): Do not specify RET1 fnspec.
+ * gimple.c (gimple_call_fnspec): Return attr_fnspec.
+ (gimple_call_arg_flags): Update.
+ (gimple_call_return_flags): Update.
+ * tree-ssa-alias.c (check_fnspec): New function.
+ (ref_maybe_used_by_call_p_1): Use fnspec for builtin handling.
+ (call_may_clobber_ref_p_1): Likewise.
+ (attr_fnspec::verify): Update verifier.
+ * calls.c (decl_fnspec): New function.
+ (decl_return_flags): Use it.
+
+2020-10-26 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97555
+ * range-op.cc (range_tests): Test 1-bit signed invert.
+ * value-range.cc (subtract_one): Adjust comment.
+ (add_one): New.
+ (irange::invert): Call add_one.
+
+2020-10-26 Jan Hubicka <jh@suse.cz>
+
+ * cgraph.h (cgraph_node::optimize_for_size_p): Return
+ optimize_size_level.
+ (cgraph_node::optimize_for_size_p): Update.
+ * coretypes.h (enum optimize_size_level): New enum.
+ * predict.c (unlikely_executed_edge_p): Microoptimize.
+ (optimize_function_for_size_p): Return optimize_size_level.
+ (optimize_bb_for_size_p): Likewise.
+ (optimize_edge_for_size_p): Likewise.
+ (optimize_insn_for_size_p): Likewise.
+ (optimize_loop_nest_for_size_p): Likewise.
+ * predict.h (optimize_function_for_size_p): Update declaration.
+ (optimize_bb_for_size_p): Update declaration.
+ (optimize_edge_for_size_p): Update declaration.
+ (optimize_insn_for_size_p): Update declaration.
+ (optimize_loop_for_size_p): Update declaration.
+ (optimize_loop_nest_for_size_p): Update declaration.
+
+2020-10-26 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (enum slp_instance_kind): New.
+ (vect_build_slp_instance): Split out from...
+ (vect_analyze_slp_instance): ... this.
+
+2020-10-26 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range.cc (range_of_builtin_call): Initialize zerov to 0.
+
+2020-10-26 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97576
+ * cgraphclones.c (cgraph_node::materialize_clone): Clear stmt
+ references.
+ * cgraphunit.c (mark_functions_to_output): Do not clear them here.
+ * ipa-inline-transform.c (inline_transform): Clear stmt references.
+ * symtab.c (symtab_node::clear_stmts_in_references): Make recursive
+ for clones.
+ * tree-ssa-structalias.c (ipa_pta_execute): Do not clear references.
+
+2020-10-26 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-builtins.c: Add FLAG STORE.
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for store intrinsics.
+
+2020-10-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR tree-optimization/97546
+ * gimple-ssa-store-merging.c (find_bswap_or_nop): Return NULL if
+ type is not INTEGER_CST.
+
+2020-10-26 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97521
+ * expr.c (const_scalar_mask_from_tree): Remove.
+ (expand_expr_real_1): Always VIEW_CONVERT integer mode
+ vector constants to an integer type.
+ * tree.c (build_truth_vector_type_for_mode): Use a single-bit
+ boolean component type for non-vector-mode mask_mode.
+
+2020-10-26 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/95458
+ * config/i386/i386-expand.c (ix86_expand_cmpstrn_or_cmpmem):
+ Return false for -mno-inline-all-stringops.
+
+2020-10-26 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/95151
+ * config/i386/i386-expand.c (ix86_expand_cmpstrn_or_cmpmem): New
+ function.
+ * config/i386/i386-protos.h (ix86_expand_cmpstrn_or_cmpmem): New
+ prototype.
+ * config/i386/i386.md (cmpmemsi): New pattern.
+
+2020-10-26 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/vector.md ("vcond_mask_<mode><mode>"): New expander.
+
+2020-10-26 Richard Biener <rguenther@suse.de>
+
+ * sbitmap.c (sbitmap_vector_alloc): Use size_t for byte
+ quantities to avoid overflow.
+
+2020-10-26 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97539
+ * tree-vect-loop-manip.c (vect_do_peeling): Reset out-of-loop
+ debug uses before peeling.
+
+2020-10-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * cgraph.h (struct cgraph_node): Make ipa_transforms_to_apply vl_ptr.
+ * ipa-inline-analysis.c (initialize_growth_caches): Disable insertion
+ and duplication hooks.
+ * ipa-inline-transform.c (clone_inlined_nodes): Clear
+ ipa_transforms_to_apply.
+ (save_inline_function_body): Disable insertion hoook for
+ ipa_saved_clone_sources.
+ * ipa-prop.c (ipcp_transformation_initialize): Disable insertion hook.
+ * ipa-prop.h (ipa_node_params_t): Disable insertion hook.
+ * ipa-reference.c (propagate): Disable insertion hoook.
+ * ipa-sra.c (ipa_sra_summarize_function): Move out of anonymous
+ namespace.
+ (ipa_sra_function_summaries::insert): New virtual function.
+ * passes.c (execute_one_pass): Do not add transforms to inline clones.
+ * symbol-summary.h (function_summary_base): Make insert and duplicate
+ hooks fail instead of silently producing empty summaries; add way to
+ disable duplication hooks
+ (call_summary_base): Likewise.
+ * tree-nested.c (nested_function_info::get_create): Disable insertion
+ hooks
+ (maybe_record_nested_function): Likewise.
+
+2020-10-26 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * cfg.c (debug_bb): New overloaded function.
+ (debug_bb_n): New overloaded function.
+ * cfg.h (debug_bb): New declaration.
+ (debug_bb_n): New declaration.
+ * print-rtl.c (debug_bb_slim): Call debug_bb with flags.
+
+2020-10-24 H.J. Lu <hjl.tools@gmail.com>
+
+ PR bootstrap/97451
+ * configure.ac (HAVE_AS_WORKING_DWARF_4_FLAG): Renamed to ...
+ (HAVE_AS_WORKING_DWARF_N_FLAG): This. Don't define if there is
+ an extra assembly input file in debug info. Replace success
+ with dwarf4_success in the 32-bit --gdwarf-4 check.
+ * dwarf2out.c (asm_outputs_debug_line_str): Check
+ HAVE_AS_WORKING_DWARF_N_FLAG instead of
+ HAVE_AS_WORKING_DWARF_4_FLAG.
+ * gcc.c (ASM_DEBUG_SPEC): Likewise.
+ (ASM_DEBUG_OPTION_SPEC): Likewise.
+ * config.in: Regenerated.
+ * configure: Likewise.
+
+2020-10-24 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97538
+ * calls.c (get_size_range): Handle undefined ranges.
+
+2020-10-24 Martin Liska <mliska@suse.cz>
+
+ * cgraph.c (cgraph_node::former_thunk_p): Move out of CHECKING_P
+ macro.
+
+2020-10-24 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Limit
+ AND addressing to just lvx/stvx style addresses.
+
+2020-10-24 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.md (cstore<mode>4): Don't call
+ rs6000_emit_int_cmove for power10 when -mno-isel.
+
+2020-10-23 Jan Hubicka <hubicka@ucw.cz>
+
+ * Makefile.in: Add symtab-thunks.o
+ (GTFILES): Add symtab-thunks.h and symtab-thunks.cc; remove cgraphunit.c
+ * cgraph.c: Include symtab-thunks.h.
+ (cgraph_node::create_thunk): Update
+ (symbol_table::create_edge): Update
+ (cgraph_node::dump): Update
+ (cgraph_node::call_for_symbol_thunks_and_aliases): Update
+ (set_nothrow_flag_1): Update
+ (set_malloc_flag_1): Update
+ (set_const_flag_1): Update
+ (collect_callers_of_node_1): Update
+ (clone_of_p): Update
+ (cgraph_node::verify_node): Update
+ (cgraph_node::function_symbol): Update
+ (cgraph_c_finalize): Call thunk_info::release.
+ (cgraph_node::has_thunk_p): Update
+ (cgraph_node::former_thunk_p): Move here from cgraph.h; reimplement.
+ * cgraph.h (struct cgraph_thunk_info): Rename to symtab-thunks.h.
+ (cgraph_node): Remove thunk field; add thunk bitfield.
+ (cgraph_node::expand_thunk): Move to symtab-thunks.h
+ (symtab_thunks_cc_finalize): Declare.
+ (cgraph_node::has_gimple_body_p): Update.
+ (cgraph_node::former_thunk_p): Update.
+ * cgraphclones.c: Include symtab-thunks.h.
+ (duplicate_thunk_for_node): Update.
+ (cgraph_edge::redirect_callee_duplicating_thunks): Update.
+ (cgraph_node::expand_all_artificial_thunks): Update.
+ (cgraph_node::create_edge_including_clones): Update.
+ * cgraphunit.c: Include symtab-thunks.h.
+ (vtable_entry_type): Move to symtab-thunks.c.
+ (cgraph_node::analyze): Update.
+ (analyze_functions): Update.
+ (mark_functions_to_output): Update.
+ (thunk_adjust): Move to symtab-thunks.c
+ (cgraph_node::expand_thunk): Move to symtab-thunks.c
+ (cgraph_node::assemble_thunks_and_aliases): Update.
+ (output_in_order): Update.
+ (cgraphunit_c_finalize): Do not clear vtable_entry_type.
+ (cgraph_node::create_wrapper): Update.
+ * gengtype.c (open_base_files): Add symtab-thunks.h
+ * ipa-comdats.c (propagate_comdat_group): UPdate.
+ (ipa_comdats): Update.
+ * ipa-cp.c (determine_versionability): UPdate.
+ (gather_caller_stats): Update.
+ (count_callers): Update
+ (set_single_call_flag): Update
+ (initialize_node_lattices): Update
+ (call_passes_through_thunk_p): Update
+ (call_passes_through_thunk): Update
+ (propagate_constants_across_call): Update
+ (find_more_scalar_values_for_callers_subset): Update
+ (has_undead_caller_from_outside_scc_p): Update
+ * ipa-fnsummary.c (evaluate_properties_for_edge): Update.
+ (compute_fn_summary): Update.
+ (inline_analyze_function): Update.
+ * ipa-icf.c: Include symtab-thunks.h.
+ (sem_function::equals_wpa): Update.
+ (redirect_all_callers): Update.
+ (sem_function::init): Update.
+ (sem_function::parse): Update.
+ * ipa-inline-transform.c: Include symtab-thunks.h.
+ (inline_call): Update.
+ (save_inline_function_body): Update.
+ (preserve_function_body_p): Update.
+ * ipa-inline.c (inline_small_functions): Update.
+ * ipa-polymorphic-call.c: Include alloc-pool.h, symbol-summary.h,
+ symtab-thunks.h
+ (ipa_polymorphic_call_context::ipa_polymorphic_call_context): Update.
+ * ipa-pure-const.c: Include symtab-thunks.h.
+ (analyze_function): Update.
+ * ipa-sra.c (check_for_caller_issues): Update.
+ * ipa-utils.c (ipa_reverse_postorder): Update.
+ (ipa_merge_profiles): Update.
+ * ipa-visibility.c (non_local_p): Update.
+ (cgraph_node::local_p): Update.
+ (function_and_variable_visibility): Update.
+ * ipa.c (symbol_table::remove_unreachable_nodes): Update.
+ * lto-cgraph.c: Include alloc-pool.h, symbol-summary.h and
+ symtab-thunks.h
+ (lto_output_edge): Update.
+ (lto_output_node): Update.
+ (compute_ltrans_boundary): Update.
+ (output_symtab): Update.
+ (verify_node_partition): Update.
+ (input_overwrite_node): Update.
+ (input_node): Update.
+ * lto-streamer-in.c (fixup_call_stmt_edges): Update.
+ * symtab-thunks.cc: New file.
+ * symtab-thunks.h: New file.
+ * toplev.c (toplev::finalize): Call symtab_thunks_cc_finalize.
+ * trans-mem.c (ipa_tm_mayenterirr_function): Update.
+ (ipa_tm_execute): Update.
+ * tree-inline.c (expand_call_inline): Update.
+ * tree-nested.c (create_nesting_tree): Update.
+ (convert_all_function_calls): Update.
+ (gimplify_all_functions): Update.
+ * tree-profile.c (tree_profiling): Update.
+ * tree-ssa-structalias.c (associate_varinfo_to_alias): Update.
+ * tree.c (free_lang_data_in_decl): Update.
+ * value-prof.c (init_node_map): Update.
+
+2020-10-23 Marek Polacek <polacek@redhat.com>
+
+ PR c++/91741
+ * doc/invoke.texi: Document -Wsizeof-array-div.
+
+2020-10-23 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97552
+ * attribs.c (init_attr_rdwr_indices): Handle static VLA parameters.
+
+2020-10-23 Douglas Rupp <rupp@adacore.com>
+
+ * config/vxworks.h (VXWORKS_NET_LIBS_RTP): Use -lrtnet if
+ rtnetStackLib.h is available,fallback to -lnet otherwise.
+
+2020-10-23 Douglas Rupp <rupp@adacore.com>
+
+ * gcc.c (if-exists-then-else): New built-in spec function.
+ * doc/invoke.texi: Document it.
+
+2020-10-23 Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
+
+ * doc/extend.texi (PowerPC Built-in Functions): Replace
+ extraneous characters with whitespace.
+
+2020-10-23 Martin Liska <mliska@suse.cz>
+
+ * gcov.c (read_count_file): Never call gcov_sync with a negative
+ value.
+
+2020-10-23 Jakub Jelinek <jakub@redhat.com>
+
+ * Makefile.in (PLUGIN_HEADERS): Add gomp-constants.h and $(EXPR_H).
+ (s-header-vars): Accept not just spaces but also tabs between *_H name
+ and =. Handle common/config/ headers similarly to config. Don't
+ throw away everything from first ... to last / on the remaining
+ string, instead skip just ... to corresponding last / without
+ intervening spaces and tabs.
+ (install-plugin): Treat common/config headers like config headers.
+ * config/i386/t-i386 (TM_H): Add
+ $(srcdir)/common/config/i386/i386-cpuinfo.h.
+
+2020-10-23 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97164
+ * stor-layout.c (layout_type): Also reject arrays where element size
+ is constant, but not a multiple of element alignment.
+
+2020-10-23 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-ssa-loop-ivopts.c (analyze_and_mark_doloop_use): Bail out if
+ the loop is subject to a pragma Unroll with no specific count.
+
+2020-10-23 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/mve.md (mve_vsubq<mode>): New entry for vsub instruction
+ using expression 'minus'.
+ (mve_vsubq_f<mode>): Use minus instead of VSUBQ_F unspec.
+ * config/arm/neon.md (sub<mode>3, sub<mode>3_fp16): Removed.
+ (neon_vsub<mode>): Use gen_sub<mode>3 instead of gen_sub<mode>3_fp16.
+ * config/arm/vec-common.md (sub<mode>3): Use the new mode macros
+ ARM_HAVE_<MODE>_ARITH. Use iterator VDQ instead of VALL.
+
+2020-10-23 Martin Liska <mliska@suse.cz>
+
+ PR lto/97524
+ * lto-wrapper.c (make_exists): New function.
+ (run_gcc): Use it to check that make is present and working
+ for parallel execution.
+
+2020-10-23 Richard Biener <rguenther@suse.de>
+
+ Revert:
+ 2020-10-22 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97521
+ * expr.c (expand_expr_real_1): Be more careful when
+ expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs.
+
+2020-10-23 Kewen Lin <linkw@linux.ibm.com>
+
+ * tree-vect-loop.c (vect_transform_loop): Remove the redundant
+ LOOP_VINFO_FULLY_MASKED_P check.
+
+2020-10-23 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/mve.md (mve_vsubq<mode>): New entry for vsub instruction
+ using expression 'minus'.
+ (mve_vsubq_f<mode>): Use minus instead of VSUBQ_F unspec.
+ * config/arm/neon.md (sub<mode>3, sub<mode>3_fp16): Removed.
+ (neon_vsub<mode>): Use gen_sub<mode>3 instead of gen_sub<mode>3_fp16.
+ * config/arm/vec-common.md (sub<mode>3): Use the new mode macros
+ ARM_HAVE_<MODE>_ARITH. Use iterator VDQ instead of VALL.
+
+2020-10-22 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_emit_xxspltidp_v2df): Delete
+ debug printf. Remove trailing ".\n" from inform message.
+ Break long line.
+
+2020-10-22 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-gori.cc (is_gimple_logical_p): Use types_compatible_p
+ for logical compatibility.
+ (logical_stmt_cache::cacheable_p): Ditto.
+
+2020-10-22 Jan Hubicka <hubicka@ucw.cz>
+
+ * cgraph.c (cgraph_node::get_untransformed_body): Perform lazy
+ clone materialization.
+ * cgraph.h (cgraph_node::materialize_clone): Declare.
+ (symbol_table::materialize_all_clones): Remove.
+ * cgraphclones.c (cgraph_materialize_clone): Turn to ...
+ (cgraph_node::materialize_clone): .. this one; move here
+ dumping from symbol_table::materialize_all_clones.
+ (symbol_table::materialize_all_clones): Remove.
+ * cgraphunit.c (mark_functions_to_output): Clear stmt references.
+ (cgraph_node::expand): Initialize bitmaps early;
+ do not call execute_all_ipa_transforms if there are no transforms.
+ * ipa-inline-transform.c (save_inline_function_body): Fix formating.
+ (inline_transform): Materialize all clones before function is modified.
+ * ipa-param-manipulation.c (ipa_param_adjustments::modify_call):
+ Materialize clone if needed.
+ * ipa.c (class pass_materialize_all_clones): Remove.
+ (make_pass_materialize_all_clones): Remove.
+ * passes.c (execute_all_ipa_transforms): Materialize all clones.
+ * passes.def: Remove pass_materialize_all_clones.
+ * tree-pass.h (make_pass_materialize_all_clones): Remove.
+ * tree-ssa-structalias.c (ipa_pta_execute): Clear refs.
+
+2020-10-22 Will Schmidt <will_schmidt@vnet.ibm.com>
+
+ * config/rs6000/altivec.h (vec_xl_zext, vec_xl_sext, vec_xst_trunc):
+ New defines.
+ * config/rs6000/rs6000-builtin.def (BU_P10V_OVERLOAD_X): New builtin
+ macro.
+ (BU_P10V_AV_X): New builtin macro.
+ (se_lxvrhbx, se_lxrbhx, se_lxvrwx, se_lxvrdx): Define internal names
+ for load and sign extend vector element.
+ (ze_lxvrbx, ze_lxvrhx, ze_lxvrwx, ze_lxvrdx): Define internal names
+ for load and zero extend vector element.
+ (tr_stxvrbx, tr_stxvrhx, tr_stxvrwx, tr_stxvrdx): Define internal names
+ for truncate and store vector element.
+ (se_lxvrx, ze_lxvrx, tr_stxvrx): Define internal names for overloaded
+ load/store rightmost element.
+ * config/rs6000/rs6000-call.c (altivec_builtin_types): Define the
+ internal monomorphs P10_BUILTIN_SE_LXVRBX, P10_BUILTIN_SE_LXVRHX,
+ P10_BUILTIN_SE_LXVRWX, P10_BUILTIN_SE_LXVRDX,
+ P10_BUILTIN_ZE_LXVRBX, P10_BUILTIN_ZE_LXVRHX, P10_BUILTIN_ZE_LXVRWX,
+ P10_BUILTIN_ZE_LXVRDX,
+ P10_BUILTIN_TR_STXVRBX, P10_BUILTIN_TR_STXVRHX, P10_BUILTIN_TR_STXVRWX,
+ P10_BUILTIN_TR_STXVRDX,
+ (altivec_expand_lxvr_builtin): New expansion for load element builtins.
+ (altivec_expand_stv_builtin): Update to for truncate and store builtins.
+ (altivec_expand_builtin): Add clases for load/store rightmost builtins.
+ (altivec_init_builtins): Add def_builtin entries for
+ __builtin_altivec_se_lxvrbx, __builtin_altivec_se_lxvrhx,
+ __builtin_altivec_se_lxvrwx, __builtin_altivec_se_lxvrdx,
+ __builtin_altivec_ze_lxvrbx, __builtin_altivec_ze_lxvrhx,
+ __builtin_altivec_ze_lxvrwx, __builtin_altivec_ze_lxvrdx,
+ __builtin_altivec_tr_stxvrbx, __builtin_altivec_tr_stxvrhx,
+ __builtin_altivec_tr_stxvrwx, __builtin_altivec_tr_stxvrdx,
+ __builtin_vec_se_lxvrx, __builtin_vec_ze_lxvrx, __builtin_vec_tr_stxvrx.
+ * config/rs6000/vsx.md (vsx_lxvr<wd>x, vsx_stxvr<wd>x, vsx_stxvr<wd>x):
+ New define_insn entries.
+ * doc/extend.texi: Add documentation for vsx_xl_sext, vsx_xl_zext,
+ and vec_xst_trunc.
+
+2020-10-22 Will Schmidt <will_schmidt@vnet.ibm.com>
+
+ * config/rs6000/vsx.md (enum unspec): Add
+ UNSPEC_EXTENDDITI2 and UNSPEC_MTVSRD_DITI_W1 entries.
+ (mtvsrdd_diti_w1, extendditi2_vector): New define_insns.
+ (extendditi2): New define_expand.
+
+2020-10-22 Alexandre Oliva <oliva@adacore.com>
+
+ * config/i386/mingw-w64.h (TARGET_LIBC_HAS_FUNCTION): Enable
+ sincos optimization.
+
+2020-10-22 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/vsx.md (vec_cntmb_<mode>, vec_extract_<mode>),
+ (vec_expand_<mode>): Replace <VSX_MM_SUFFIX> with <wd>.
+
+2020-10-22 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_analyze_slp_instance): Refactor so
+ computing a vector type early is not needed, for store group
+ splitting compute a new vector type based on the desired
+ group size.
+
+2020-10-22 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97521
+ * expr.c (expand_expr_real_1): Be more careful when
+ expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs.
+
+2020-10-22 David Malcolm <dmalcolm@redhat.com>
+
+ * ipa-modref-tree.c (selftest::test_insert_search_collapse): Fix
+ leak.
+ (selftest::test_merge): Fix leaks.
+
+2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR target/97502
+ * config/s390/vector.md ("vec_cmp<VI_HW:mode><VI_HW:mode>")
+ ("vec_cmpu<VI_HW:mode><VI_HW:mode>"): New expanders.
+
+2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR rtl-optimization/97439
+ * dfp.c (decimal_real_maxval): Set the sign flag in the
+ generated number.
+
+2020-10-22 Martin Liska <mliska@suse.cz>
+
+ PR c/94722
+ * cfgexpand.c (stack_protect_decl_phase):
+ Guard with lookup_attribute("no_stack_protector") at
+ various places.
+ (expand_used_vars): Likewise here.
+ * doc/extend.texi: Document no_stack_protector attribute.
+
+2020-10-22 Martin Liska <mliska@suse.cz>
+
+ * cfgexpand.c: Move the enum to ...
+ * coretypes.h (enum stack_protector): ... here.
+ * function.c (assign_parm_adjust_stack_rtl): Use the stack_protector
+ enum.
+
+2020-10-22 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/multilib-generator: Add TODO, import itertools
+ and functools.reduce.
+ Handle expantion operator.
+ (LONG_EXT_PREFIXES): New.
+ (arch_canonicalize): Update comment and improve python3
+ debuggability/compatibility.
+ (add_underline_prefix): New.
+ (_expand_combination): Ditto.
+ (unique): Ditto.
+ (expand_combination): Ditto.
+
+2020-10-22 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-ssa-phiopt.c (cond_removal_in_popcount_clz_ctz_pattern):
+ For CLZ and CTZ tests, use type temporary instead of mode.
+
+2020-10-22 Jakub Jelinek <jakub@redhat.com>
+
+ * config.gcc (x86_archs): Add samuel-2, nehemiah, c7 and esther.
+ (x86_64_archs): Add eden-x2, nano, nano-1000, nano-2000, nano-3000,
+ nano-x2, eden-x4, nano-x4, x86-64-v2, x86-64-v3 and x86-64-v4.
+ (i[34567]86-*-* | x86_64-*-*): Only allow x86-64-v* as argument
+ to --with-arch_64=.
+
+2020-10-22 Jan Hubicka <jh@suse.cz>
+
+ * ipa-pure-const.c (funct_state_summary_t::insert): Free stale
+ summaries.
+
+2020-10-22 Jan Hubicka <hubicka@ucw.cz>
+
+ * cgraph.c: Include tree-nested.h
+ (cgraph_node::create): Call maybe_record_nested_function.
+ (cgraph_node::remove): Do not remove function from nested function
+ infos.
+ (cgraph_node::dump): Update.
+ (cgraph_node::unnest): Move to tree-nested.c
+ (cgraph_node::verify_node): Update.
+ (cgraph_c_finalize): Call nested_function_info::release.
+ * cgraph.h (struct symtab_node): Remove nested function info.
+ * cgraphclones.c (cgraph_node::create_clone): Do not clone nested
+ function info.
+ * cgraphunit.c (cgraph_node::analyze): Update.
+ (cgraph_node::expand): Do not worry about nested functions; they are
+ lowered.
+ (symbol_table::finalize_compilation_unit): Call
+ nested_function_info::release.
+ * gimplify.c: Include tree-nested.h
+ (unshare_body): Update.
+ (unvisit_body): Update.
+ * omp-offload.c (omp_discover_implicit_declare_target): Update.
+ * tree-nested.c: Include alloc-pool.h, tree-nested.h, symbol-summary.h
+ (nested_function_sum): New static variable.
+ (nested_function_info::get): New member function.
+ (nested_function_info::get_create): New member function.
+ (unnest_function): New function.
+ (nested_function_info::~nested_function_info): New member function.
+ (nested_function_info::release): New function.
+ (maybe_record_nested_function): New function.
+ (lookup_element_for_decl): Update.
+ (check_for_nested_with_variably_modified): Update.
+ (create_nesting_tree): Update.
+ (unnest_nesting_tree_1): Update.
+ (gimplify_all_functions): Update.
+ (lower_nested_functions): Update.
+ * tree-nested.h (class nested_function_info): New class.
+ (maybe_record_nested_function): Declare.
+ (unnest_function): Declare.
+ (first_nested_function): New inline function.
+ (next_nested_function): New inline function.
+ (nested_function_origin): New inline function.
+
+2020-10-22 liuhongt <hongtao.liu@intel.com>
+
+ PR rtl-optimization/97249
+ * simplify-rtx.c (simplify_binary_operation_1): Simplify
+ vec_select of a subreg of X to a vec_select of X.
+
+2020-10-22 liuhongt <hongtao.liu@intel.com>
+
+ PR target/87767
+ * config/i386/constraints.md ("Br"): New special memory
+ constraint.
+ * config/i386/i386-expand.c (ix86_binary_operator_ok): Both
+ source operand cannot be in memory or bcst_memory_operand.
+ * config/i386/i386.c (ix86_print_operand): Print bcst_mem_operand.
+ * config/i386/i386.h (VALID_BCST_MODE_P): New.
+ * config/i386/predicates.md (bcst_mem_operand): New predicate
+ for AVX512 embedding broadcast memory operand.
+ (bcst_vector_operand): New predicate, vector_operand or
+ bcst_mem_operand.
+ * config/i386/sse.md
+ (*<plusminus_insn><mode>3<mask_name><round_name>): Extend
+ predicate and constraints to handle bcst_mem_operand.
+ (*mul<mode>3<mask_name><round_name>): Ditto.
+ (<sse>_div<mode>3<mask_name><round_name>): Ditto.
+ (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (*<plusminus_insn><mode>3): Ditto.
+ (avx512dq_mul<mode>3<mask_name>): Ditto.
+ (*<sse4_1_avx2>_mul<mode>3<mask_name>): Ditto.
+ (*andnot<mode>3): Ditto.
+ (<mask_codefor><code><mode>3<mask_name>): Ditto.
+ (*sub<mode>3<mask_name>_bcst): Removed.
+ (*add<mode>3<mask_name>_bcst): Ditto.
+ (*mul<mode>3<mask_name>_bcst): Ditto.
+ (*<avx512>_div<mode>3<mask_name>_bcst): Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3):
+ Ditto.
+ (*sub<mode>3_bcst): Ditto.
+ (*add<mode>3_bcst): Ditto.
+ (*avx512dq_mul<mode>3<mask_name>_bcst): Ditto.
+ (*avx512f_mul<mode>3<mask_name>_bcst): Ditto.
+ (*andnot<mode>3_bcst): Ditto.
+ (*<code><mode>3_bcst): Ditto.
+ * config/i386/subst.md (bcst_round_constraint): New subst
+ attribute.
+ (bcst_round_nimm_predicate): Ditto.
+ (bcst_mask_prefix3): Ditto.
+ (bcst_mask_prefix4): Ditto.
+
+2020-10-22 liuhongt <hongtao.liu@intel.com>
+
+ PR target/87767
+ * ira-costs.c (record_operand_costs): Extract memory operand
+ from recog_data.operand[i] for record_address_regs.
+ (record_reg_classes): Extract memory operand from OP for
+ conditional judgement MEM_P.
+ * ira.c (ira_setup_alts): Ditto.
+ * lra-constraints.c (extract_mem_from_operand): New function.
+ (satisfies_memory_constraint_p): Extract memory operand from
+ OP for decompose_mem_address, return false when there's no
+ memory operand inside OP.
+ (process_alt_operands): Remove MEM_P (op) since it would be
+ judged in satisfies_memory_constraint_p.
+ * recog.c (asm_operand_ok): Extract memory operand from OP for
+ judgement of memory_operand (OP, VOIDmode).
+ (constrain_operands): Don't unwrapper unary operator when
+ there's memory operand inside.
+ * rtl.h (extract_mem_from_operand): New decl.
+
+2020-10-22 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/mve.md (mve_vmaxq_<supf><mode>): Replace with ...
+ (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>): ... these new insns to
+ use smax/umax instead of VMAXQ.
+ (mve_vminq_<supf><mode>): Replace with ...
+ (mve_vminq_s<mode>, mve_vminq_u<mode>): ... these new insns to
+ use smin/umin instead of VMINQ.
+ (mve_vmaxnmq_f<mode>): Use smax instead of VMAXNMQ_F.
+ (mve_vminnmq_f<mode>): Use smin instead of VMINNMQ_F.
+ * config/arm/vec-common.md (smin<mode>3): Use the new mode macros
+ ARM_HAVE_<MODE>_ARITH.
+ (umin<mode>3, smax<mode>3, umax<mode>3): Likewise.
+
+2020-10-22 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97520
+ * gimple-range.cc (range_of_non_trivial_assignment): Handle x = &a
+ by returning a non-zero range.
+
+2020-10-22 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/mve.md (mve_vmulq<mode>): New entry for vmul instruction
+ using expression 'mult'.
+ (mve_vmulq_f<mode>): Use mult instead of VMULQ_F.
+ * config/arm/neon.md (mul<mode>3): Removed.
+ * config/arm/vec-common.md (mul<mode>3): Use the new mode macros
+ ARM_HAVE_<MODE>_ARITH. Use mode iterator VDQWH instead of VALLW.
+
+2020-10-22 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97515
+ * value-query.cc (range_query::value_of_expr): If the result is
+ UNDEFINED, check to see if the global value is a constant.
+ (range_query::value_on_edge): Ditto.
+
+2020-10-21 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97445
+ * ipa-inline.c (inline_insns_single): Add hint2 parameter.
+ (inline_insns_auto): Add hint2 parameter.
+ (can_inline_edge_by_limits_p): Update.
+ (want_inline_small_function_p): Update.
+ (wrapper_heuristics_may_apply): Update.
+
+2020-10-21 Richard Biener <rguenther@suse.de>
+ Andrew MacLeod <amacleod@redhat.com>
+ Martin Liska <mliska@suse.cz>
+
+ PR target/97360
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove call to
+ build_distinct_type_copy().
+
+2020-10-21 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97445
+ * ipa-fnsummary.c (ipa_dump_hints): Add INLINE_HINT_builtin_constant_p.
+ (ipa_fn_summary::~ipa_fn_summary): Free builtin_constant_p_parms.
+ (ipa_fn_summary_t::duplicate): Duplicate builtin_constant_p_parms.
+ (ipa_dump_fn_summary): Dump builtin_constant_p_parms.
+ (add_builtin_constant_p_parm): New function
+ (set_cond_stmt_execution_predicate): Update builtin_constant_p_parms.
+ (ipa_call_context::estimate_size_and_time): Set
+ INLINE_HINT_builtin_constant_p..
+ (ipa_merge_fn_summary_after_inlining): Merge builtin_constant_p_parms.
+ (inline_read_section): Read builtin_constant_p_parms.
+ (ipa_fn_summary_write): Write builtin_constant_p_parms.
+ * ipa-fnsummary.h (enum ipa_hints_vals): Add
+ INLINE_HINT_builtin_constant_p.
+ * ipa-inline.c (want_inline_small_function_p): Use
+ INLINE_HINT_builtin_constant_p.
+ (edge_badness): Use INLINE_HINT_builtin_constant_p.
+
+2020-10-21 Douglas Rupp <rupp@adacore.com>
+
+ * config/vx-common.h (LINK_SPEC, LIB_SPEC): Remove #undef.
+
+2020-10-21 Douglas Rupp <rupp@adacore.com>
+ Olivier Hainque <hainque@adacore.com>
+
+ * config.gcc (powerpc*-wrs-vxworks7r*): New case.
+ * config/rs6000/vxworks.h: Rework to handle VxWorks7.
+ Refactor as common bits + vx6 vs vx7 ones. For the
+ latter, rely essentially on the Linux configuration
+ and adjust CPU to _VX_CPU in CPP_SPEC. Add a case
+ for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics
+ to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS
+ for vx7.
+
+2020-10-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97500
+ * tree-vect-slp.c (vect_analyze_slp_backedges): Do not
+ fill backedges for inductions.
+
+2020-10-21 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97506
+ * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move
+ op_true to dest directly when op_true equals op_false.
+
+2020-10-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97503
+ * tree-ssa-phiopt.c: Include internal-fn.h.
+ (cond_removal_in_popcount_pattern): Rename to ...
+ (cond_removal_in_popcount_clz_ctz_pattern): ... this. Handle not just
+ popcount, but also clz and ctz if it has C?Z_DEFINED_VALUE_AT_ZERO 2.
+
+2020-10-21 Richard Biener <rguenther@suse.de>
+
+ * cfg.c (htab_bb_copy_original_entry): Remove.
+ (bb_copy_hasher): Likewise.
+ (bb_original, bb_copy, loop_copy): Use
+ hash_map<int_hash<int, -1, -2>, int>.
+ (original_copy_bb_pool): Remove.
+ (initialize_original_copy_tables): Adjust.
+ (reset_original_copy_tables): Likewise.
+ (free_original_copy_tables): Likewise.
+ (original_copy_tables_initialized_p): Likewise.
+ (copy_original_table_clear): Simplify.
+ (copy_original_table_set): Likewise.
+ (get_bb_original): Likewise.
+ (get_bb_copy): Likewise.
+ (get_loop_copy): Likewise.
+
+2020-10-21 Richard Biener <rguenther@suse.de>
+
+ * cfghooks.c (copy_bbs): Split out loop computing new_edges.
+
+2020-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range.cc (gimple_ranger::range_of_ssa_name_with_loop_info):
+ Remove TREE_OVERFLOW special case.
+ * vr-values.c (bounds_of_var_in_loop): Adjust overflow for
+ invariants.
+
+2020-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * vr-values.h: Remove simplify_cond_using_ranges_2.
+ (range_fits_type_p): New.
+ * vr-values.c (range_fits_type_p): Remove static qualifier.
+ (vrp_simplify_cond_using_ranges): Move...
+ * tree-vrp.c (vrp_simplify_cond_using_ranges): ...to here.
+
+2020-10-20 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97505
+ * vr-values.c (vr_values::extract_range_basic): Trap if
+ vr_values version disagrees with range_of_builtin_call.
+
+2020-10-20 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Don't implcitly enable Altivec ABI if set on the command line.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * calls.c (get_size_range): Adjust to work with ranger.
+ * calls.h (get_size_range): Add ranger argument to prototype.
+ * gimple-ssa-warn-restrict.c (class wrestrict_dom_walker): Remove.
+ (check_call): Pull out of wrestrict_dom_walker into a
+ static function.
+ (wrestrict_dom_walker::before_dom_children): Rename to...
+ (wrestrict_walk): ...this.
+ (pass_wrestrict::execute): Instantiate ranger.
+ (class builtin_memref): Add stmt and query fields.
+ (builtin_access::builtin_access): Add range_query field.
+ (builtin_memref::builtin_memref): Same.
+ (builtin_memref::extend_offset_range): Same.
+ (builtin_access::builtin_access): Make work with ranger.
+ (wrestrict_dom_walker::check_call): Pull out into...
+ (check_call): ...here.
+ (check_bounds_or_overlap): Add range_query argument.
+ * gimple-ssa-warn-restrict.h (check_bounds_or_overlap):
+ Add range_query and gimple stmt arguments.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-ssa-warn-alloca.c (enum alloca_type): Remove
+ ALLOCA_BOUND_UNKNOWN and ALLOCA_CAST_FROM_SIGNED.
+ (warn_limit_specified_p): New.
+ (alloca_call_type_by_arg): Remove.
+ (cast_from_signed_p): Remove.
+ (is_max): Remove.
+ (alloca_call_type): Remove heuristics and replace with call into
+ ranger.
+ (pass_walloca::execute): Instantiate ranger.
+
+2020-10-20 Tobias Burnus <tobias@codesourcery.com>
+
+ * lto-wrapper.c (run_gcc): Use proper variable for
+ %u.ltrans_args dump suffix.
+
+2020-10-20 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for get/set reg intrinsics.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range.cc (gimple_ranger::range_of_builtin_ubsan_call):
+ Make externally visble...
+ (range_of_builtin_ubsan_call): ...here. Add range_query argument.
+ (gimple_ranger::range_of_builtin_call): Make externally visible...
+ (range_of_builtin_call): ...here. Add range_query argument.
+ * gimple-range.h (range_of_builtin_call): Move out from class and
+ make externally visible.
+ * vr-values.c (vr_values::extract_range_basic): Abstract out
+ builtin handling to...
+ (vr_values::range_of_expr): Handle non SSAs.
+ (vr_values::extract_range_builtin): ...here.
+ * vr-values.h (class vr_values): Add extract_range_builtin.
+ (range_of_expr): Rename NAME to EXPR.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97501
+ * gimple-range.cc (gimple_ranger::range_of_ssa_name_with_loop_info):
+ Saturate overflows returned from SCEV.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::operator=): Split up call to
+ copy_legacy_range into...
+ (irange::copy_to_legacy): ...this.
+ (irange::copy_legacy_to_multi_range): ...and this.
+ (irange::copy_legacy_range): Remove.
+ * value-range.h: Remove copoy_legacy_range.
+ Add copy_legacy_to_multi_range and copy_to_legacy.
+
+2020-10-20 Tobias Burnus <tobias@codesourcery.com>
+
+ * doc/invoke.texi (NVPTX options): Use @item not @itemx.
+
+2020-10-20 Richard Biener <rguenther@suse.de>
+
+ * tree-cfg.c (reinstall_phi_args): Remove.
+ (gimple_split_edge): Remove PHIs around the edge redirection
+ to avoid touching them at all.
+
+2020-10-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vectorizable_reduction): Use the correct
+ loops latch edge for the PHI arg lookup.
+
+2020-10-20 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.md (andneghi3): Allow general operand for
+ op1 and update output assembler template.
+
+2020-10-20 Tobias Burnus <tobias@codesourcery.com>
+
+ * collect-utils.c (collect_execute, fork_execute): Add at-file suffix
+ argument.
+ * collect-utils.h (collect_execute, fork_execute): Update prototype.
+ * collect2.c (maybe_run_lto_and_relink, do_link, main, do_dsymutil):
+ Update calls by passing NULL.
+ * config/i386/intelmic-mkoffload.c (compile_for_target,
+ generate_host_descr_file, prepare_target_image, main): Likewise.
+ * config/gcn/mkoffload.c (compile_native, main): Pass at-file suffix.
+ * config/nvptx/mkoffload.c (compile_native, main): Likewise.
+ * lto-wrapper.c (compile_offload_image): Likewise.
+
+2020-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op.cc (operator_rshift::op1_range): Special case
+ shifting by zero.
+
+2020-10-20 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97496
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Guard extern
+ promotion with not in pattern.
+
+2020-10-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390.c (s390_expand_vec_strlen): Add alignment
+ for memory access inside loop.
+
+2020-10-19 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97360
+ * gimple-range.h (range_compatible_p): New.
+ * gimple-range-gori.cc (is_gimple_logical_p): Use range_compatible_p.
+ (range_is_either_true_or_false): Ditto.
+ (gori_compute::outgoing_edge_range_p): Cast result to the correct
+ type if necessary.
+ (logical_stmt_cache::cacheable_p): Use range_compatible_p.
+ * gimple-range.cc (gimple_ranger::calc_stmt): Check range_compatible_p
+ before casting the range.
+ (gimple_ranger::range_on_exit): Use range_compatible_p.
+ (gimple_ranger::range_on_edge): Ditto.
+
+2020-10-19 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/97456
+ * tree-complex.c (set_component_ssa_name): Do not replace ignored decl
+ default definitions with new component vars. Reorder if conditions.
+
+2020-10-19 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/vsx.md (vextract_fp_from_shorth): Fix vals_be.
+ (vextract_fp_from_shortl) Same.
+
+2020-10-19 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97488
+ * range-op.cc (operator_lshift::op1_range): Handle large right shifts.
+
+2020-10-19 Martin Liska <mliska@suse.cz>
+
+ * ipa-modref.c (compute_parm_map): Clear vector.
+
+2020-10-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97486
+ * tree-vect-slp.c (vect_slp_function): Split after stmts
+ ending a BB.
+
+2020-10-19 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/invoke.texi (OPptimize Options): Add missing closing
+ parenthesis.
+
+2020-10-19 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97467
+ * range-op.cc (operator_lshift::op1_range): Handle shifts by 0.
+
+2020-10-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97466
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
+ spurious assert, re-indent.
+
+2020-10-19 Li Jia He <helijia@gcc.gnu.org>
+
+ PR tree-optimization/66552
+ * match.pd (x << (n % C) -> x << (n & C-1)): New simplification.
+
+2020-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-cfg.c (verify_gimple_comparison): Drop special-case
+ for pointer comparison.
+
+2020-10-16 Andrew MacLeod <amacleod@redhat.com>
+
+ * vr-values.c (dump_all_value_ranges): Only dump names which are
+ still active.
+
+2020-10-16 Andrew MacLeod <amacleod@redhat.com>
+
+ * range-op.cc (pointer_plus_operator::wi_fold): Make pointer_plus
+ [0, 0] + const return a [const, const] range.
+
+2020-10-16 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-ssa-evrp.c (hybrid_folder::value_on_edge): Call
+ evrp_folder::value_of_expr directly.
+ (hybrid_folder::value_of_stmt): Ditto.
+
+2020-10-16 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97462
+ * range-op.cc (operator_lshift::op1_range): Don't trap on negative
+ shifts.
+
+2020-10-16 Olivier Hainque <hainque@adacore.com>
+
+ * config/vxworks.h (VX_CRTBEGIN_SPEC): Likewise.
+
+2020-10-16 Olivier Hainque <hainque@adacore.com>
+
+ * config/vxworks/_vxworks-versions.h: Only include
+ version.h if _WRS_VXWORKS_MAJOR is not defined.
+ Provide a default _WRS_VXWORKS_MINOR (0).
+
+2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ PR target/97327
+ * config/arm/arm.c (fp_bitlist): Add isa_bit_mve_float to FP bits array.
+
+2020-10-16 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): For BB
+ vectorization swap operands only if it helps, demote mismatches to
+ external.
+
+2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ PR target/97291
+ * config/arm/arm-builtins.c (arm_strsbwbs_qualifiers): Modify array.
+ (arm_strsbwbu_qualifiers): Likewise.
+ (arm_strsbwbs_p_qualifiers): Likewise.
+ (arm_strsbwbu_p_qualifiers): Likewise.
+ * config/arm/arm_mve.h (__arm_vstrdq_scatter_base_wb_s64): Modify
+ function definition.
+ (__arm_vstrdq_scatter_base_wb_u64): Likewise.
+ (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
+ (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
+ (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
+ (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
+ (__arm_vstrwq_scatter_base_wb_s32): Likewise.
+ (__arm_vstrwq_scatter_base_wb_u32): Likewise.
+ (__arm_vstrwq_scatter_base_wb_f32): Likewise.
+ (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
+ * config/arm/arm_mve_builtins.def (vstrwq_scatter_base_wb_add_u): Remove
+ expansion for the builtin.
+ (vstrwq_scatter_base_wb_add_s): Likewise.
+ (vstrwq_scatter_base_wb_add_f): Likewise.
+ (vstrdq_scatter_base_wb_add_u): Likewise.
+ (vstrdq_scatter_base_wb_add_s): Likewise.
+ (vstrwq_scatter_base_wb_p_add_u): Likewise.
+ (vstrwq_scatter_base_wb_p_add_s): Likewise.
+ (vstrwq_scatter_base_wb_p_add_f): Likewise.
+ (vstrdq_scatter_base_wb_p_add_u): Likewise.
+ (vstrdq_scatter_base_wb_p_add_s): Likewise.
+ * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Remove
+ expand.
+ (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
+ (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Rename pattern to ...
+ (mve_vstrwq_scatter_base_wb_<supf>v4si): This.
+ (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Remove expand.
+ (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
+ (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Rename pattern to ...
+ (mve_vstrwq_scatter_base_wb_p_<supf>v4si): This.
+ (mve_vstrwq_scatter_base_wb_fv4sf): Remove expand.
+ (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
+ (mve_vstrwq_scatter_base_wb_fv4sf_insn): Rename pattern to ...
+ (mve_vstrwq_scatter_base_wb_fv4sf): This.
+ (mve_vstrwq_scatter_base_wb_p_fv4sf): Remove expand.
+ (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
+ (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Rename pattern to ...
+ (mve_vstrwq_scatter_base_wb_p_fv4sf): This.
+ (mve_vstrdq_scatter_base_wb_<supf>v2di): Remove expand.
+ (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
+ (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Rename pattern to ...
+ (mve_vstrdq_scatter_base_wb_<supf>v2di): This.
+ (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Remove expand.
+ (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
+ (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Rename pattern to ...
+ (mve_vstrdq_scatter_base_wb_p_<supf>v2di): This.
+
+2020-10-16 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/multilib-generator (IMPLIED_EXT): New.
+ (arch_canonicalize): Update comment and handle implied extensions.
+
+2020-10-16 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): First analyze
+ all operands and fill in the def_stmts and ops entries.
+ (vect_def_types_match): New helper.
+
+2020-10-16 Martin Liska <mliska@suse.cz>
+
+ PR ipa/97404
+ * ipa-prop.c (struct ipa_vr_ggc_hash_traits):
+ Compare types of VRP as we can merge ranges of different types.
+
+2020-10-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97428
+ * tree-vect-slp.c (vect_analyze_slp_instance): Split store
+ groups also for loop vectorization.
+
+2020-10-15 Tom de Vries <tdevries@suse.de>
+
+ PR target/97436
+ * config/nvptx/nvptx.opt (m32): Comment out.
+ * doc/invoke.texi (NVPTX options): Remove -m32.
+
+2020-10-15 Jan Hubicka <hubicka@ucw.cz>
+ Richard Biener <rguenther@suse.de>
+
+ * attr-fnspec.h: Fix toplevel comment.
+
+2020-10-15 Richard Biener <rguenther@suse.de>
+
+ * tree-pretty-print.c (dump_mem_ref): Print constant offset
+ also for TARGET_MEM_REF.
+
+2020-10-15 Jan Hubicka <jh@suse.cz>
+
+ * symtab.c (symtab_node::binds_to_current_def_p): Also accept symbols
+ defined in other partition.
+
+2020-10-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vectorizable_live_operation): Adjust
+ dominance query.
+
+2020-10-15 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97482
+ * tree-data-ref.c (split_constant_offset_1): Handle
+ trivial conversions better.
+ * fold-const.c (convert_to_ptrofftype_loc): Elide conversion
+ if the offset is already ptrofftype_p.
+
+2020-10-15 Martin Liska <mliska@suse.cz>
+
+ PR ipa/97295
+ * profile-count.c (profile_count::to_frequency): Move part of
+ gcc_assert to STATIC_ASSERT.
+ * regs.h (REG_FREQ_FROM_BB): Do not use count.to_frequency for
+ a function that does not have count_max initialized.
+
+2020-10-15 Jakub Jelinek <jakub@redhat.com>
+
+ * params.opt (-param-ipa-jump-function-lookups=): Add full stop at
+ the end of the parameter description.
+
+2020-10-15 Kito Cheng <kito.cheng@sifive.com>
+
+ * common/config/riscv/riscv-common.c (riscv_cpu_tables): New.
+ (riscv_arch_str): Return empty string if current_subset_list
+ is NULL.
+ (riscv_find_cpu): New.
+ (riscv_handle_option): Verify option value of -mcpu.
+ (riscv_expand_arch): Using std::string.
+ (riscv_default_mtune): New.
+ (riscv_expand_arch_from_cpu): Ditto.
+ * config/riscv/riscv-cores.def: New.
+ * config/riscv/riscv-protos.h (riscv_find_cpu): New.
+ (riscv_cpu_info): New.
+ * config/riscv/riscv.c (riscv_tune_info): Rename ...
+ (riscv_tune_param): ... to this.
+ (riscv_cpu_info): Rename ...
+ (riscv_tune_info): ... to this.
+ (tune_info): Rename ...
+ (tune_param): ... to this.
+ (rocket_tune_info): Update data type name.
+ (sifive_7_tune_info): Ditto.
+ (optimize_size_tune_info): Ditto.
+ (riscv_cpu_info_table): Rename ...
+ (riscv_tune_info_table): ... to this.
+ (riscv_parse_cpu): Rename ...
+ (riscv_parse_tune): ... to this, and translate valid -mcpu option to
+ -mtune option.
+ (riscv_rtx_costs): Rename tune_info to tune_param.
+ (riscv_class_max_nregs): Ditto.
+ (riscv_memory_move_cost): Ditto.
+ (riscv_init_machine_status): Use value of -mcpu if -mtune is not
+ given, and rename tune_info to tune_param.
+ * config/riscv/riscv.h (riscv_expand_arch_from_cpu): New.
+ (riscv_default_mtune): Ditto.
+ (EXTRA_SPEC_FUNCTIONS): Add riscv_expand_arch_from_cpu and
+ riscv_default_mtune.
+ (OPTION_DEFAULT_SPECS): Handle default value of -march/-mabi.
+ (DRIVER_SELF_SPECS): Expand -march from -mcpu if -march is not
+ given.
+ * config/riscv/riscv.opt (-mcpu): New option.
+ * config/riscv/t-riscv ($(common_out_file)): Add
+ riscv-cores.def to dependency.
+ * doc/invoke.texi (RISC-V Option): Add -mcpu, and update the
+ description of default value for -mtune and -march.
+
+2020-10-15 Hongyu Wang <hongyu.wang@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Detect HRESET.
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA2_HRESET_SET,
+ OPTION_MASK_ISA2_HRESET_UNSET): New macros.
+ (ix86_handle_option): Handle -mhreset.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ Add FEATURE_HRESET.
+ * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY
+ for hreset.
+ * config.gcc: Add hresetintrin.h
+ * config/i386/hresetintrin.h: New header file.
+ * config/i386/x86gprintrin.h: Include hresetintrin.h.
+ * config/i386/cpuid.h (bit_HRESET): New.
+ * config/i386/i386-builtin.def: Add new builtin.
+ * config/i386/i386-expand.c (ix86_expand_builtin):
+ Handle new builtin.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __HRESET__.
+ * config/i386/i386-options.c (isa2_opts): Add -mhreset.
+ (ix86_valid_target_attribute_inner_p): Handle hreset.
+ * config/i386/i386.h (TARGET_HRESET, TARGET_HRESET_P,
+ PTA_HRESET): New.
+ (PTA_ALDERLAKE): Add PTA_HRESET.
+ * config/i386/i386.opt: Add option -mhreset.
+ * config/i386/i386.md (UNSPECV_HRESET): New unspec.
+ (hreset): New define_insn.
+ * doc/invoke.texi: Document -mhreset.
+ * doc/extend.texi: Document hreset.
+
+2020-10-15 Hongtao Liu <hongtao.liu@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Detect UINTR.
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA2_UINTR_SET
+ OPTION_MASK_ISA2_UINTR_UNSET): New.
+ (ix86_handle_option): Handle -muintr.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ Add FEATURE_UINTR.
+ * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY
+ for uintr.
+ * config.gcc: Add uintrintrin.h to extra_headers.
+ * config/i386/uintrintrin.h: New.
+ * config/i386/cpuid.h (bit_UINTR): New.
+ * config/i386/i386-builtin-types.def: Add new types.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins): Add
+ __builtin_ia32_testui.
+ * config/i386/i386-builtins.h (ix86_builtins): Add
+ IX86_BUILTIN_TESTUI.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __UINTR__.
+ * config/i386/i386-expand.c (ix86_expand_special_args_builtin):
+ Handle UINT8_FTYPE_VOID.
+ (ix86_expand_builtin): Handle IX86_BUILTIN_TESTUI.
+ * config/i386/i386-options.c (isa2_opts): Add -muintr.
+ (ix86_valid_target_attribute_inner_p): Handle UINTR.
+ (ix86_option_override_internal): Add TARGET_64BIT check for UINTR.
+ * config/i386/i386.h (TARGET_UINTR, TARGET_UINTR_P, PTA_UINTR): New.
+ (PTA_SAPPHIRRAPIDS): Add PTA_UINTR.
+ * config/i386/i386.opt: Add -muintr.
+ * config/i386/i386.md
+ (define_int_iterator UINTR_UNSPECV): New.
+ (define_int_attr uintr_unspecv): New.
+ (uintr_<uintr_unspecv>, uintr_senduipi, testui):
+ New define_insn patterns.
+ * config/i386/x86gprintrin.h: Include uintrintrin.h
+ * doc/invoke.texi: Document -muintr.
+ * doc/extend.texi: Document uintr.
+
+2020-10-14 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97391
+ * builtins.c (gimple_parm_array_size): Peel off one less layer
+ of array types.
+
+2020-10-14 Martin Sebor <msebor@redhat.com>
+
+ PR c/97413
+ * attribs.c (init_attr_rdwr_indices): Unwrap extra list layer.
+
+2020-10-14 Sunil K Pandey <skpgkp2@gmail.com>
+
+ PR target/95483
+ * config/i386/avx2intrin.h (_mm_broadcastsi128_si256): New intrinsics.
+ (_mm_broadcastsd_pd): Ditto.
+ * config/i386/avx512bwintrin.h (_mm512_loadu_epi16): New intrinsics.
+ (_mm512_storeu_epi16): Ditto.
+ (_mm512_loadu_epi8): Ditto.
+ (_mm512_storeu_epi8): Ditto.
+ * config/i386/avx512dqintrin.h (_mm_reduce_round_sd): New intrinsics.
+ (_mm_mask_reduce_round_sd): Ditto.
+ (_mm_maskz_reduce_round_sd): Ditto.
+ (_mm_reduce_round_ss): Ditto.
+ (_mm_mask_reduce_round_ss): Ditto.
+ (_mm_maskz_reduce_round_ss): Ditto.
+ (_mm512_reduce_round_pd): Ditto.
+ (_mm512_mask_reduce_round_pd): Ditto.
+ (_mm512_maskz_reduce_round_pd): Ditto.
+ (_mm512_reduce_round_ps): Ditto.
+ (_mm512_mask_reduce_round_ps): Ditto.
+ (_mm512_maskz_reduce_round_ps): Ditto.
+ * config/i386/avx512erintrin.h
+ (_mm_mask_rcp28_round_sd): New intrinsics.
+ (_mm_maskz_rcp28_round_sd): Ditto.
+ (_mm_mask_rcp28_round_ss): Ditto.
+ (_mm_maskz_rcp28_round_ss): Ditto.
+ (_mm_mask_rsqrt28_round_sd): Ditto.
+ (_mm_maskz_rsqrt28_round_sd): Ditto.
+ (_mm_mask_rsqrt28_round_ss): Ditto.
+ (_mm_maskz_rsqrt28_round_ss): Ditto.
+ (_mm_mask_rcp28_sd): Ditto.
+ (_mm_maskz_rcp28_sd): Ditto.
+ (_mm_mask_rcp28_ss): Ditto.
+ (_mm_maskz_rcp28_ss): Ditto.
+ (_mm_mask_rsqrt28_sd): Ditto.
+ (_mm_maskz_rsqrt28_sd): Ditto.
+ (_mm_mask_rsqrt28_ss): Ditto.
+ (_mm_maskz_rsqrt28_ss): Ditto.
+ * config/i386/avx512fintrin.h (_mm_mask_sqrt_sd): New intrinsics.
+ (_mm_maskz_sqrt_sd): Ditto.
+ (_mm_mask_sqrt_ss): Ditto.
+ (_mm_maskz_sqrt_ss): Ditto.
+ (_mm_mask_scalef_sd): Ditto.
+ (_mm_maskz_scalef_sd): Ditto.
+ (_mm_mask_scalef_ss): Ditto.
+ (_mm_maskz_scalef_ss): Ditto.
+ (_mm_mask_cvt_roundsd_ss): Ditto.
+ (_mm_maskz_cvt_roundsd_ss): Ditto.
+ (_mm_mask_cvt_roundss_sd): Ditto.
+ (_mm_maskz_cvt_roundss_sd): Ditto.
+ (_mm_mask_cvtss_sd): Ditto.
+ (_mm_maskz_cvtss_sd): Ditto.
+ (_mm_mask_cvtsd_ss): Ditto.
+ (_mm_maskz_cvtsd_ss): Ditto.
+ (_mm512_cvtsi512_si32): Ditto.
+ (_mm_cvtsd_i32): Ditto.
+ (_mm_cvtss_i32): Ditto.
+ (_mm_cvti32_sd): Ditto.
+ (_mm_cvti32_ss): Ditto.
+ (_mm_cvtsd_i64): Ditto.
+ (_mm_cvtss_i64): Ditto.
+ (_mm_cvti64_sd): Ditto.
+ (_mm_cvti64_ss): Ditto.
+ * config/i386/avx512vlbwintrin.h (_mm256_storeu_epi8): New intrinsics.
+ (_mm_storeu_epi8): Ditto.
+ (_mm256_loadu_epi16): Ditto.
+ (_mm_loadu_epi16): Ditto.
+ (_mm256_loadu_epi8): Ditto.
+ (_mm_loadu_epi8): Ditto.
+ (_mm256_storeu_epi16): Ditto.
+ (_mm_storeu_epi16): Ditto.
+ * config/i386/avx512vlintrin.h (_mm256_load_epi64): New intrinsics.
+ (_mm_load_epi64): Ditto.
+ (_mm256_load_epi32): Ditto.
+ (_mm_load_epi32): Ditto.
+ (_mm256_store_epi32): Ditto.
+ (_mm_store_epi32): Ditto.
+ (_mm256_loadu_epi64): Ditto.
+ (_mm_loadu_epi64): Ditto.
+ (_mm256_loadu_epi32): Ditto.
+ (_mm_loadu_epi32): Ditto.
+ (_mm256_mask_cvt_roundps_ph): Ditto.
+ (_mm256_maskz_cvt_roundps_ph): Ditto.
+ (_mm_mask_cvt_roundps_ph): Ditto.
+ (_mm_maskz_cvt_roundps_ph): Ditto.
+ * config/i386/avxintrin.h (_mm256_cvtsi256_si32): New intrinsics.
+ * config/i386/emmintrin.h (_mm_loadu_si32): New intrinsics.
+ (_mm_loadu_si16): Ditto.
+ (_mm_storeu_si32): Ditto.
+ (_mm_storeu_si16): Ditto.
+ * config/i386/i386-builtin-types.def
+ (V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT): Add new type.
+ (V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT): Ditto.
+ (V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT): Ditto.
+ (V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT): Ditto.
+ * config/i386/i386-builtin.def
+ (__builtin_ia32_cvtsd2ss_mask_round): New builtin.
+ (__builtin_ia32_cvtss2sd_mask_round): Ditto.
+ (__builtin_ia32_rcp28sd_mask_round): Ditto.
+ (__builtin_ia32_rcp28ss_mask_round): Ditto.
+ (__builtin_ia32_rsqrt28sd_mask_round): Ditto.
+ (__builtin_ia32_rsqrt28ss_mask_round): Ditto.
+ (__builtin_ia32_reducepd512_mask_round): Ditto.
+ (__builtin_ia32_reduceps512_mask_round): Ditto.
+ (__builtin_ia32_reducesd_mask_round): Ditto.
+ (__builtin_ia32_reducess_mask_round): Ditto.
+ * config/i386/i386-expand.c
+ (ix86_expand_round_builtin): Expand round builtin for new type.
+ (V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT)
+ (V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT)
+ (V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT)
+ (V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT)
+ * config/i386/mmintrin.h ()
+ Define datatype __m32 and __m16.
+ Define datatype __m32_u and __m16_u.
+ * config/i386/sse.md: Adjust pattern.
+ (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): Adjust.
+ (reduces<mode><mask_scalar_name><round_saeonly_scalar_name>): Ditto.
+ (sse2_cvtsd2ss<mask_name><round_name>): Ditto.
+ (sse2_cvtss2sd<mask_name><round_saeonly_name>): Ditto.
+ (avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto.
+ (avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto.
+
+2020-10-14 Olivier Hainque <hainque@adacore.com>
+
+ * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Fix
+ the VX_CPU selection for -mcpu=xscale on arm-vxworks.
+
+2020-10-14 Olivier Hainque <hainque@adacore.com>
+
+ * config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Accommodate
+ expectations from different versions of VxWorks, for 32 or 64bit
+ configurations.
+
+2020-10-14 Olivier Hainque <hainque@adacore.com>
+
+ * config/vxworks.h: #undef CPLUSPLUS_CPP_SPEC.
+
+2020-10-14 Olivier Hainque <hainque@adacore.com>
+
+ * config/t-vxworks: Adjust the VxWorks alternative LIMITS_H guard
+ for glimits.h, make it both closer to the previous one and easier to
+ search for.
+
+2020-10-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/97387
+ * config/i386/i386.md (CC_CCC): New mode iterator.
+ (*setcc_qi_addqi3_cconly_overflow_1_<mode>): New
+ define_insn_and_split.
+ * config/i386/i386.c (ix86_cc_mode): Return CCCmode
+ for *setcc_qi_addqi3_cconly_overflow_1_<mode> pattern operands.
+ (ix86_rtx_costs): Return true and *total = 0;
+ for *setcc_qi_addqi3_cconly_overflow_1_<mode> pattern. Use op0 and
+ op1 temporaries to simplify COMPARE checks.
+
+2020-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97396
+ * gimple-range.cc (gimple_ranger::range_of_phi): Do not call
+ range_of_ssa_name_with_loop_info with the loop tree root.
+
+2020-10-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Split out
+ test for compatible operand types.
+
+2020-10-14 Olivier Hainque <hainque@adacore.com>
+
+ * config/vxworks.c (vxworks_override_options): Guard pic checks with
+ flag_pic > 0 instead of just flag_pic.
+
+2020-10-14 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-fnsummary.c (remap_edge_summaries): Make offset_map HOST_WIDE_INT.
+ (remap_freqcounting_predicate): Likewise.
+ (ipa_merge_fn_summary_after_inlining): Likewise.
+ * ipa-predicate.c (predicate::remap_after_inlining): Likewise
+ * ipa-predicate.h (remap_after_inlining): Update.
+
+2020-10-14 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (compute_parm_map): Handle POINTER_PLUS_EXPR in
+ PASSTHROUGH.
+
+2020-10-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Move
+ check for duplicate/interleave of variable size constants
+ to a place done once and early.
+ (vect_build_slp_tree_2): Adjust heuristics when to build
+ a BB SLP node from scalars.
+
+2020-10-14 Tom de Vries <tdevries@suse.de>
+
+ * tracer.c (cached_can_duplicate_bb_p, analyze_bb): Use
+ can_duplicate_block_p.
+ (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
+ (can_duplicate_bb_p): Move and merge ...
+ * tree-cfg.c (gimple_can_duplicate_bb_p): ... here.
+
+2020-10-14 Jan Hubicka <hubicka@ucw.cz>
+
+ * doc/invoke.texi: (ipa-jump-function-lookups): Document param.
+ * ipa-modref.c (merge_call_side_effects): Use
+ unadjusted_ptr_and_unit_offset.
+ * ipa-prop.c (unadjusted_ptr_and_unit_offset): New function.
+ * ipa-prop.h (unadjusted_ptr_and_unit_offset): Declare.
+ * params.opt: (-param-ipa-jump-function-lookups): New.
+
+2020-10-14 Jan Hubicka <jh@suse.cz>
+
+ PR bootstrap/97350
+ * ipa-modref.c (ignore_edge): Do not ignore inlined edes.
+ (ipa_merge_modref_summary_after_inlining): Improve debug output and
+ fix parameter of ignore_stores_p.
+
+2020-10-14 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/96759
+ * expr.c (expand_assignment): Handle misaligned stores with PARALLEL
+ value.
+
+2020-10-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97386
+ * combine.c (simplify_shift_const_1): Don't optimize nested ROTATEs if
+ they have different modes.
+
+2020-10-13 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97379
+ * gimple-range-edge.cc (outgoing_range::calc_switch_ranges): Do
+ not save hash slot across calls to hash_table<>::get_or_insert.
+
+2020-10-13 Tobias Burnus <tobias@codesourcery.com>
+
+ * lto-wrapper.c (find_crtoffloadtable): Fix last commit
+ by adding NULL as last argument to concat.
+
+2020-10-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.c (neoversen2_tunings): Define.
+ * config/aarch64/aarch64-cores.def (neoverse-n2): Use it.
+
+2020-10-13 Tobias Burnus <tobias@codesourcery.com>
+
+ * lto-wrapper.c (find_crtoffloadtable): With -save-temps,
+ use non-temp file name utilizing the dump prefix.
+ (run_gcc): Update call.
+
+2020-10-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97382
+ * tree-vectorizer.h (_stmt_vec_info::same_align_refs): Remove.
+ (STMT_VINFO_SAME_ALIGN_REFS): Likewise.
+ * tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not
+ allocate STMT_VINFO_SAME_ALIGN_REFS.
+ (vec_info::free_stmt_vec_info): Do not release
+ STMT_VINFO_SAME_ALIGN_REFS.
+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependences):
+ Do not compute self and read-read dependences.
+ (vect_dr_aligned_if_related_peeled_dr_is): New helper.
+ (vect_dr_aligned_if_peeled_dr_is): Likewise.
+ (vect_update_misalignment_for_peel): Use it instead of
+ iterating over STMT_VINFO_SAME_ALIGN_REFS.
+ (dr_align_group_sort_cmp): New function.
+ (vect_enhance_data_refs_alignment): Count the number of
+ same aligned refs here and elide uses of STMT_VINFO_SAME_ALIGN_REFS.
+ (vect_find_same_alignment_drs): Remove.
+ (vect_analyze_data_refs_alignment): Do not call it.
+ * vec.h (auto_vec<T, 0>::auto_vec): Adjust CTOR to take
+ a vec<>&&, assert it isn't using auto storage.
+ (auto_vec& operator=): Apply a similar change.
+
+2020-10-13 Tobias Burnus <tobias@codesourcery.com>
+
+ * config/nvptx/mkoffload.c (main): Add missing fclose (in).
+
+2020-10-13 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for mul/mla/mls intrinsics.
+
+2020-10-13 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-low.c (add_taskreg_looptemp_clauses): For triangular loops
+ with non-constant number of iterations add another 4 _looptemp_
+ clauses before the (optional) one for lastprivate.
+ (lower_omp_for_lastprivate): Skip those clauses when looking for
+ the lastprivate clause.
+ (lower_omp_for): For triangular loops with non-constant number of
+ iterations add another 4 _looptemp_ clauses.
+ * omp-expand.c (expand_omp_for_init_counts): For triangular loops
+ with non-constant number of iterations set counts[0],
+ fd->first_inner_iterations, fd->factor and fd->adjn1 from the newly
+ added _looptemp_ clauses.
+ (expand_omp_for_init_vars): Initialize the newly added _looptemp_
+ clauses.
+ (find_lastprivate_looptemp): New function.
+ (expand_omp_for_static_nochunk, expand_omp_for_static_chunk,
+ expand_omp_taskloop_for_outer): Use it instead of manually skipping
+ _looptemp_ clauses.
+
+2020-10-13 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97389
+ * ipa-modref.c (dump_lto_records): Fix formating of dump file.
+ (modref_summary::dump): Do not check loads to be non-null.
+ (modref_summary_lto::dump): Do not check loads to be non-null.
+ (merge_call_side_effects): Improve debug output.
+ (analyze_call): Crash when cur_summary->loads is NULL.
+ (analyze_function): Update.
+ (modref_summaries::insert): Insert only into summaries, not
+ optimization_summaries.
+ (modref_summaries::duplicate): Likewise; crash when load or sotres
+ are NULL.
+ (modref_summaries_lto::duplicate): Crash when loads or stores are NULL.
+ (write_modref_records): param_index is signed.
+ (read_modref_records): param_index is signed.
+ (modref_write): Crash when loads or stores are NULL.
+ (read_section): Compensate previous change.
+ (pass_modref::execute): Do not check optimization_summaries t be
+ non-NULL.
+ (ignore_edge): Fix.
+ (compute_parm_map): Fix formating.
+ (modref_propagate_in_scc): Do not expect loads/stores to be NULL.
+
+2020-10-12 Alexandre Oliva <oliva@adacore.com>
+
+ * builtins.c (mathfn_built_in_type): Use CFN_ enumerators.
+
+2020-10-12 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97381
+ * gimple-range-gori.cc (gori_compute::compute_operand2_range): If a range cannot be
+ calculated through operand 2, return false.
+
+2020-10-12 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97378
+ * range-op.cc (operator_trunc_mod::wi_fold): Return VARYING for mod by zero.
+
+2020-10-12 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/invoke.texi: Document -Wanalyzer-write-to-const and
+ -Wanalyzer-write-to-string-literal.
+
+2020-10-12 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97342
+ PR middle-end/97023
+ PR middle-end/96384
+ * builtins.c (access_ref::access_ref): Initialize new member. Use
+ new enum.
+ (access_ref::size_remaining): Define new member function.
+ (inform_access): Handle expressions referencing objects.
+ (gimple_call_alloc_size): Call get_size_range instead of get_range.
+ (gimple_call_return_array): New function.
+ (get_range): Rename...
+ (get_offset_range): ...to this. Improve detection of ranges from
+ types of expressions.
+ (gimple_call_return_array): Adjust calls to get_range per above.
+ (compute_objsize): Same. Set maximum size or offset instead of
+ failing for unknown objects and handle more kinds of expressions.
+ (compute_objsize): Call access_ref::size_remaining.
+ (compute_objsize): Have transitional wrapper fail for pointers
+ into unknown objects.
+ (expand_builtin_strncmp): Call access_ref::size_remaining and
+ handle new cases.
+ * builtins.h (access_ref::size_remaining): Declare new member function.
+ (access_ref::set_max_size_range): Define new member function.
+ (access_ref::add_ofset, access_ref::add_max_ofset): Same.
+ (access_ref::add_base0): New data member.
+ * calls.c (get_size_range): Change argument type. Handle new
+ condition.
+ * calls.h (get_size_range): Adjust signature.
+ (enum size_range_flags): Define new type.
+ * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Correct
+ argument to get_size_range.
+ * tree-ssa-strlen.c (get_range): Handle anti-ranges.
+ (maybe_warn_overflow): Check DECL_P before assuming it's one.
+
+2020-10-12 Martin Sebor <msebor@redhat.com>
+
+ PR c++/96511
+ PR middle-end/96384
+ * builtins.c (get_range): Return full range of type when neither
+ value nor its range is available. Fail for ranges inverted due
+ to the signedness of offsets.
+ (compute_objsize): Handle more special array members. Handle
+ POINTER_PLUS_EXPR and VIEW_CONVERT_EXPR that come up in front end
+ code.
+ (access_ref::offset_bounded): Define new member function.
+ * builtins.h (access_ref::eval): New data member.
+ (access_ref::offset_bounded): New member function.
+ (access_ref::offset_zero): New member function.
+ (compute_objsize): Declare a new overload.
+ * gimple-array-bounds.cc (array_bounds_checker::check_array_ref): Use
+ enum special_array_member.
+ * tree.c (component_ref_size): Use special_array_member.
+ * tree.h (special_array_member): Define a new type.
+ (component_ref_size): Change signature.
+
+2020-10-12 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (modref_summaries): Remove field IPA.
+ (class modref_summary_lto): New global variable.
+ (class modref_summaries_lto): New.
+ (modref_summary::modref_summary): Remove loads_lto and stores_lto.
+ (modref_summary::~modref_summary): Remove loads_lto and stores_lto.
+ (modref_summary::useful_p): Do not use lto_useful.
+ (modref_records_lto): New typedef.
+ (struct modref_summary_lto): New type.
+ (modref_summary_lto::modref_summary_lto): New member function.
+ (modref_summary_lto::~modref_summary_lto): New member function.
+ (modref_summary_lto::useful_p): New member function.
+ (modref_summary::dump): Do not handle lto.
+ (modref_summary_lto::dump): New member function.
+ (get_modref_function_summary): Use optimization_summary.
+ (merge_call_side_effects): Use optimization_summary.
+ (analyze_call): Use optimization_summary.
+ (struct summary_ptrs): New struture.
+ (analyze_load): Update to handle separate lto and non-lto summaries.
+ (analyze_store): Likewise.
+ (analyze_stmt): Likewise.
+ (remove_summary): Break out from ...
+ (analyze_function): ... here; update to handle seprated summaries.
+ (modref_summaries::insert): Do not handle lto summary.
+ (modref_summaries_lto::insert): New member function.
+ (modref_summaries::duplicate): Do not handle lto summary.
+ (modref_summaries_lto::duplicate): New member function.
+ (read_modref_records): Expect nolto_ret or lto_ret to be NULL>
+ (modref_write): Write lto summary.
+ (read_section): Handle separated summaries.
+ (modref_read): Initialize separated summaries.
+ (modref_transform): Handle separated summaries.
+ (pass_modref::execute): Turn summary to optimization_summary; handle
+ separate summaries.
+ (ignore_edge): Handle separate summaries.
+ (ipa_merge_modref_summary_after_inlining): Likewise.
+ (collapse_loads): Likewise.
+ (modref_propagate_in_scc): Likewise.
+ (pass_ipa_modref::execute): Likewise.
+ (ipa_modref_c_finalize): Likewise.
+ * ipa-modref.h (modref_records_lto): Remove typedef.
+ (struct modref_summary): Remove stores_lto, loads_lto and finished
+ fields; remove lto_useful_p member function.
+
+2020-10-12 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_slp_analyze_instance_dependence):
+ Use SLP_TREE_REPRESENTATIVE.
+ * tree-vectorizer.h (_slp_tree::vertex): New member used
+ for graphds interfacing.
+ * tree-vect-slp.c (vect_build_slp_tree_2): Allocate space
+ for PHI SLP children.
+ (vect_analyze_slp_backedges): New function filling in SLP
+ node children for PHIs that correspond to backedge values.
+ (vect_analyze_slp): Call vect_analyze_slp_backedges for the
+ graph.
+ (vect_slp_analyze_node_operations): Deal with a cyclic graph.
+ (vect_schedule_slp_instance): Likewise.
+ (vect_schedule_slp): Likewise.
+ (slp_copy_subtree): Remove.
+ (vect_slp_rearrange_stmts): Likewise.
+ (vect_attempt_slp_rearrange_stmts): Likewise.
+ (vect_slp_build_vertices): New functions.
+ (vect_slp_permute): Likewise.
+ (vect_slp_perms_eq): Likewise.
+ (vect_optimize_slp): Remove special code to elide
+ permutations with SLP reductions. Implement generic
+ permute optimization.
+
+2020-10-12 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/arm/arm.c (arm_preferred_simd_mode): Use E_FOOmode
+ instead of FOOmode.
+
+2020-10-12 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/97079
+ * internal-fn.c (internal_fn_stored_value_index): Handle also
+ .MASK_STORE_LANES.
+ * tree-vect-patterns.c (vect_recog_over_widening_pattern): Bail
+ out for unsupported TREE_TYPE.
+
+2020-10-12 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_bb_partition_graph_r): Use visited
+ hash-map.
+ (vect_bb_partition_graph): Likewise.
+
+2020-10-12 Duan bo <duanbo3@huawei.com>
+
+ PR target/96757
+ * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Add
+ the identification and handling of the dropped situation in the
+ cond expression processing phase.
+
+2020-10-12 Tobias Burnus <tobias@codesourcery.com>
+
+ * doc/invoke.texi (nvptx's -misa): Update default to sm_35.
+
+2020-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/97349
+ * config/aarch64/arm_neon.h (vdupq_n_p8, vdupq_n_p16,
+ vdupq_n_p64, vdupq_n_s8, vdupq_n_s16, vdupq_n_u8, vdupq_n_u16):
+ Fix argument type.
+
+2020-10-12 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/s390-protos.h (s390_build_signbit_mask): New
+ function.
+ * config/s390/s390.c (s390_contiguous_bitmask_vector_p):
+ Bitcast the argument to an integral mode.
+ (s390_expand_vec_init): Do not call
+ s390_contiguous_bitmask_vector_p with a scalar argument.
+ (s390_build_signbit_mask): New function.
+ * config/s390/vector.md (copysign<mode>3): Use bitwise
+ operations.
+
+2020-10-12 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97371
+ * range-op.cc (operator_rshift::op1_range): Ignore shifts larger than
+ or equal to type precision.
+
+2020-10-12 Martin Liska <mliska@suse.cz>
+
+ * ipa-modref.c (merge_call_side_effects): Clear modref_parm_map
+ fields in the vector.
+
+2020-10-12 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_analyze_slp_instance): Set matches to true
+ after successful discovery but forced split.
+
+2020-10-12 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.opt (-msoft-stack-reserve-local): Rename to ...
+ (-msoft-stack-reserve-local=): ... this.
+
+2020-10-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97357
+ * tree-ssa-loop-split.c (ssa_semi_invariant_p): Abnormal
+ SSA names are not semi invariant.
+
+2020-10-11 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_globalize_label): Make a subset of
+ metadate symbols global.
+ (darwin_label_is_anonymous_local_objc_name): Make a subset of
+ metadata symbols linker-visible.
+ (darwin_override_options): Track more target OS versions, make
+ the next_runtime version track this (unless it's set to 0 for
+ GNU runtime).
+
+2020-10-11 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_globalize_label): Add protocol
+ meta-data labels to the set that are global.
+ (darwin_label_is_anonymous_local_objc_name): Arrange for meta-
+ data start labels to be linker-visible.
+
+2020-10-11 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_objc2_section): Allow for
+ values > 1 to represent the next runtime.
+ (darwin_objc1_section): Likewise.
+ * config/darwin.h (NEXT_OBJC_RUNTIME): Set the default
+ next runtime value to be 10.5.8.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_transform): Fix parameter map computation.
+
+2020-10-10 Tom de Vries <tdevries@suse.de>
+
+ PR target/97318
+ * config/nvptx/nvptx.c (nvptx_replace_dot): New function.
+ (write_fn_proto, write_fn_proto_from_insn, nvptx_output_call_insn):
+ Use nvptx_replace_dot.
+
+2020-10-10 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.c (write_fn_proto_1): New function, factored out
+ of ...
+ (write_fn_proto): ... here. Return void.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (remap_arguments): Check range in map access.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_transform): Use reserve instead of safe_grow.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_transform): Check that summaries are allocated.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref-tree.h (struct modref_tree): Revert prevoius change.
+ * ipa-modref.c (analyze_function): Dump original summary.
+ (modref_read): Only set IPA if streaming summary (not optimization
+ summary).
+ (remap_arguments): New function.
+ (modref_transform): New function.
+ (compute_parm_map): Fix offset calculation.
+ (ipa_merge_modref_summary_after_inlining): Do not merge stores when
+ they can be ignored.
+
+2020-10-10 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Improve debug dumps.
+ (call_may_clobber_ref_p_1): Improve debug dumps.
+
+2020-10-10 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (output_objc_section_asm_op): Avoid extra
+ objective-c section switches unless the linker needs them.
+
+2020-10-10 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-sections.def (objc2_data_section): New.
+ (objc2_ivar_section): New.
+ * config/darwin.c (darwin_objc2_section): Act on Protocol and
+ ivar refs.
+
+2020-10-10 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-sections.def (objc2_class_names_section,
+ objc2_method_names_section, objc2_method_types_section): New
+ * config/darwin.c (output_objc_section_asm_op): Output new
+ sections. (darwin_objc2_section): Select new sections where
+ used.
+
+2020-10-10 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_emit_local_bss): Amend section names to
+ match system tools. (darwin_output_aligned_bss): Likewise.
+
+2020-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97359
+ * gimple-range-gori.cc (logical_stmt_cache::cacheable_p): Only
+ handle ANDs and ORs.
+ (gori_compute_cache::cache_stmt): Adjust comment.
+
+2020-10-09 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/97313
+ * lra-constraints.c (match_reload): Don't keep strict_low_part in
+ reloads for non-registers.
+
+2020-10-09 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97148
+ * config.gcc (extra_headers): Add x86gprintrin.h.
+ * config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for
+ <x86gprintrin.h>.
+ * config/i386/bmi2intrin.h: Likewise.
+ * config/i386/bmiintrin.h: Likewise.
+ * config/i386/cetintrin.h: Likewise.
+ * config/i386/cldemoteintrin.h: Likewise.
+ * config/i386/clflushoptintrin.h: Likewise.
+ * config/i386/clwbintrin.h: Likewise.
+ * config/i386/enqcmdintrin.h: Likewise.
+ * config/i386/fxsrintrin.h: Likewise.
+ * config/i386/ia32intrin.h: Likewise.
+ * config/i386/lwpintrin.h: Likewise.
+ * config/i386/lzcntintrin.h: Likewise.
+ * config/i386/movdirintrin.h: Likewise.
+ * config/i386/pconfigintrin.h: Likewise.
+ * config/i386/pkuintrin.h: Likewise.
+ * config/i386/rdseedintrin.h: Likewise.
+ * config/i386/rtmintrin.h: Likewise.
+ * config/i386/serializeintrin.h: Likewise.
+ * config/i386/tbmintrin.h: Likewise.
+ * config/i386/tsxldtrkintrin.h: Likewise.
+ * config/i386/waitpkgintrin.h: Likewise.
+ * config/i386/wbnoinvdintrin.h: Likewise.
+ * config/i386/xsavecintrin.h: Likewise.
+ * config/i386/xsaveintrin.h: Likewise.
+ * config/i386/xsaveoptintrin.h: Likewise.
+ * config/i386/xsavesintrin.h: Likewise.
+ * config/i386/xtestintrin.h: Likewise.
+ * config/i386/immintrin.h: Include <x86gprintrin.h> instead of
+ <fxsrintrin.h>, <xsaveintrin.h>, <xsaveoptintrin.h>,
+ <xsavesintrin.h>, <xsavecintrin.h>, <lzcntintrin.h>,
+ <bmiintrin.h>, <bmi2intrin.h>, <xtestintrin.h>, <cetintrin.h>,
+ <movdirintrin.h>, <sgxintrin.h, <pconfigintrin.h>,
+ <waitpkgintrin.h>, <cldemoteintrin.h>, <enqcmdintrin.h>,
+ <serializeintrin.h>, <tsxldtrkintrin.h>, <adxintrin.h>,
+ <clwbintrin.h>, <clflushoptintrin.h>, <wbnoinvdintrin.h> and
+ <pkuintrin.h>.
+ (_wbinvd): Moved to config/i386/x86gprintrin.h.
+ (_rdrand16_step): Likewise.
+ (_rdrand32_step): Likewise.
+ (_rdpid_u32): Likewise.
+ (_readfsbase_u32): Likewise.
+ (_readfsbase_u64): Likewise.
+ (_readgsbase_u32): Likewise.
+ (_readgsbase_u64): Likewise.
+ (_writefsbase_u32): Likewise.
+ (_writefsbase_u64): Likewise.
+ (_writegsbase_u32): Likewise.
+ (_writegsbase_u64): Likewise.
+ (_rdrand64_step): Likewise.
+ (_ptwrite64): Likewise.
+ (_ptwrite32): Likewise.
+ * config/i386/x86gprintrin.h: New file.
+ * config/i386/x86intrin.h: Include <x86gprintrin.h>. Don't
+ include <ia32intrin.h>, <lwpintrin.h>, <tbmintrin.h>,
+ <popcntintrin.h>, <mwaitxintrin.h> and <clzerointrin.h>.
+
+2020-10-09 Tom de Vries <tdevries@suse.de>
+
+ PR target/97348
+ * config/nvptx/nvptx.h (ASM_SPEC): Also pass -m to nvptx-as if
+ default is used.
+ * config/nvptx/nvptx.opt (misa): Init with PTX_ISA_SM35.
+
+2020-10-09 Richard Biener <rguenther@suse.de>
+
+ * doc/sourcebuild.texi (vect_masked_load): Document.
+
+2020-10-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97334
+ * tree-vect-slp.c (vect_build_slp_tree_1): Do not fatally
+ fail lanes other than zero when BB vectorizing.
+
+2020-10-09 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97292
+ PR ipa/97335
+ * ipa-modref-tree.h (copy_from): Drop summary in a
+ clone.
+
+2020-10-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97347
+ * tree-vect-slp.c (vect_create_constant_vectors): Use
+ edge insertion when inserting on the fallthru edge,
+ appropriately insert at the start of BBs when inserting
+ after PHIs.
+
+2020-10-09 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/97317
+ * range-op.cc (operator_cast::op1_range): Handle casts where the precision
+ of the RHS is only 1 greater than the precision of the LHS.
+
+2020-10-09 Richard Biener <rguenther@suse.de>
+
+ * cgraphunit.c (expand_all_functions): Free tp_first_run_order.
+ * ipa-modref.c (pass_ipa_modref::execute): Free order.
+ * tree-ssa-loop-niter.c (estimate_numbers_of_iterations): Free
+ loop body.
+ * tree-vect-data-refs.c (vect_find_stmt_data_reference): Free
+ data references upon failure.
+ * tree-vect-loop.c (update_epilogue_loop_vinfo): Free BBs
+ array of the original loop.
+ * tree-vect-slp.c (vect_slp_bbs): Use an auto_vec for
+ dataref_groups to release its memory.
+
+2020-10-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/94801
+ PR target/97312
+ * vr-values.c (vr_values::extract_range_basic) <CASE_CFN_CLZ,
+ CASE_CFN_CTZ>: When stmt is not an internal-fn call or
+ C?Z_DEFINED_VALUE_AT_ZERO is not 2, assume argument is not zero
+ and thus use [0, prec-1] range unless it can be further improved.
+ For CTZ, don't update maxi from upper bound if it was previously prec.
+ * gimple-range.cc (gimple_ranger::range_of_builtin_call) <CASE_CFN_CLZ,
+ CASE_CFN_CTZ>: Likewise.
+
+2020-10-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97325
+ * match.pd (FFS(nonzero) -> CTZ(nonzero) + 1): Cast argument to
+ corresponding unsigned type.
+
+2020-10-09 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_create_constant_vectors): Properly insert
+ after PHIs.
+
+2020-10-08 Alexandre Oliva <oliva@adacore.com>
+
+ * builtins.c (mathfn_built_in_type): New.
+ * builtins.h (mathfn_built_in_type): Declare.
+ * tree-ssa-math-opts.c (execute_cse_sincos_1): Use it to
+ obtain the type expected by the intrinsic.
+
+2020-10-08 Will Schmidt <will_schmidt@vnet.ibm.com>
+
+ * config/rs6000/rs6000-builtin.def (BU_P10_MISC_2): Rename
+ to BU_P10_POWERPC64_MISC_2.
+ CFUGED, CNTLZDM, CNTTZDM, PDEPD, PEXTD): Call renamed macro.
+
+2020-10-08 Jan Hubicka <jh@suse.cz>
+
+ * tree-nrv.c (dest_safe_for_nrv_p): Disable tbaa in
+ call_may_clobber_ref_p and ref_maybe_used_by_stmt_p.
+ * tree-tailcall.c (find_tail_calls): Likewise.
+ * tree-ssa-alias.c (call_may_clobber_ref_p): Add tbaa_p parameter.
+ * tree-ssa-alias.h (call_may_clobber_ref_p): Update prototype.
+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Pass data->tbaa_p
+ to call_may_clobber_ref_p_1.
+
+2020-10-08 Mark Wielaard <mark@klomp.org>
+
+ * dwarf2out.c (dwarf2out_finish): Emit .file 0 entry when
+ generating DWARF5 .debug_line table through gas.
+
+2020-10-08 John Henning <john.henning@oracle.com>
+
+ PR other/97309
+ * doc/invoke.texi: Improve documentation of
+ -fallow-store-data-races.
+
+2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/96914
+ * config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New.
+
+2020-10-08 Martin Liska <mliska@suse.cz>
+ Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (_bb_vec_info::const_iterator): Remove.
+ (_bb_vec_info::const_reverse_iterator): Likewise.
+ (_bb_vec_info::region_stmts): Likewise.
+ (_bb_vec_info::reverse_region_stmts): Likewise.
+ (_bb_vec_info::_bb_vec_info): Adjust.
+ (_bb_vec_info::bb): Remove.
+ (_bb_vec_info::region_begin): Remove.
+ (_bb_vec_info::region_end): Remove.
+ (_bb_vec_info::bbs): New vector of BBs.
+ (vect_slp_function): Declare.
+ * tree-vect-patterns.c (vect_determine_precisions): Use
+ regular stmt iteration.
+ (vect_pattern_recog): Likewise.
+ * tree-vect-slp.c: Include cfganal.h, tree-eh.h and tree-cfg.h.
+ (vect_build_slp_tree_1): Properly refuse to vectorize
+ volatile and throwing stmts.
+ (vect_build_slp_tree_2): Pass group-size down to
+ get_vectype_for_scalar_type.
+ (_bb_vec_info::_bb_vec_info): Use regular stmt iteration,
+ adjust for changed region specification.
+ (_bb_vec_info::~_bb_vec_info): Likewise.
+ (vect_slp_check_for_constructors): Likewise.
+ (vect_slp_region): Likewise.
+ (vect_slp_bbs): New worker operating on a vector of BBs.
+ (vect_slp_bb): Wrap it.
+ (vect_slp_function): New function splitting the function
+ into multi-BB regions.
+ (vect_create_constant_vectors): Handle the case of inserting
+ after a throwing def.
+ (vect_schedule_slp_instance): Adjust.
+ * tree-vectorizer.c (vec_info::remove_stmt): Simplify again.
+ (vec_info::insert_seq_on_entry): Adjust.
+ (pass_slp_vectorize::execute): Also init PHIs. Call
+ vect_slp_function.
+
+2020-10-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97330
+ * tree-ssa-sink.c (statement_sink_location): Avoid skipping
+ PHIs when they dominate the insert location.
+
+2020-10-08 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (get_access): Fix handling of offsets.
+ * tree-ssa-alias.c (modref_may_conflict): Watch for overflows.
+
+2020-10-08 Martin Liska <mliska@suse.cz>
+
+ * dbgcnt.def (DEBUG_COUNTER): Add ipa_mod_ref debug counter.
+ * tree-ssa-alias.c (modref_may_conflict): Handle the counter.
+
+2020-10-08 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.c (try_vectorize_loop_1): Do not dump
+ "basic block vectorized".
+ (pass_slp_vectorize::execute): Likewise.
+ * tree-vect-slp.c (vect_analyze_slp_instance): Avoid
+ re-analyzing split single stmts.
+
+2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/96914
+ * config/arm/arm_mve.h (vqrdmlashq_n_u8, vqrdmlashq_n_u16)
+ (vqrdmlashq_n_u32, vqrdmlahq_n_u8, vqrdmlahq_n_u16)
+ (vqrdmlahq_n_u32, vqdmlahq_n_u8, vqdmlahq_n_u16, vqdmlahq_n_u32)
+ (vmlaldavaxq_p_u16, vmlaldavaxq_p_u32): Remove.
+ * config/arm/arm_mve_builtins.def (vqrdmlashq_n_u, vqrdmlahq_n_u)
+ (vqdmlahq_n_u, vmlaldavaxq_p_u): Remove.
+ * config/arm/unspecs.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
+ (VQRDMLASHQ_N_U)
+ (VMLALDAVAXQ_P_U): Remove unspecs.
+ * config/arm/iterators.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
+ (VQRDMLASHQ_N_U, VMLALDAVAXQ_P_U): Remove attributes.
+ (VQDMLAHQ_N, VQRDMLAHQ_N, VQRDMLASHQ_N, VMLALDAVAXQ_P): Remove
+ unsigned variants from iterators.
+ * config/arm/mve.md (mve_vqdmlahq_n_<supf><mode>)
+ (mve_vqrdmlahq_n_<supf><mode>)
+ (mve_vqrdmlashq_n_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>):
+ Update comment.
+
+2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/96914
+ * config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define.
+ * config/arm/arm_mve_builtins.def (vqdmlashq_n_s)
+ (vqdmlashq_m_n_s,): New.
+ * config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
+ unspecs.
+ * config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
+ attributes.
+ (VQDMLASHQ_N): New iterator.
+ * config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New
+ patterns.
+
+2020-10-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/97322
+ * config/arm/arm.c (arm_expand_divmod_libfunc): Pass mode instead of
+ GET_MODE (op0) or GET_MODE (op1) to emit_library_call_value.
+
+2020-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97325
+ * gimple-range.cc (gimple_ranger::range_of_builtin_call): Handle
+ negative numbers in __builtin_ffs and __builtin_popcount.
+
+2020-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97315
+ * range-op.cc (value_range_with_overflow): Change any
+ non-overflow calculation in which both bounds are
+ overflow/underflow to be undefined.
+
+2020-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/97315
+ * gimple-ssa-evrp.c (hybrid_folder::choose_value): Removes the
+ trap and instead annotates the listing.
+
+2020-10-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/97294
+ * tree-cfg.c (move_block_to_fn): Call notice_special_calls on
+ call stmts being moved into dest_cfun.
+ * omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when
+ adding __builtin_alloca_with_align call without gimplification.
+
+2020-10-07 Aldy Hernandez <aldyh@redhat.com>
+
+ * common.opt (-fevrp-mode): Rename and move...
+ * params.opt (--param=evrp-mode): ...here.
+ * gimple-range.h (DEBUG_RANGE_CACHE): Use param_evrp_mode instead
+ of flag_evrp_mode.
+ * gimple-ssa-evrp.c (rvrp_folder): Same.
+ (hybrid_folder): Same.
+ (execute_early_vrp): Same.
+
+2020-10-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97307
+ * tree-ssa-sink.c (statement_sink_location): Change heuristic
+ for not skipping stores to look for virtual definitions
+ rather than uses.
+
+2020-10-07 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-range.h (irange_allocator::allocate): Allocate in two hunks
+ instead of using the variably-sized trailing array approach.
+
+2020-10-07 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/invoke.texi (-fdiagnostics-plain-output): Add
+ -fdiagnostics-path-format=separate-events to list of
+ options injected by -fdiagnostics-plain-output.
+ * opts-common.c (decode_cmdline_options_to_array): Likewise.
+
+2020-10-07 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/96394
+ * ipa-prop.c (update_indirect_edges_after_inlining): Do not add
+ resolved speculation edges to vector of new direct edges even in
+ presence of multiple speculative direct edges for a single call.
+
+2020-10-07 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn.md (unspec): Add UNSPEC_ADDPTR.
+ (addptrdi3): Add SGPR alternative.
+
+2020-10-07 Mark Wielaard <mark@klomp.org>
+
+ * dwarf2out.c (add_filepath_AT_string): New function.
+ (asm_outputs_debug_line_str): Likewise.
+ (add_filename_attribute): Likewise.
+ (add_comp_dir_attribute): Call add_filepath_AT_string.
+ (gen_compile_unit_die): Call add_filename_attribute for name.
+ (init_sections_and_labels): Init debug_line_str_section when
+ asm_outputs_debug_line_str return true.
+ (dwarf2out_early_finish): Remove DW_AT_name and DW_AT_comp_dir
+ hack and call add_filename_attribute for the remap_debug_filename.
+
+2020-10-07 Jakub Jelinek <jakub@redhat.com>
+
+ * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG,
+ HAVE_AS_WORKING_DWARF_4_FLAG): New tests.
+ * gcc.c (ASM_DEBUG_DWARF_OPTION): Define.
+ (ASM_DEBUG_SPEC): Use ASM_DEBUG_DWARF_OPTION instead of
+ "--gdwarf2". Use %{cond:opt1;:opt2} style.
+ (ASM_DEBUG_OPTION_DWARF_OPT): Define.
+ (ASM_DEBUG_OPTION_SPEC): Define.
+ (asm_debug_option): New variable.
+ (asm_options): Add "%(asm_debug_option)".
+ (static_specs): Add asm_debug_option entry.
+ (static_spec_functions): Add dwarf-version-gt.
+ (debug_level_greater_than_spec_func): New function.
+ * config/darwin.h (ASM_DEBUG_OPTION_SPEC): Define.
+ * config/darwin9.h (ASM_DEBUG_OPTION_SPEC): Redefine.
+ * config.in: Regenerated.
+ * configure: Regenerated.
+
+2020-10-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR bootstrap/97305
+ * optc-save-gen.awk: Don't declare mask variable if explicit_mask
+ array is not present.
+
+2020-10-07 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR
+ at the end of entry_bb and innermost init_bb, instead force arguments
+ for MIN_EXPR into temporaries in both cases and jump to a new bb that
+ performs MIN_EXPR and PLUS_EXPR.
+
+2020-10-07 Tom de Vries <tdevries@suse.de>
+
+ * tree-ssa-loop-ch.c (ch_base::copy_headers): Add missing NULL test
+ for dump_file.
+
+2020-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*.
+ * common.opt (fevrp-mode): New undocumented flag.
+ * gimple-ssa-evrp.c: Include gimple-range.h
+ (class rvrp_folder): EVRP folding using ranger exclusively.
+ (rvrp_folder::rvrp_folder): New.
+ (rvrp_folder::~rvrp_folder): New.
+ (rvrp_folder::value_of_expr): New. Use rangers value_of_expr.
+ (rvrp_folder::value_on_edge): New. Use rangers value_on_edge.
+ (rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt.
+ (rvrp_folder::fold_stmt): New. Call the simplifier.
+ (class hybrid_folder): EVRP folding using both engines.
+ (hybrid_folder::hybrid_folder): New.
+ (hybrid_folder::~hybrid_folder): New.
+ (hybrid_folder::fold_stmt): New. Simplify with one engne, then the
+ other.
+ (hybrid_folder::value_of_expr): New. Use both value routines.
+ (hybrid_folder::value_on_edge): New. Use both value routines.
+ (hybrid_folder::value_of_stmt): New. Use both value routines.
+ (hybrid_folder::choose_value): New. Choose between range_analzyer and
+ rangers values.
+ (execute_early_vrp): Choose a folder based on flag_evrp_mode.
+ * vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt
+ first to see if it returns a value.
+ (simplify_using_ranges::simplify_switch_using_ranges): Return true if
+ any changes were made to the switch.
+
+2020-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * Makefile.in (OBJS): Add gimple-range*.o.
+ * gimple-range.h: New file.
+ * gimple-range.cc: New file.
+ * gimple-range-cache.h: New file.
+ * gimple-range-cache.cc: New file.
+ * gimple-range-edge.h: New file.
+ * gimple-range-edge.cc: New file.
+ * gimple-range-gori.h: New file.
+ * gimple-range-gori.cc: New file.
+
+2020-10-06 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
+
+2020-10-06 Tom de Vries <tdevries@suse.de>
+
+ PR middle-end/90861
+ * gimplify.c (gimplify_bind_expr): Handle lookup in
+ oacc_declare_returns using key with decl-expr.
+
+2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to
+ iterators.md.
+ (MVE_VLD_ST): Likewise.
+ (MVE_0): Likewise.
+ (MVE_1): Likewise.
+ (MVE_3): Likewise.
+ (MVE_2): Likewise.
+ (MVE_5): Likewise.
+ (MVE_6): Likewise.
+ (MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md.
+ (MVE_LANES): Likewise.
+ (MVE_constraint): Likewise.
+ (MVE_constraint1): Likewise.
+ (MVE_constraint2): Likewise.
+ (MVE_constraint3): Likewise.
+ (MVE_pred): Likewise.
+ (MVE_pred1): Likewise.
+ (MVE_pred2): Likewise.
+ (MVE_pred3): Likewise.
+ (MVE_B_ELEM): Likewise.
+ (MVE_H_ELEM): Likewise.
+ (V_sz_elem1): Likewise.
+ (V_extr_elem): Likewise.
+ (earlyclobber_32): Likewise.
+ (supf): Move int attribute from mve.md to iterators.md.
+ (mode1): Likewise.
+ (VCVTQ_TO_F): Move int iterator from mve.md to iterators.md.
+ (VMVNQ_N): Likewise.
+ (VREV64Q): Likewise.
+ (VCVTQ_FROM_F): Likewise.
+ (VREV16Q): Likewise.
+ (VCVTAQ): Likewise.
+ (VMVNQ): Likewise.
+ (VDUPQ_N): Likewise.
+ (VCLZQ): Likewise.
+ (VADDVQ): Likewise.
+ (VREV32Q): Likewise.
+ (VMOVLBQ): Likewise.
+ (VMOVLTQ): Likewise.
+ (VCVTPQ): Likewise.
+ (VCVTNQ): Likewise.
+ (VCVTMQ): Likewise.
+ (VADDLVQ): Likewise.
+ (VCTPQ): Likewise.
+ (VCTPQ_M): Likewise.
+ (VCVTQ_N_TO_F): Likewise.
+ (VCREATEQ): Likewise.
+ (VSHRQ_N): Likewise.
+ (VCVTQ_N_FROM_F): Likewise.
+ (VADDLVQ_P): Likewise.
+ (VCMPNEQ): Likewise.
+ (VSHLQ): Likewise.
+ (VABDQ): Likewise.
+ (VADDQ_N): Likewise.
+ (VADDVAQ): Likewise.
+ (VADDVQ_P): Likewise.
+ (VANDQ): Likewise.
+ (VBICQ): Likewise.
+ (VBRSRQ_N): Likewise.
+ (VCADDQ_ROT270): Likewise.
+ (VCADDQ_ROT90): Likewise.
+ (VCMPEQQ): Likewise.
+ (VCMPEQQ_N): Likewise.
+ (VCMPNEQ_N): Likewise.
+ (VEORQ): Likewise.
+ (VHADDQ): Likewise.
+ (VHADDQ_N): Likewise.
+ (VHSUBQ): Likewise.
+ (VHSUBQ_N): Likewise.
+ (VMAXQ): Likewise.
+ (VMAXVQ): Likewise.
+ (VMINQ): Likewise.
+ (VMINVQ): Likewise.
+ (VMLADAVQ): Likewise.
+ (VMULHQ): Likewise.
+ (VMULLBQ_INT): Likewise.
+ (VMULLTQ_INT): Likewise.
+ (VMULQ): Likewise.
+ (VMULQ_N): Likewise.
+ (VORNQ): Likewise.
+ (VORRQ): Likewise.
+ (VQADDQ): Likewise.
+ (VQADDQ_N): Likewise.
+ (VQRSHLQ): Likewise.
+ (VQRSHLQ_N): Likewise.
+ (VQSHLQ): Likewise.
+ (VQSHLQ_N): Likewise.
+ (VQSHLQ_R): Likewise.
+ (VQSUBQ): Likewise.
+ (VQSUBQ_N): Likewise.
+ (VRHADDQ): Likewise.
+ (VRMULHQ): Likewise.
+ (VRSHLQ): Likewise.
+ (VRSHLQ_N): Likewise.
+ (VRSHRQ_N): Likewise.
+ (VSHLQ_N): Likewise.
+ (VSHLQ_R): Likewise.
+ (VSUBQ): Likewise.
+ (VSUBQ_N): Likewise.
+ (VADDLVAQ): Likewise.
+ (VBICQ_N): Likewise.
+ (VMLALDAVQ): Likewise.
+ (VMLALDAVXQ): Likewise.
+ (VMOVNBQ): Likewise.
+ (VMOVNTQ): Likewise.
+ (VORRQ_N): Likewise.
+ (VQMOVNBQ): Likewise.
+ (VQMOVNTQ): Likewise.
+ (VSHLLBQ_N): Likewise.
+ (VSHLLTQ_N): Likewise.
+ (VRMLALDAVHQ): Likewise.
+ (VBICQ_M_N): Likewise.
+ (VCVTAQ_M): Likewise.
+ (VCVTQ_M_TO_F): Likewise.
+ (VQRSHRNBQ_N): Likewise.
+ (VABAVQ): Likewise.
+ (VSHLCQ): Likewise.
+ (VRMLALDAVHAQ): Likewise.
+ (VADDVAQ_P): Likewise.
+ (VCLZQ_M): Likewise.
+ (VCMPEQQ_M_N): Likewise.
+ (VCMPEQQ_M): Likewise.
+ (VCMPNEQ_M_N): Likewise.
+ (VCMPNEQ_M): Likewise.
+ (VDUPQ_M_N): Likewise.
+ (VMAXVQ_P): Likewise.
+ (VMINVQ_P): Likewise.
+ (VMLADAVAQ): Likewise.
+ (VMLADAVQ_P): Likewise.
+ (VMLAQ_N): Likewise.
+ (VMLASQ_N): Likewise.
+ (VMVNQ_M): Likewise.
+ (VPSELQ): Likewise.
+ (VQDMLAHQ_N): Likewise.
+ (VQRDMLAHQ_N): Likewise.
+ (VQRDMLASHQ_N): Likewise.
+ (VQRSHLQ_M_N): Likewise.
+ (VQSHLQ_M_R): Likewise.
+ (VREV64Q_M): Likewise.
+ (VRSHLQ_M_N): Likewise.
+ (VSHLQ_M_R): Likewise.
+ (VSLIQ_N): Likewise.
+ (VSRIQ_N): Likewise.
+ (VMLALDAVQ_P): Likewise.
+ (VQMOVNBQ_M): Likewise.
+ (VMOVLTQ_M): Likewise.
+ (VMOVNBQ_M): Likewise.
+ (VRSHRNTQ_N): Likewise.
+ (VORRQ_M_N): Likewise.
+ (VREV32Q_M): Likewise.
+ (VREV16Q_M): Likewise.
+ (VQRSHRNTQ_N): Likewise.
+ (VMOVNTQ_M): Likewise.
+ (VMOVLBQ_M): Likewise.
+ (VMLALDAVAQ): Likewise.
+ (VQSHRNBQ_N): Likewise.
+ (VSHRNBQ_N): Likewise.
+ (VRSHRNBQ_N): Likewise.
+ (VMLALDAVXQ_P): Likewise.
+ (VQMOVNTQ_M): Likewise.
+ (VMVNQ_M_N): Likewise.
+ (VQSHRNTQ_N): Likewise.
+ (VMLALDAVAXQ): Likewise.
+ (VSHRNTQ_N): Likewise.
+ (VCVTMQ_M): Likewise.
+ (VCVTNQ_M): Likewise.
+ (VCVTPQ_M): Likewise.
+ (VCVTQ_M_N_FROM_F): Likewise.
+ (VCVTQ_M_FROM_F): Likewise.
+ (VRMLALDAVHQ_P): Likewise.
+ (VADDLVAQ_P): Likewise.
+ (VABAVQ_P): Likewise.
+ (VSHLQ_M): Likewise.
+ (VSRIQ_M_N): Likewise.
+ (VSUBQ_M): Likewise.
+ (VCVTQ_M_N_TO_F): Likewise.
+ (VHSUBQ_M): Likewise.
+ (VSLIQ_M_N): Likewise.
+ (VRSHLQ_M): Likewise.
+ (VMINQ_M): Likewise.
+ (VMULLBQ_INT_M): Likewise.
+ (VMULHQ_M): Likewise.
+ (VMULQ_M): Likewise.
+ (VHSUBQ_M_N): Likewise.
+ (VHADDQ_M_N): Likewise.
+ (VORRQ_M): Likewise.
+ (VRMULHQ_M): Likewise.
+ (VQADDQ_M): Likewise.
+ (VRSHRQ_M_N): Likewise.
+ (VQSUBQ_M_N): Likewise.
+ (VADDQ_M): Likewise.
+ (VORNQ_M): Likewise.
+ (VRHADDQ_M): Likewise.
+ (VQSHLQ_M): Likewise.
+ (VANDQ_M): Likewise.
+ (VBICQ_M): Likewise.
+ (VSHLQ_M_N): Likewise.
+ (VCADDQ_ROT270_M): Likewise.
+ (VQRSHLQ_M): Likewise.
+ (VQADDQ_M_N): Likewise.
+ (VADDQ_M_N): Likewise.
+ (VMAXQ_M): Likewise.
+ (VQSUBQ_M): Likewise.
+ (VMLASQ_M_N): Likewise.
+ (VMLADAVAQ_P): Likewise.
+ (VBRSRQ_M_N): Likewise.
+ (VMULQ_M_N): Likewise.
+ (VCADDQ_ROT90_M): Likewise.
+ (VMULLTQ_INT_M): Likewise.
+ (VEORQ_M): Likewise.
+ (VSHRQ_M_N): Likewise.
+ (VSUBQ_M_N): Likewise.
+ (VHADDQ_M): Likewise.
+ (VABDQ_M): Likewise.
+ (VMLAQ_M_N): Likewise.
+ (VQSHLQ_M_N): Likewise.
+ (VMLALDAVAQ_P): Likewise.
+ (VMLALDAVAXQ_P): Likewise.
+ (VQRSHRNBQ_M_N): Likewise.
+ (VQRSHRNTQ_M_N): Likewise.
+ (VQSHRNBQ_M_N): Likewise.
+ (VQSHRNTQ_M_N): Likewise.
+ (VRSHRNBQ_M_N): Likewise.
+ (VRSHRNTQ_M_N): Likewise.
+ (VSHLLBQ_M_N): Likewise.
+ (VSHLLTQ_M_N): Likewise.
+ (VSHRNBQ_M_N): Likewise.
+ (VSHRNTQ_M_N): Likewise.
+ (VSTRWSBQ): Likewise.
+ (VSTRBSOQ): Likewise.
+ (VSTRBQ): Likewise.
+ (VLDRBGOQ): Likewise.
+ (VLDRBQ): Likewise.
+ (VLDRWGBQ): Likewise.
+ (VLD1Q): Likewise.
+ (VLDRHGOQ): Likewise.
+ (VLDRHGSOQ): Likewise.
+ (VLDRHQ): Likewise.
+ (VLDRWQ): Likewise.
+ (VLDRDGBQ): Likewise.
+ (VLDRDGOQ): Likewise.
+ (VLDRDGSOQ): Likewise.
+ (VLDRWGOQ): Likewise.
+ (VLDRWGSOQ): Likewise.
+ (VST1Q): Likewise.
+ (VSTRHSOQ): Likewise.
+ (VSTRHSSOQ): Likewise.
+ (VSTRHQ): Likewise.
+ (VSTRWQ): Likewise.
+ (VSTRDSBQ): Likewise.
+ (VSTRDSOQ): Likewise.
+ (VSTRDSSOQ): Likewise.
+ (VSTRWSOQ): Likewise.
+ (VSTRWSSOQ): Likewise.
+ (VSTRWSBWBQ): Likewise.
+ (VLDRWGBWBQ): Likewise.
+ (VSTRDSBWBQ): Likewise.
+ (VLDRDGBWBQ): Likewise.
+ (VADCIQ): Likewise.
+ (VADCIQ_M): Likewise.
+ (VSBCQ): Likewise.
+ (VSBCQ_M): Likewise.
+ (VSBCIQ): Likewise.
+ (VSBCIQ_M): Likewise.
+ (VADCQ): Likewise.
+ (VADCQ_M): Likewise.
+ (UQRSHLLQ): Likewise.
+ (SQRSHRLQ): Likewise.
+ (VSHLCQ_M): Likewise.
+ * config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md.
+ (MVE_VLD_ST): Likewise.
+ (MVE_0): Likewise.
+ (MVE_1): Likewise.
+ (MVE_3): Likewise.
+ (MVE_2): Likewise.
+ (MVE_5): Likewise.
+ (MVE_6): Likewise.
+ (MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md.
+ (MVE_LANES): Likewise.
+ (MVE_constraint): Likewise.
+ (MVE_constraint1): Likewise.
+ (MVE_constraint2): Likewise.
+ (MVE_constraint3): Likewise.
+ (MVE_pred): Likewise.
+ (MVE_pred1): Likewise.
+ (MVE_pred2): Likewise.
+ (MVE_pred3): Likewise.
+ (MVE_B_ELEM): Likewise.
+ (MVE_H_ELEM): Likewise.
+ (V_sz_elem1): Likewise.
+ (V_extr_elem): Likewise.
+ (earlyclobber_32): Likewise.
+ (supf): Move int attribute to iterators.md from mve.md.
+ (mode1): Likewise.
+ (VCVTQ_TO_F): Move int iterator to iterators.md from mve.md.
+ (VMVNQ_N): Likewise.
+ (VREV64Q): Likewise.
+ (VCVTQ_FROM_F): Likewise.
+ (VREV16Q): Likewise.
+ (VCVTAQ): Likewise.
+ (VMVNQ): Likewise.
+ (VDUPQ_N): Likewise.
+ (VCLZQ): Likewise.
+ (VADDVQ): Likewise.
+ (VREV32Q): Likewise.
+ (VMOVLBQ): Likewise.
+ (VMOVLTQ): Likewise.
+ (VCVTPQ): Likewise.
+ (VCVTNQ): Likewise.
+ (VCVTMQ): Likewise.
+ (VADDLVQ): Likewise.
+ (VCTPQ): Likewise.
+ (VCTPQ_M): Likewise.
+ (VCVTQ_N_TO_F): Likewise.
+ (VCREATEQ): Likewise.
+ (VSHRQ_N): Likewise.
+ (VCVTQ_N_FROM_F): Likewise.
+ (VADDLVQ_P): Likewise.
+ (VCMPNEQ): Likewise.
+ (VSHLQ): Likewise.
+ (VABDQ): Likewise.
+ (VADDQ_N): Likewise.
+ (VADDVAQ): Likewise.
+ (VADDVQ_P): Likewise.
+ (VANDQ): Likewise.
+ (VBICQ): Likewise.
+ (VBRSRQ_N): Likewise.
+ (VCADDQ_ROT270): Likewise.
+ (VCADDQ_ROT90): Likewise.
+ (VCMPEQQ): Likewise.
+ (VCMPEQQ_N): Likewise.
+ (VCMPNEQ_N): Likewise.
+ (VEORQ): Likewise.
+ (VHADDQ): Likewise.
+ (VHADDQ_N): Likewise.
+ (VHSUBQ): Likewise.
+ (VHSUBQ_N): Likewise.
+ (VMAXQ): Likewise.
+ (VMAXVQ): Likewise.
+ (VMINQ): Likewise.
+ (VMINVQ): Likewise.
+ (VMLADAVQ): Likewise.
+ (VMULHQ): Likewise.
+ (VMULLBQ_INT): Likewise.
+ (VMULLTQ_INT): Likewise.
+ (VMULQ): Likewise.
+ (VMULQ_N): Likewise.
+ (VORNQ): Likewise.
+ (VORRQ): Likewise.
+ (VQADDQ): Likewise.
+ (VQADDQ_N): Likewise.
+ (VQRSHLQ): Likewise.
+ (VQRSHLQ_N): Likewise.
+ (VQSHLQ): Likewise.
+ (VQSHLQ_N): Likewise.
+ (VQSHLQ_R): Likewise.
+ (VQSUBQ): Likewise.
+ (VQSUBQ_N): Likewise.
+ (VRHADDQ): Likewise.
+ (VRMULHQ): Likewise.
+ (VRSHLQ): Likewise.
+ (VRSHLQ_N): Likewise.
+ (VRSHRQ_N): Likewise.
+ (VSHLQ_N): Likewise.
+ (VSHLQ_R): Likewise.
+ (VSUBQ): Likewise.
+ (VSUBQ_N): Likewise.
+ (VADDLVAQ): Likewise.
+ (VBICQ_N): Likewise.
+ (VMLALDAVQ): Likewise.
+ (VMLALDAVXQ): Likewise.
+ (VMOVNBQ): Likewise.
+ (VMOVNTQ): Likewise.
+ (VORRQ_N): Likewise.
+ (VQMOVNBQ): Likewise.
+ (VQMOVNTQ): Likewise.
+ (VSHLLBQ_N): Likewise.
+ (VSHLLTQ_N): Likewise.
+ (VRMLALDAVHQ): Likewise.
+ (VBICQ_M_N): Likewise.
+ (VCVTAQ_M): Likewise.
+ (VCVTQ_M_TO_F): Likewise.
+ (VQRSHRNBQ_N): Likewise.
+ (VABAVQ): Likewise.
+ (VSHLCQ): Likewise.
+ (VRMLALDAVHAQ): Likewise.
+ (VADDVAQ_P): Likewise.
+ (VCLZQ_M): Likewise.
+ (VCMPEQQ_M_N): Likewise.
+ (VCMPEQQ_M): Likewise.
+ (VCMPNEQ_M_N): Likewise.
+ (VCMPNEQ_M): Likewise.
+ (VDUPQ_M_N): Likewise.
+ (VMAXVQ_P): Likewise.
+ (VMINVQ_P): Likewise.
+ (VMLADAVAQ): Likewise.
+ (VMLADAVQ_P): Likewise.
+ (VMLAQ_N): Likewise.
+ (VMLASQ_N): Likewise.
+ (VMVNQ_M): Likewise.
+ (VPSELQ): Likewise.
+ (VQDMLAHQ_N): Likewise.
+ (VQRDMLAHQ_N): Likewise.
+ (VQRDMLASHQ_N): Likewise.
+ (VQRSHLQ_M_N): Likewise.
+ (VQSHLQ_M_R): Likewise.
+ (VREV64Q_M): Likewise.
+ (VRSHLQ_M_N): Likewise.
+ (VSHLQ_M_R): Likewise.
+ (VSLIQ_N): Likewise.
+ (VSRIQ_N): Likewise.
+ (VMLALDAVQ_P): Likewise.
+ (VQMOVNBQ_M): Likewise.
+ (VMOVLTQ_M): Likewise.
+ (VMOVNBQ_M): Likewise.
+ (VRSHRNTQ_N): Likewise.
+ (VORRQ_M_N): Likewise.
+ (VREV32Q_M): Likewise.
+ (VREV16Q_M): Likewise.
+ (VQRSHRNTQ_N): Likewise.
+ (VMOVNTQ_M): Likewise.
+ (VMOVLBQ_M): Likewise.
+ (VMLALDAVAQ): Likewise.
+ (VQSHRNBQ_N): Likewise.
+ (VSHRNBQ_N): Likewise.
+ (VRSHRNBQ_N): Likewise.
+ (VMLALDAVXQ_P): Likewise.
+ (VQMOVNTQ_M): Likewise.
+ (VMVNQ_M_N): Likewise.
+ (VQSHRNTQ_N): Likewise.
+ (VMLALDAVAXQ): Likewise.
+ (VSHRNTQ_N): Likewise.
+ (VCVTMQ_M): Likewise.
+ (VCVTNQ_M): Likewise.
+ (VCVTPQ_M): Likewise.
+ (VCVTQ_M_N_FROM_F): Likewise.
+ (VCVTQ_M_FROM_F): Likewise.
+ (VRMLALDAVHQ_P): Likewise.
+ (VADDLVAQ_P): Likewise.
+ (VABAVQ_P): Likewise.
+ (VSHLQ_M): Likewise.
+ (VSRIQ_M_N): Likewise.
+ (VSUBQ_M): Likewise.
+ (VCVTQ_M_N_TO_F): Likewise.
+ (VHSUBQ_M): Likewise.
+ (VSLIQ_M_N): Likewise.
+ (VRSHLQ_M): Likewise.
+ (VMINQ_M): Likewise.
+ (VMULLBQ_INT_M): Likewise.
+ (VMULHQ_M): Likewise.
+ (VMULQ_M): Likewise.
+ (VHSUBQ_M_N): Likewise.
+ (VHADDQ_M_N): Likewise.
+ (VORRQ_M): Likewise.
+ (VRMULHQ_M): Likewise.
+ (VQADDQ_M): Likewise.
+ (VRSHRQ_M_N): Likewise.
+ (VQSUBQ_M_N): Likewise.
+ (VADDQ_M): Likewise.
+ (VORNQ_M): Likewise.
+ (VRHADDQ_M): Likewise.
+ (VQSHLQ_M): Likewise.
+ (VANDQ_M): Likewise.
+ (VBICQ_M): Likewise.
+ (VSHLQ_M_N): Likewise.
+ (VCADDQ_ROT270_M): Likewise.
+ (VQRSHLQ_M): Likewise.
+ (VQADDQ_M_N): Likewise.
+ (VADDQ_M_N): Likewise.
+ (VMAXQ_M): Likewise.
+ (VQSUBQ_M): Likewise.
+ (VMLASQ_M_N): Likewise.
+ (VMLADAVAQ_P): Likewise.
+ (VBRSRQ_M_N): Likewise.
+ (VMULQ_M_N): Likewise.
+ (VCADDQ_ROT90_M): Likewise.
+ (VMULLTQ_INT_M): Likewise.
+ (VEORQ_M): Likewise.
+ (VSHRQ_M_N): Likewise.
+ (VSUBQ_M_N): Likewise.
+ (VHADDQ_M): Likewise.
+ (VABDQ_M): Likewise.
+ (VMLAQ_M_N): Likewise.
+ (VQSHLQ_M_N): Likewise.
+ (VMLALDAVAQ_P): Likewise.
+ (VMLALDAVAXQ_P): Likewise.
+ (VQRSHRNBQ_M_N): Likewise.
+ (VQRSHRNTQ_M_N): Likewise.
+ (VQSHRNBQ_M_N): Likewise.
+ (VQSHRNTQ_M_N): Likewise.
+ (VRSHRNBQ_M_N): Likewise.
+ (VRSHRNTQ_M_N): Likewise.
+ (VSHLLBQ_M_N): Likewise.
+ (VSHLLTQ_M_N): Likewise.
+ (VSHRNBQ_M_N): Likewise.
+ (VSHRNTQ_M_N): Likewise.
+ (VSTRWSBQ): Likewise.
+ (VSTRBSOQ): Likewise.
+ (VSTRBQ): Likewise.
+ (VLDRBGOQ): Likewise.
+ (VLDRBQ): Likewise.
+ (VLDRWGBQ): Likewise.
+ (VLD1Q): Likewise.
+ (VLDRHGOQ): Likewise.
+ (VLDRHGSOQ): Likewise.
+ (VLDRHQ): Likewise.
+ (VLDRWQ): Likewise.
+ (VLDRDGBQ): Likewise.
+ (VLDRDGOQ): Likewise.
+ (VLDRDGSOQ): Likewise.
+ (VLDRWGOQ): Likewise.
+ (VLDRWGSOQ): Likewise.
+ (VST1Q): Likewise.
+ (VSTRHSOQ): Likewise.
+ (VSTRHSSOQ): Likewise.
+ (VSTRHQ): Likewise.
+ (VSTRWQ): Likewise.
+ (VSTRDSBQ): Likewise.
+ (VSTRDSOQ): Likewise.
+ (VSTRDSSOQ): Likewise.
+ (VSTRWSOQ): Likewise.
+ (VSTRWSSOQ): Likewise.
+ (VSTRWSBWBQ): Likewise.
+ (VLDRWGBWBQ): Likewise.
+ (VSTRDSBWBQ): Likewise.
+ (VLDRDGBWBQ): Likewise.
+ (VADCIQ): Likewise.
+ (VADCIQ_M): Likewise.
+ (VSBCQ): Likewise.
+ (VSBCQ_M): Likewise.
+ (VSBCIQ): Likewise.
+ (VSBCIQ_M): Likewise.
+ (VADCQ): Likewise.
+ (VADCQ_M): Likewise.
+ (UQRSHLLQ): Likewise.
+ (SQRSHRLQ): Likewise.
+ (VSHLCQ_M): Likewise.
+ (define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md.
+ * config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from
+ mve.md to unspecs.md.
+
+2020-10-06 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Remove -fdbg-cnt-list from deferred options.
+ * dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy
+ to original_limits.
+ (dbg_cnt_list_all_counters): Print also current counter value
+ and print to stderr.
+ * opts-global.c (handle_common_deferred_options): Do not handle
+ -fdbg-cnt-list.
+ * opts.c (common_handle_option): Likewise.
+ * toplev.c (finalize): Handle it after compilation here.
+
+2020-10-06 Martin Liska <mliska@suse.cz>
+
+ * dbgcnt.c (dbg_cnt): Report also upper limit.
+
+2020-10-06 Tom de Vries <tdevries@suse.de>
+
+ * tracer.c (count_insns): Rename to ...
+ (analyze_bb): ... this.
+ (cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function.
+ (ignore_bb_p): Use cached_can_duplicate_bb_p.
+ (tail_duplicate): Call cache_can_duplicate_bb_p.
+
+2020-10-06 Tom de Vries <tdevries@suse.de>
+
+ * tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
+ (can_duplicate_bb_p): New function, factored out of ...
+ (ignore_bb_p): ... here.
+
+2020-10-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/97282
+ * tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for
+ constant op2 if it is not a power of two and the type has precision
+ larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD.
+ * internal-fn.c (contains_call_div_mod): New function.
+ (expand_DIVMOD): If last argument is a constant, try to expand it as
+ TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence
+ contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use
+ divmod optab or divmod libfunc.
+
+2020-10-06 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.h (irange_allocator::allocate): Increase
+ newir storage by one.
+
+2020-10-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/97289
+ * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow
+ node->alias_target if it is a FUNCTION_DECL.
+
+2020-10-06 Joe Ramsay <joe.ramsay@arm.com>
+
+ * config/arm/arm-cpus.in:
+ (ALL_FPU_INTERNAL): Remove vfp_base.
+ (VFPv2): Remove vfp_base.
+ (MVE): Remove vfp_base.
+ (vfp_base): Redefine as implied bit dependent on MVE or FP
+ (cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
+ * config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
+ * config/arm/parsecpu.awk:
+ (gen_isa): Print implied bits and their dependencies to ISA header.
+ (gen_data): Add parsing for implied feature bits.
+
+2020-10-06 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * doc/invoke.texi: Add z15/arch13 to the list of documented
+ -march/-mtune options.
+
+2020-10-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::legacy_intersect): Only handle
+ legacy ranges.
+ (irange::legacy_union): Same.
+ (irange::union_): When unioning legacy with non-legacy,
+ first convert to legacy and do everything in legacy mode.
+ (irange::intersect): Same, but for intersect.
+ * range-op.cc (range_tests): Adjust for above changes.
+
+2020-10-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op.cc (operator_div::wi_fold): Return varying for
+ division by zero.
+ (class operator_rshift): Move class up.
+ (operator_abs::wi_fold): Return [-MIN,-MIN] for ABS([-MIN,-MIN]).
+ (operator_tests): Adjust tests.
+
+2020-10-05 Tom de Vries <tdevries@suse.de>
+
+ * tracer.c (ignore_bb_p): Ignore GOMP_SIMT_XCHG_*.
+
+2020-10-05 Alex Coplan <alex.coplan@arm.com>
+
+ * config/arm/arm-cpus.in (neoverse-v1): Add missing vendor and
+ part numbers.
+
+2020-10-05 Tom de Vries <tdevries@suse.de>
+
+ * tracer.c (ignore_bb_p): Remove incorrect suggestion.
+
+2020-10-05 Jakub Jelinek <jakub@redhat.com>
+
+ * opth-gen.awk: Don't emit explicit_mask array if n_target_explicit
+ is equal to n_target_explicit_mask.
+ * optc-save-gen.awk: Compute has_target_explicit_mask and if false,
+ don't emit code iterating over explicit_mask array elements. Stream
+ also explicit_mask_* target members.
+
+2020-10-05 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-ssa-store-merging.c
+ (imm_store_chain_info::output_merged_store): Use ~0U instead of ~0 in
+ unsigned int array initializer.
+
+2020-10-05 Tom de Vries <tdevries@suse.de>
+
+ PR fortran/95654
+ * tracer.c (ignore_bb_p): Ignore GOMP_SIMT_ENTER_ALLOC,
+ GOMP_SIMT_VOTE_ANY and GOMP_SIMT_EXIT.
+
+2020-10-03 Jakub Jelinek <jakub@redhat.com>
+
+ * opth-gen.awk: For variables referenced in Mask and InverseMask,
+ don't use the explicit_mask bitmask array, but add separate
+ explicit_mask_* members with the same types as the variables.
+ * optc-save-gen.awk: Save, restore, compare and hash the separate
+ explicit_mask_* members.
+
+2020-10-03 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.c (test_insert_search_collapse): Update andling
+ of accesses.
+ (test_merge): Likewise.
+ * ipa-modref-tree.h (struct modref_access_node): Add offset, size,
+ max_size, parm_offset and parm_offset_known.
+ (modref_access_node::useful_p): Constify.
+ (modref_access_node::range_info_useful_p): New predicate.
+ (modref_access_node::operator==): New.
+ (struct modref_parm_map): New structure.
+ (modref_tree::merge): Update for racking parameters)
+ * ipa-modref.c (dump_access): Dump new fields.
+ (get_access): Fill in new fields.
+ (merge_call_side_effects): Update handling of parm map.
+ (write_modref_records): Stream new fields.
+ (read_modref_records): Stream new fields.
+ (compute_parm_map): Update for new parm map.
+ (ipa_merge_modref_summary_after_inlining): Update.
+ (modref_propagate_in_scc): Update.
+ * tree-ssa-alias.c (modref_may_conflict): Handle known ranges.
+
+2020-10-03 H.J. Lu <hjl.tools@gmail.com>
+
+ PR other/97280
+ * doc/extend.texi: Replace roudnevenl with roundevenl
+
+2020-10-02 David Edelsohn <dje.gcc@gmail.com>
+ Andrew MacLeod <amacleod@redhat.com>
+
+ * config/rs6000/rs6000.c: Include ssa.h. Reorder some headers.
+ * config/rs6000/rs6000-call.c: Same.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * params.opt (ipa-cp-large-unit-insns): New parameter.
+ * ipa-cp.c (get_max_overall_size): Use the new parameter.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-cp.c (estimate_local_effects): Add overeall_size to dumped
+ string.
+ (decide_about_value): Add dumping new overall_size.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-fnsummary.h (ipa_freqcounting_predicate): New type.
+ (ipa_fn_summary): Change the type of loop_iterations and loop_strides
+ to vectors of ipa_freqcounting_predicate.
+ (ipa_fn_summary::ipa_fn_summary): Construct the new vectors.
+ (ipa_call_estimates): New fields loops_with_known_iterations and
+ loops_with_known_strides.
+ * ipa-cp.c (hint_time_bonus): Multiply param_ipa_cp_loop_hint_bonus
+ with the expected frequencies of loops with known iteration count or
+ stride.
+ * ipa-fnsummary.c (add_freqcounting_predicate): New function.
+ (ipa_fn_summary::~ipa_fn_summary): Release the new vectors instead of
+ just two predicates.
+ (remap_hint_predicate_after_duplication): Replace with function
+ remap_freqcounting_preds_after_dup.
+ (ipa_fn_summary_t::duplicate): Use it or duplicate new vectors.
+ (ipa_dump_fn_summary): Dump the new vectors.
+ (analyze_function_body): Compute the loop property vectors.
+ (ipa_call_context::estimate_size_and_time): Calculate also
+ loops_with_known_iterations and loops_with_known_strides. Adjusted
+ dumping accordinly.
+ (remap_hint_predicate): Replace with function
+ remap_freqcounting_predicate.
+ (ipa_merge_fn_summary_after_inlining): Use it.
+ (inline_read_section): Stream loopcounting vectors instead of two
+ simple predicates.
+ (ipa_fn_summary_write): Likewise.
+ * params.opt (ipa-max-loop-predicates): New parameter.
+ * doc/invoke.texi (ipa-max-loop-predicates): Document new param.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-inline-analysis.c (do_estimate_edge_time): Adjusted to use
+ ipa_call_estimates.
+ (do_estimate_edge_size): Likewise.
+ (do_estimate_edge_hints): Likewise.
+ * ipa-fnsummary.h (struct ipa_call_estimates): New type.
+ (ipa_call_context::estimate_size_and_time): Adjusted declaration.
+ (estimate_ipcp_clone_size_and_time): Likewise.
+ * ipa-cp.c (hint_time_bonus): Changed the type of the second argument
+ to ipa_call_estimates.
+ (perform_estimation_of_a_value): Adjusted to use ipa_call_estimates.
+ (estimate_local_effects): Likewise.
+ * ipa-fnsummary.c (ipa_call_context::estimate_size_and_time): Adjusted
+ to return estimates in a single ipa_call_estimates parameter.
+ (estimate_ipcp_clone_size_and_time): Likewise.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-fnsummary.h (ipa_cached_call_context): New forward declaration
+ and class.
+ (class ipa_call_context): Make friend ipa_cached_call_context. Moved
+ methods duplicate_from and release to it too.
+ * ipa-fnsummary.c (ipa_call_context::duplicate_from): Moved to class
+ ipa_cached_call_context.
+ (ipa_call_context::release): Likewise, removed the parameter.
+ * ipa-inline-analysis.c (node_context_cache_entry): Change the type of
+ ctx to ipa_cached_call_context.
+ (do_estimate_edge_time): Remove parameter from the call to
+ ipa_cached_call_context::release.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (ipa_auto_call_arg_values): New type.
+ (class ipa_call_arg_values): Likewise.
+ (ipa_get_indirect_edge_target): Replaced vector arguments with
+ ipa_call_arg_values in declaration. Added an overload for
+ ipa_auto_call_arg_values.
+ * ipa-fnsummary.h (ipa_call_context): Removed members m_known_vals,
+ m_known_contexts, m_known_aggs, duplicate_from, release and equal_to,
+ new members m_avals, store_to_cache and equivalent_to_p. Adjusted
+ construcotr arguments.
+ (estimate_ipcp_clone_size_and_time): Replaced vector arguments
+ with ipa_auto_call_arg_values in declaration.
+ (evaluate_properties_for_edge): Likewise.
+ * ipa-cp.c (ipa_get_indirect_edge_target): Adjusted to work on
+ ipa_call_arg_values rather than on separate vectors. Added an
+ overload for ipa_auto_call_arg_values.
+ (devirtualization_time_bonus): Adjusted to work on
+ ipa_auto_call_arg_values rather than on separate vectors.
+ (gather_context_independent_values): Adjusted to work on
+ ipa_auto_call_arg_values rather than on separate vectors.
+ (perform_estimation_of_a_value): Likewise.
+ (estimate_local_effects): Likewise.
+ (modify_known_vectors_with_val): Adjusted both variants to work on
+ ipa_auto_call_arg_values and rename them to
+ copy_known_vectors_add_val.
+ (decide_about_value): Adjusted to work on ipa_call_arg_values rather
+ than on separate vectors.
+ (decide_whether_version_node): Likewise.
+ * ipa-fnsummary.c (evaluate_conditions_for_known_args): Likewise.
+ (evaluate_properties_for_edge): Likewise.
+ (ipa_fn_summary_t::duplicate): Likewise.
+ (estimate_edge_devirt_benefit): Adjusted to work on
+ ipa_call_arg_values rather than on separate vectors.
+ (estimate_edge_size_and_time): Likewise.
+ (estimate_calls_size_and_time_1): Likewise.
+ (summarize_calls_size_and_time): Adjusted calls to
+ estimate_edge_size_and_time.
+ (estimate_calls_size_and_time): Adjusted to work on
+ ipa_call_arg_values rather than on separate vectors.
+ (ipa_call_context::ipa_call_context): Construct from a pointer to
+ ipa_auto_call_arg_values instead of inividual vectors.
+ (ipa_call_context::duplicate_from): Adjusted to access vectors within
+ m_avals.
+ (ipa_call_context::release): Likewise.
+ (ipa_call_context::equal_to): Likewise.
+ (ipa_call_context::estimate_size_and_time): Adjusted to work on
+ ipa_call_arg_values rather than on separate vectors.
+ (estimate_ipcp_clone_size_and_time): Adjusted to work with
+ ipa_auto_call_arg_values rather than on separate vectors.
+ (ipa_merge_fn_summary_after_inlining): Likewise. Adjusted call to
+ estimate_edge_size_and_time.
+ (ipa_update_overall_fn_summary): Adjusted call to
+ estimate_edge_size_and_time.
+ * ipa-inline-analysis.c (do_estimate_edge_time): Adjusted to work with
+ ipa_auto_call_arg_values rather than with separate vectors.
+ (do_estimate_edge_size): Likewise.
+ (do_estimate_edge_hints): Likewise.
+ * ipa-prop.c (ipa_auto_call_arg_values::~ipa_auto_call_arg_values):
+ New destructor.
+
+2020-10-02 Joe Ramsay <joe.ramsay@arm.com>
+
+ * config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of scalar
+ argument.
+ (__arm_vmaxnmvq): Likewise.
+ (__arm_vminnmavq): Likewise.
+ (__arm_vminnmvq): Likewise.
+ (__arm_vmaxnmavq_p): Likewise.
+ (__arm_vmaxnmvq_p): Likewise (and delete duplicate definition).
+ (__arm_vminnmavq_p): Likewise.
+ (__arm_vminnmvq_p): Likewise.
+ (__arm_vmaxavq): Likewise.
+ (__arm_vmaxavq_p): Likewise.
+ (__arm_vmaxvq): Likewise.
+ (__arm_vmaxvq_p): Likewise.
+ (__arm_vminavq): Likewise.
+ (__arm_vminavq_p): Likewise.
+ (__arm_vminvq): Likewise.
+ (__arm_vminvq_p): Likewise.
+
+2020-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.c (neoversev1_tunings): Define.
+ * config/aarch64/aarch64-cores.def (zeus): Use it.
+ (neoverse-v1): Likewise.
+
+2020-10-02 Jan Hubicka <hubicka@ucw.cz>
+
+ * attr-fnspec.h: Update documentation.
+ (attr_fnsec::return_desc_size): Set to 2
+ (attr_fnsec::arg_desc_size): Set to 2
+ * builtin-attrs.def (STR1): Update fnspec.
+ * internal-fn.def (UBSAN_NULL): Update fnspec.
+ (UBSAN_VPTR): Update fnspec.
+ (UBSAN_PTR): Update fnspec.
+ (ASAN_CHECK): Update fnspec.
+ (GOACC_DIM_SIZE): Remove fnspec.
+ (GOACC_DIM_POS): Remove fnspec.
+ * tree-ssa-alias.c (attr_fnspec::verify): Update verification.
+
+2020-10-02 Jan Hubicka <jh@suse.cz>
+
+ * attr-fnspec.h: New file.
+ * calls.c (decl_return_flags): Use attr_fnspec.
+ * gimple.c (gimple_call_arg_flags): Use attr_fnspec.
+ (gimple_call_return_flags): Use attr_fnspec.
+ * tree-into-ssa.c (pass_build_ssa::execute): Use attr_fnspec.
+ * tree-ssa-alias.c (attr_fnspec::verify): New member fuction.
+
+2020-10-02 Jan Hubicka <jh@suse.cz>
+
+ * tree-ssa-alias.c (ao_ref_init_from_ptr_and_range): Break out from ...
+ (ao_ref_init_from_ptr_and_size): ... here.
+
+2020-10-02 Jan Hubicka <hubicka@ucw.cz>
+
+ * data-streamer-in.c (streamer_read_poly_int64): New function.
+ * data-streamer-out.c (streamer_write_poly_int64): New function.
+ * data-streamer.h (streamer_write_poly_int64): Declare.
+ (streamer_read_poly_int64): Declare.
+
+2020-10-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p):
+ Delete.
+ * config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): Likewise.
+ * config/aarch64/aarch64-sve.md: Add banner comment describing
+ how merging predicated FP operations are represented.
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_2): Split into...
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_2_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_2_strict): ...this.
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_any_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_UNARY:optab><mode>_any_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): Split into...
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_relaxed): ...this
+ and...
+ (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_2): Split into...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_2_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_2_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const): Split into...
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_relaxed): ...this
+ and...
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_3): Split into...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_3_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_3_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_any_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_BINARY:optab><mode>_any_strict): ...this.
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const): Split into...
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_relaxed): ...this
+ and...
+ (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_strict): ...this.
+ (*cond_add<mode>_2_const): Split into...
+ (*cond_add<mode>_2_const_relaxed): ...this and...
+ (*cond_add<mode>_2_const_strict): ...this.
+ (*cond_add<mode>_any_const): Split into...
+ (*cond_add<mode>_any_const_relaxed): ...this and...
+ (*cond_add<mode>_any_const_strict): ...this.
+ (*cond_<SVE_COND_FCADD:optab><mode>_2): Split into...
+ (*cond_<SVE_COND_FCADD:optab><mode>_2_relaxed): ...this and...
+ (*cond_<SVE_COND_FCADD:optab><mode>_2_strict): ...this.
+ (*cond_<SVE_COND_FCADD:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FCADD:optab><mode>_any_relaxed): ...this and...
+ (*cond_<SVE_COND_FCADD:optab><mode>_any_strict): ...this.
+ (*cond_sub<mode>_3_const): Split into...
+ (*cond_sub<mode>_3_const_relaxed): ...this and...
+ (*cond_sub<mode>_3_const_strict): ...this.
+ (*aarch64_pred_abd<mode>): Split into...
+ (*aarch64_pred_abd<mode>_relaxed): ...this and...
+ (*aarch64_pred_abd<mode>_strict): ...this.
+ (*aarch64_cond_abd<mode>_2): Split into...
+ (*aarch64_cond_abd<mode>_2_relaxed): ...this and...
+ (*aarch64_cond_abd<mode>_2_strict): ...this.
+ (*aarch64_cond_abd<mode>_3): Split into...
+ (*aarch64_cond_abd<mode>_3_relaxed): ...this and...
+ (*aarch64_cond_abd<mode>_3_strict): ...this.
+ (*aarch64_cond_abd<mode>_any): Split into...
+ (*aarch64_cond_abd<mode>_any_relaxed): ...this and...
+ (*aarch64_cond_abd<mode>_any_strict): ...this.
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2): Split into...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_strict): ...this.
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4): Split into...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_strict): ...this.
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_relaxed): ...this and...
+ (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_strict): ...this.
+ (*cond_<SVE_COND_FCMLA:optab><mode>_4): Split into...
+ (*cond_<SVE_COND_FCMLA:optab><mode>_4_relaxed): ...this and...
+ (*cond_<SVE_COND_FCMLA:optab><mode>_4_strict): ...this.
+ (*cond_<SVE_COND_FCMLA:optab><mode>_any): Split into...
+ (*cond_<SVE_COND_FCMLA:optab><mode>_any_relaxed): ...this and...
+ (*cond_<SVE_COND_FCMLA:optab><mode>_any_strict): ...this.
+ (*aarch64_pred_fac<cmp_op><mode>): Split into...
+ (*aarch64_pred_fac<cmp_op><mode>_relaxed): ...this and...
+ (*aarch64_pred_fac<cmp_op><mode>_strict): ...this.
+ (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>): Split
+ into...
+ (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed):
+ ...this and...
+ (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict):
+ ...this.
+ (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>): Split
+ into...
+ (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed):
+ ...this and...
+ (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict):
+ ...this.
+ * config/aarch64/aarch64-sve2.md
+ (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>): Split into...
+ (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_relaxed): ...this and...
+ (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_strict): ...this.
+ (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any): Split into...
+ (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_relaxed): ...this
+ and...
+ (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_strict): ...this.
+ (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>): Split into...
+ (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_relaxed): ...this and...
+ (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_strict): ...this.
+
+2020-10-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/arm/neon.md (*sub<VDQ:mode>3_neon): Use the new mode macros
+ for the insn condition.
+ (sub<VH:mode>3, *mul<VDQW:mode>3_neon): Likewise.
+ (mul<VDQW:mode>3add<VDQW:mode>_neon): Likewise.
+ (mul<VH:mode>3add<VH:mode>_neon): Likewise.
+ (mul<VDQW:mode>3neg<VDQW:mode>add<VDQW:mode>_neon): Likewise.
+ (fma<VCVTF:mode>4, fma<VH:mode>4, *fmsub<VCVTF:mode>4): Likewise.
+ (quad_halves_<code>v4sf, reduc_plus_scal_<VD:mode>): Likewise.
+ (reduc_plus_scal_<VQ:mode>, reduc_smin_scal_<VD:mode>): Likewise.
+ (reduc_smin_scal_<VQ:mode>, reduc_smax_scal_<VD:mode>): Likewise.
+ (reduc_smax_scal_<VQ:mode>, mul<VH:mode>3): Likewise.
+ (neon_vabd<VF:mode>_2, neon_vabd<VF:mode>_3): Likewise.
+ (fma<VH:mode>4_intrinsic): Delete.
+ (neon_vadd<VCVTF:mode>): Use the new mode macros to decide which
+ form of instruction to generate.
+ (neon_vmla<VDQW:mode>, neon_vmls<VDQW:mode>): Likewise.
+ (neon_vsub<VCVTF:mode>): Likewise.
+ (neon_vfma<VH:mode>): Generate the main fma<mode>4 form instead
+ of using fma<mode>4_intrinsic.
+
+2020-10-02 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/97193
+ * coverage.c (coverage_init): GCDA note files should not be
+ mangled and should end in output directory.
+
+2020-10-02 Jason Merril <jason@redhat.com>
+
+ * gimple.h (gimple_call_operator_delete_p): Rename from
+ gimple_call_replaceable_operator_delete_p.
+ * gimple.c (gimple_call_operator_delete_p): Likewise.
+ * tree.h (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): Remove.
+ * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Adjust.
+ (propagate_necessity): Likewise.
+ (eliminate_unnecessary_stmts): Likewise.
+ * tree-ssa-structalias.c (find_func_aliases_for_call): Likewise.
+
+2020-10-02 Richard Biener <rguenther@suse.de>
+
+ * gimple.h (GF_CALL_FROM_NEW_OR_DELETE): New call flag.
+ (gimple_call_set_from_new_or_delete): New.
+ (gimple_call_from_new_or_delete): Likewise.
+ * gimple.c (gimple_build_call_from_tree): Set
+ GF_CALL_FROM_NEW_OR_DELETE appropriately.
+ * ipa-icf-gimple.c (func_checker::compare_gimple_call):
+ Compare gimple_call_from_new_or_delete.
+ * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Make
+ sure to only consider new/delete calls from new or delete
+ expressions.
+ (propagate_necessity): Likewise.
+ (eliminate_unnecessary_stmts): Likewise.
+ * tree-ssa-structalias.c (find_func_aliases_for_call):
+ Likewise.
+
+2020-10-02 Jason Merril <jason@redhat.com>
+
+ * tree.h (CALL_FROM_NEW_OR_DELETE_P): Move from cp-tree.h.
+ * tree-core.h: Document new usage of protected_flag.
+
+2020-10-02 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.h (irange::fits_p): New.
+
+2020-10-01 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_legitimize_address): Use
+ gen_int_mode for high part of address constant.
+
+2020-10-01 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_linux64_override_options):
+ Formatting. Correct setting of TARGET_NO_FP_IN_TOC and
+ TARGET_NO_SUM_IN_TOC.
+
+2020-10-01 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/freebsd64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Use
+ rs6000_linux64_override_options.
+ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Break
+ out to..
+ * config/rs6000/rs6000.c (rs6000_linux64_override_options): ..this,
+ new function. Tweak non-biarch test and clearing of
+ profile_kernel to work with freebsd64.h.
+
+2020-10-01 Martin Liska <mliska@suse.cz>
+
+ * config/rs6000/rs6000-call.c: Include value-range.h.
+ * config/rs6000/rs6000.c: Likewise.
+
+2020-10-01 Tom de Vries <tdevries@suse.de>
+
+ PR target/80845
+ * config/nvptx/nvptx.md (define_insn "truncsi<QHIM>2"): Emit mov.u32
+ instead of cvt.u32.u32.
+
+2020-10-01 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/96528
+ PR target/97288
+ * config/arm/arm-protos.h (arm_expand_vector_compare): Declare.
+ (arm_expand_vcond): Likewise.
+ * config/arm/arm.c (arm_expand_vector_compare): New function.
+ (arm_expand_vcond): Likewise.
+ * config/arm/neon.md (vec_cmp<VDQW:mode><v_cmp_result>): New pattern.
+ (vec_cmpu<VDQW:mode><VDQW:mode>): Likewise.
+ (vcond<VDQW:mode><VDQW:mode>): Require operand 5 to be a register
+ or zero. Use arm_expand_vcond.
+ (vcond<V_cvtto><V32:mode>): New pattern.
+ (vcondu<VDQIW:mode><VDQIW:mode>): Generalize to...
+ (vcondu<VDQW:mode><v_cmp_result): ...this. Require operand 5
+ to be a register or zero. Use arm_expand_vcond.
+ (vcond_mask_<VDQW:mode><v_cmp_result>): New pattern.
+ (neon_vc<cmp_op><mode>, neon_vc<cmp_op><mode>_insn): Add "@" marker.
+ (neon_vbsl<mode>): Likewise.
+ (neon_vc<cmp_op>u<mode>): Reexpress as...
+ (@neon_vc<code><mode>): ...this.
+
+2020-10-01 Michael Davidsaver <mdavidsaver@gmail.com>
+
+ * config/i386/t-rtems: Change from mtune to march when building
+ multilibs. The mtune argument tunes or optimizes for a specific
+ CPU model but does not ensure the generated code is appropriate
+ for the CPU model. Prior to this patch, i386 compatible code
+ was always generated but tuned for later models.
+
+2020-10-01 Aldy Hernandez <aldyh@redhat.com>
+
+ * builtins.c (compute_objsize): Replace vr_values with range_query.
+ (get_range): Same.
+ (gimple_call_alloc_size): Same.
+ * builtins.h (class vr_values): Remove.
+ (gimple_call_alloc_size): Replace vr_values with range_query.
+ * gimple-ssa-sprintf.c (get_int_range): Same.
+ (struct directive): Pass gimple context to fmtfunc callback.
+ (directive::set_width): Replace inline with out-of-line version.
+ (directive::set_precision): Same.
+ (format_none): New gimple argument.
+ (format_percent): New gimple argument.
+ (format_integer): New gimple argument.
+ (format_floating): New gimple argument.
+ (get_string_length): Use range_query API.
+ (format_character): New gimple argument.
+ (format_string): New gimple argument.
+ (format_plain): New gimple argument.
+ (format_directive): New gimple argument.
+ (parse_directive): Replace vr_values with range_query.
+ (compute_format_length): Same.
+ (handle_printf_call): Same. Adjust for range_query API.
+ * tree-ssa-strlen.c (get_range): Same.
+ (compare_nonzero_chars): Same.
+ (get_addr_stridx) Replace vr_values with range_query.
+ (get_stridx): Same.
+ (dump_strlen_info): Same.
+ (get_range_strlen_dynamic): Adjust for range_query API.
+ (set_strlen_range): Same
+ (maybe_warn_overflow): Replace vr_values with range_query.
+ (handle_builtin_strcpy): Same.
+ (maybe_diag_stxncpy_trunc): Add FIXME comment.
+ (handle_builtin_memcpy): Replace vr_values with range_query.
+ (handle_builtin_memset): Same.
+ (get_len_or_size): Same.
+ (strxcmp_eqz_result): Same.
+ (handle_builtin_string_cmp): Same.
+ (count_nonzero_bytes_addr): Same, plus adjust for range_query API.
+ (count_nonzero_bytes): Replace vr_values with range_query.
+ (handle_store): Same.
+ (strlen_check_and_optimize_call): Same.
+ (handle_integral_assign): Same.
+ (check_and_optimize_stmt): Same.
+ * tree-ssa-strlen.h (class vr_values): Remove.
+ (get_range): Replace vr_values with range_query.
+ (get_range_strlen_dynamic): Same.
+ (handle_printf_call): Same.
+
+2020-10-01 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-loop-versioning.cc (lv_dom_walker::before_dom_children):
+ Pass m_range_analyzer instead of get_vr_values.
+ (loop_versioning::name_prop::get_value): Rename to...
+ (loop_versioning::name_prop::value_of_expr): ...this.
+ * gimple-ssa-evrp-analyze.c (evrp_range_analyzer::evrp_range_analyzer):
+ Adjust for evrp_range_analyzer
+ inheriting from vr_values.
+ (evrp_range_analyzer::try_find_new_range): Same.
+ (evrp_range_analyzer::record_ranges_from_incoming_edge): Same.
+ (evrp_range_analyzer::record_ranges_from_phis): Same.
+ (evrp_range_analyzer::record_ranges_from_stmt): Same.
+ (evrp_range_analyzer::push_value_range): Same.
+ (evrp_range_analyzer::pop_value_range): Same.
+ * gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Inherit from
+ vr_values. Adjust accordingly.
+ * gimple-ssa-evrp.c: Adjust for evrp_range_analyzer inheriting from
+ vr_values.
+ (evrp_folder::value_of_evrp): Rename from get_value.
+ * tree-ssa-ccp.c (class ccp_folder): Rename get_value to
+ value_of_expr.
+ (ccp_folder::get_value): Rename to...
+ (ccp_folder::value_of_expr): ...this.
+ * tree-ssa-copy.c (class copy_folder): Rename get_value to
+ value_of_expr.
+ (copy_folder::get_value): Rename to...
+ (copy_folder::value_of_expr): ...this.
+ * tree-ssa-dom.c (dom_opt_dom_walker::after_dom_children): Adjust
+ for evrp_range_analyzer inheriting from vr_values.
+ (dom_opt_dom_walker::optimize_stmt): Same.
+ * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
+ Call value_of_* instead of get_value.
+ (substitute_and_fold_engine::replace_phi_args_in): Same.
+ (substitute_and_fold_engine::propagate_into_phi_args): Same.
+ (substitute_and_fold_dom_walker::before_dom_children): Same.
+ * tree-ssa-propagate.h: Include value-query.h.
+ (class substitute_and_fold_engine): Inherit from value_query.
+ * tree-ssa-strlen.c (strlen_dom_walker::before_dom_children):
+ Adjust for evrp_range_analyzer inheriting from vr_values.
+ * tree-ssa-threadedge.c (record_temporary_equivalences_from_phis):
+ Same.
+ * tree-vrp.c (class vrp_folder): Same.
+ (vrp_folder::get_value): Rename to value_of_expr.
+ * vr-values.c (vr_values::get_lattice_entry): Adjust for
+ vr_values inheriting from range_query.
+ (vr_values::range_of_expr): New.
+ (vr_values::value_of_expr): New.
+ (vr_values::value_on_edge): New.
+ (vr_values::value_of_stmt): New.
+ (simplify_using_ranges::op_with_boolean_value_range_p): Call
+ get_value_range through query.
+ (check_for_binary_op_overflow): Rename store to query.
+ (vr_values::vr_values): Remove vrp_value_range_pool.
+ (vr_values::~vr_values): Same.
+ (simplify_using_ranges::get_vr_for_comparison): Call get_value_range
+ through query.
+ (simplify_using_ranges::compare_names): Same.
+ (simplify_using_ranges::vrp_evaluate_conditional): Same.
+ (simplify_using_ranges::vrp_visit_cond_stmt): Same.
+ (simplify_using_ranges::simplify_abs_using_ranges): Same.
+ (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
+ (simplify_cond_using_ranges_2): Same.
+ (simplify_using_ranges::simplify_switch_using_ranges): Same.
+ (simplify_using_ranges::two_valued_val_range_p): Same.
+ (simplify_using_ranges::simplify_using_ranges): Rename store to query.
+ (simplify_using_ranges::simplify): Assert that we have a query.
+ * vr-values.h (class range_query): Remove.
+ (class simplify_using_ranges): Remove inheritance of range_query.
+ (class vr_values): Add virtuals for range_of_expr, value_of_expr,
+ value_on_edge, value_of_stmt, and get_value_range.
+ Call range_query allocator instead of using vrp_value_range_pool.
+ Remove vrp_value_range_pool.
+ (simplify_using_ranges::get_value_range): Remove.
+
+2020-10-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97236
+ * tree-vect-stmts.c (get_group_load_store_type): Keep
+ VMAT_ELEMENTWISE for single-element vectors.
+
+2020-10-01 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (compute_parm_map): Be ready for callee_pi to be NULL.
+
+2020-10-01 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97244
+ * ipa-fnsummary.c (pass_free_fnsummary::execute): Free
+ also indirect inlining datastructure.
+ * ipa-modref.c (pass_ipa_modref::execute): Do not free them here.
+ * ipa-prop.c (ipa_free_all_node_params): Do not crash when info does
+ not exist.
+ (ipa_unregister_cgraph_hooks): Likewise.
+
+2020-10-01 Jan Hubicka <jh@suse.cz>
+
+ * internal-fn.c (DEF_INTERNAL_FN): Fix handling of fnspec
+
+2020-10-01 Aldy Hernandez <aldyh@redhat.com>
+
+ * Makefile.in: Add value-query.o.
+ * value-query.cc: New file.
+ * value-query.h: New file.
+
+2020-10-01 Alex Coplan <alex.coplan@arm.com>
+
+ * config/arm/arm-cpus.in: Fix ordering, move Neoverse N2 down.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+
+2020-10-01 Jakub Jelinek <jakub@redhat.com>
+
+ * config/s390/s390.c (s390_atomic_assign_expand_fenv): Use
+ TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
+ fenv_var and old_fpc. Formatting fixes.
+
+2020-10-01 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-patterns.c (vect_recog_bool_pattern): Also handle
+ VIEW_CONVERT_EXPR.
+
+2020-10-01 Florian Weimer <fweimer@redhat.com>
+
+ PR target/97250
+ * config/i386/i386.h (PTA_NO_TUNE, PTA_X86_64_BASELINE)
+ (PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4): New.
+ * common/config/i386/i386-common.c (processor_alias_table):
+ Add "x86-64-v2", "x86-64-v3", "x86-64-v4".
+ * config/i386/i386-options.c (ix86_option_override_internal):
+ Handle new PTA_NO_TUNE processor table entries.
+ * doc/invoke.texi (x86 Options): Document new -march values.
+
+2020-10-01 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/ppc-asm.h: Support __PCREL__ code.
+
+2020-10-01 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't
+ set -mcmodel=small for -mno-minimal-toc when pcrel.
+
+2020-09-30 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97189
+ * attribs.c (attr_access::array_as_string): Avoid assuming a VLA
+ access specification string contains a closing bracket.
+
+2020-09-30 Martin Sebor <msebor@redhat.com>
+
+ PR c/97206
+ * attribs.c (attr_access::array_as_string): Avoid modifying a shared
+ type in place and use build_type_attribute_qual_variant instead.
+
+2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/arm/arm-cpus.in: Add Cortex-A78 and Cortex-A78AE cores.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add Cortex-A78 and Cortex-A78AE cores.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Add -mtune=cortex-a78 and -mtune=cortex-a78ae.
+
+2020-09-30 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ PR target/96795
+ * config/arm/arm_mve.h (__ARM_mve_coerce2): Define.
+ (__arm_vaddq): Correct the scalar argument.
+ (__arm_vaddq_m): Likewise.
+ (__arm_vaddq_x): Likewise.
+ (__arm_vcmpeqq_m): Likewise.
+ (__arm_vcmpeqq): Likewise.
+ (__arm_vcmpgeq_m): Likewise.
+ (__arm_vcmpgeq): Likewise.
+ (__arm_vcmpgtq_m): Likewise.
+ (__arm_vcmpgtq): Likewise.
+ (__arm_vcmpleq_m): Likewise.
+ (__arm_vcmpleq): Likewise.
+ (__arm_vcmpltq_m): Likewise.
+ (__arm_vcmpltq): Likewise.
+ (__arm_vcmpneq_m): Likewise.
+ (__arm_vcmpneq): Likewise.
+ (__arm_vfmaq_m): Likewise.
+ (__arm_vfmaq): Likewise.
+ (__arm_vfmasq_m): Likewise.
+ (__arm_vfmasq): Likewise.
+ (__arm_vmaxnmavq): Likewise.
+ (__arm_vmaxnmavq_p): Likewise.
+ (__arm_vmaxnmvq): Likewise.
+ (__arm_vmaxnmvq_p): Likewise.
+ (__arm_vminnmavq): Likewise.
+ (__arm_vminnmavq_p): Likewise.
+ (__arm_vminnmvq): Likewise.
+ (__arm_vminnmvq_p): Likewise.
+ (__arm_vmulq_m): Likewise.
+ (__arm_vmulq): Likewise.
+ (__arm_vmulq_x): Likewise.
+ (__arm_vsetq_lane): Likewise.
+ (__arm_vsubq_m): Likewise.
+ (__arm_vsubq): Likewise.
+ (__arm_vsubq_x): Likewise.
+
+2020-09-30 Joel Hutton <joel.hutton@arm.com>
+
+ PR target/96837
+ * tree-vect-slp.c (vect_analyze_slp): Do not call
+ vect_attempt_slp_rearrange_stmts for vector constructors.
+
+2020-09-30 Tamar Christina <tamar.christina@arm.com>
+
+ * tree-vectorizer.h (SLP_TREE_REF_COUNT): New.
+ * tree-vect-slp.c (_slp_tree::_slp_tree, _slp_tree::~_slp_tree,
+ vect_free_slp_tree, vect_build_slp_tree, vect_print_slp_tree,
+ slp_copy_subtree, vect_attempt_slp_rearrange_stmts): Use it.
+
+2020-09-30 Tobias Burnus <tobias@codesourcery.com>
+
+ * omp-offload.c (omp_discover_implicit_declare_target): Also
+ handled nested functions.
+
+2020-09-30 Tobias Burnus <tobias@codesourcery.com>
+ Tom de Vries <tdevries@suse.de>
+
+ * builtins.c (expand_builtin_cexpi, fold_builtin_sincos): Update
+ targetm.libc_has_function call.
+ * builtins.def (DEF_C94_BUILTIN, DEF_C99_BUILTIN, DEF_C11_BUILTIN):
+ (DEF_C2X_BUILTIN, DEF_C99_COMPL_BUILTIN, DEF_C99_C90RES_BUILTIN):
+ Same.
+ * config/darwin-protos.h (darwin_libc_has_function): Update prototype.
+ * config/darwin.c (darwin_libc_has_function): Add arg.
+ * config/linux-protos.h (linux_libc_has_function): Update prototype.
+ * config/linux.c (linux_libc_has_function): Add arg.
+ * config/i386/i386.c (ix86_libc_has_function): Update
+ targetm.libc_has_function call.
+ * config/nvptx/nvptx.c (nvptx_libc_has_function): New function.
+ (TARGET_LIBC_HAS_FUNCTION): Redefine to nvptx_libc_has_function.
+ * convert.c (convert_to_integer_1): Update targetm.libc_has_function
+ call.
+ * match.pd: Same.
+ * target.def (libc_has_function): Add arg.
+ * doc/tm.texi: Regenerate.
+ * targhooks.c (default_libc_has_function, gnu_libc_has_function)
+ (no_c99_libc_has_function): Add arg.
+ * targhooks.h (default_libc_has_function, no_c99_libc_has_function)
+ (gnu_libc_has_function): Update prototype.
+ * tree-ssa-math-opts.c (pass_cse_sincos::execute): Update
+ targetm.libc_has_function call.
+
+2020-09-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97184
+ * config/i386/i386.md (UNSPECV_MOVDIRI): Renamed to ...
+ (UNSPEC_MOVDIRI): This.
+ (UNSPECV_MOVDIR64B): Renamed to ...
+ (UNSPEC_MOVDIR64B): This.
+ (movdiri<mode>): Use SET operation.
+ (@movdir64b_<mode>): Likewise.
+
+2020-09-30 Florian Weimer <fweimer@redhat.com>
+
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __LAHF_SAHF__ and __MOVBE__ based on ISA flags.
+
+2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/97150
+ * config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument
+ signed.
+ (vqrshlh_u16): Likewise.
+ (vqrshls_u32): Likewise.
+ (vqrshld_u64): Likewise.
+ (vqshlb_u8): Likewise.
+ (vqshlh_u16): Likewise.
+ (vqshls_u32): Likewise.
+ (vqshld_u64): Likewise.
+ (vshld_u64): Likewise.
+
+2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/96313
+ * config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS
+ qualifiers.
+ * config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call.
+ Remove unnecessary result cast.
+ (vqmovun_s32): Likewise.
+ (vqmovun_s64): Likewise.
+ (vqmovunh_s16): Likewise. Fix return type.
+ (vqmovuns_s32): Likewise.
+ (vqmovund_s64): Likewise.
+
+2020-09-30 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_split_128bit_move_p): Add a
+ function comment. Tighten check for FP moves.
+ * config/aarch64/aarch64.md (*movti_aarch64): Add a w<-Z alternative.
+ (*movtf_aarch64): Handle r<-Y like r<-r. Remove unnecessary
+ earlyclobber. Change splitter predicate from aarch64_reg_or_imm
+ to nonmemory_operand.
+
+2020-09-30 Alex Coplan <alex.coplan@arm.com>
+
+ PR target/97251
+ * config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to
+ TARGET_VFP_BASE.
+ (movdf): Likewise.
+ * config/arm/vfp.md (no_literal_pool_df_immediate): Likewise.
+ (no_literal_pool_sf_immediate): Likewise.
+
+2020-09-30 Alan Modra <amodra@gmail.com>
+
+ * configure.ac (--with-long-double-format): Typo fix.
+ * configure: Regenerate.
+
+2020-09-30 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't use
+ non-existent operands[].
+ (@tablejump<mode>_nospec): Likewise.
+
+2020-09-30 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.md (tablejump): Simplify.
+ (tablejumpsi): Merge this ...
+ (tablejumpdi): ... and this ...
+ (@tablejump<mode>_normal): ... into this.
+ (tablejumpsi_nospec): Merge this ...
+ (tablejumpdi_nospec): ... and this ...
+ (@tablejump<mode>_nospec): ... into this.
+ (*tablejump<mode>_internal1): Delete, rename to ...
+ (@tablejump<mode>_insn_normal): ... this.
+ (*tablejump<mode>_internal1_nospec): Delete, rename to ...
+ (@tablejump<mode>_insn_nospec): ... this.
+
+2020-09-29 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97188
+ * calls.c (maybe_warn_rdwr_sizes): Simplify warning messages.
+ Correct handling of VLA argumments.
+
+2020-09-29 Marek Polacek <polacek@redhat.com>
+
+ PR c++/94695
+ * doc/invoke.texi: Document -Wrange-loop-construct.
+
+2020-09-29 Jim Wilson <jimw@sifive.com>
+
+ PR bootstrap/97183
+ * configure.ac (gcc_cv_header_zstd_h): Check ZSTD_VERISON_NUMBER.
+ * configure: Regenerated.
+
+2020-09-29 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/arm/arm-cpus.in: Add Cortex-X1 core.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2020-09-29 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add Cortex-X1 Arm core.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Add -mtune=cortex-x1 docs.
+
+2020-09-29 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97247
+ * config/i386/enqcmdintrin.h: Replace <enqcmdntrin.h> with
+ <enqcmdintrin.h>. Replace _ENQCMDNTRIN_H_INCLUDED with
+ _ENQCMDINTRIN_H_INCLUDED.
+
+2020-09-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97241
+ * tree-vect-loop.c (vectorizable_reduction): Move finding
+ the SLP node for the reduction stmt to a better place.
+
+2020-09-29 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_analyze_slp): Move SLP reduction
+ re-arrangement and SLP graph load gathering...
+ (vect_optimize_slp): ... here.
+ * tree-vectorizer.h (vec_info::slp_loads): Remove.
+
+2020-09-29 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/97231
+ * config/i386/amxbf16intrin.h: Add FSF copyright notes.
+ * config/i386/amxint8intrin.h: Ditto.
+ * config/i386/amxtileintrin.h: Ditto.
+ * config/i386/avx512vp2intersectintrin.h: Ditto.
+ * config/i386/avx512vp2intersectvlintrin.h: Ditto.
+ * config/i386/pconfigintrin.h: Ditto.
+ * config/i386/tsxldtrkintrin.h: Ditto.
+ * config/i386/wbnoinvdintrin.h: Ditto.
+
+2020-09-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97238
+ * tree-ssa-reassoc.c (ovce_extract_ops): Fix typo.
+
+2020-09-29 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/arm/arm.h (ARM_HAVE_NEON_V8QI_ARITH, ARM_HAVE_NEON_V4HI_ARITH)
+ (ARM_HAVE_NEON_V2SI_ARITH, ARM_HAVE_NEON_V16QI_ARITH): New macros.
+ (ARM_HAVE_NEON_V8HI_ARITH, ARM_HAVE_NEON_V4SI_ARITH): Likewise.
+ (ARM_HAVE_NEON_V2DI_ARITH, ARM_HAVE_NEON_V4HF_ARITH): Likewise.
+ (ARM_HAVE_NEON_V8HF_ARITH, ARM_HAVE_NEON_V2SF_ARITH): Likewise.
+ (ARM_HAVE_NEON_V4SF_ARITH, ARM_HAVE_V8QI_ARITH, ARM_HAVE_V4HI_ARITH)
+ (ARM_HAVE_V2SI_ARITH, ARM_HAVE_V16QI_ARITH, ARM_HAVE_V8HI_ARITH)
+ (ARM_HAVE_V4SI_ARITH, ARM_HAVE_V2DI_ARITH, ARM_HAVE_V4HF_ARITH)
+ (ARM_HAVE_V2SF_ARITH, ARM_HAVE_V8HF_ARITH, ARM_HAVE_V4SF_ARITH):
+ Likewise.
+ * config/arm/iterators.md (VNIM, VNINOTM): Delete.
+ * config/arm/vec-common.md (add<VNIM:mode>3, addv8hf3)
+ (add<VNINOTM:mode>3): Replace with...
+ (add<VDQ:mode>3): ...this new expander.
+ * config/arm/neon.md (*add<VDQ:mode>3_neon): Use the new
+ ARM_HAVE_NEON_<MODE>_ARITH macros as the C condition.
+ (addv8hf3_neon, addv4hf3, add<VFH:mode>3_fp16): Delete in
+ favor of the above.
+ (neon_vadd<VH:mode>): Use gen_add<mode>3 instead of
+ gen_add<mode>3_fp16.
+
+2020-09-29 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
+ __riscv_cmodel_medany when PIC mode.
+
+2020-09-29 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Move neoverse-n2 after saphira.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+
+2020-09-29 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96979
+ * tree-switch-conversion.c (jump_table_cluster::can_be_handled):
+ Make a fast bail out.
+ (bit_test_cluster::can_be_handled): Likewise here.
+ * tree-switch-conversion.h (get_range): Use wi::to_wide instead
+ of a folding.
+
+2020-09-29 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2020-09-22 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96979
+ * doc/invoke.texi: Document new param max-switch-clustering-attempts.
+ * params.opt: Add new parameter.
+ * tree-switch-conversion.c (jump_table_cluster::find_jump_tables):
+ Limit number of attempts.
+ (bit_test_cluster::find_bit_tests): Likewise.
+
+2020-09-28 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.h (class irange): Add irange_allocator friend.
+ (class irange_allocator): New.
+
+2020-09-28 Tobias Burnus <tobias@codesourcery.com>
+
+ PR middle-end/96390
+ * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle
+ alias nodes.
+
+2020-09-28 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_insert_epi8): New.
+ (_mm_insert_epi32): New.
+ (_mm_insert_epi64): New.
+
+2020-09-28 liuhongt <hongtao.liu@intel.com>
+
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET,
+ OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET,
+ OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET,
+ OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET):
+ New marcos.
+ (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16.
+ * common/config/i386/i386-cpuinfo.h (processor_types): Add
+ FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16.
+ * common/config/i386/cpuinfo.h (XSTATE_TILECFG,
+ XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro.
+ (get_available_features): Enable AMX features only if
+ their states are suoorited by OSXSAVE.
+ * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY
+ for amx-tile, amx-int8, amx-bf16.
+ * config.gcc: Add amxtileintrin.h, amxint8intrin.h,
+ amxbf16intrin.h to extra headers.
+ * config/i386/amxbf16intrin.h: New file.
+ * config/i386/amxint8intrin.h: Ditto.
+ * config/i386/amxtileintrin.h: Ditto.
+ * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8):
+ New macro.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __AMX_TILE__, __AMX_INT8__, AMX_BF16__.
+ * config/i386/i386-options.c (ix86_target_string): Add
+ -mamx-tile, -mamx-int8, -mamx-bf16.
+ (ix86_option_override_internal): Handle AMX-TILE,
+ AMX-INT8, AMX-BF16.
+ * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P,
+ TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P,
+ PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros.
+ * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16.
+ * config/i386/immintrin.h: Include amxtileintrin.h,
+ amxint8intrin.h, amxbf16intrin.h.
+ * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16.
+ * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16.
+ * doc/sourcebuild.texi ((Effective-Target Keywords, Other
+ hardware attributes): Document amx_int8, amx_tile, amx_bf16.
+
+2020-09-28 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_general_expand_builtin): Do not alter value on a
+ force_reg returned rtx.
+
+2020-09-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-eh.c (lower_try_finally_dup_block): Revert latest change.
+
+2020-09-27 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (modref_summary::useful_p): Fix testing of stores.
+
+2020-09-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/97073
+ * optabs.c (expand_binop, expand_absneg_bit, expand_unop,
+ expand_copysign_bit): Check reg_overlap_mentioned_p between target
+ and operand(s) and if it returns true, force a pseudo as target.
+
+2020-09-27 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * gimple-isel.cc (gimple_expand_vec_set_expr): New function.
+ (gimple_expand_vec_cond_exprs): Rename to ...
+ (gimple_expand_vec_exprs): ... this and call
+ gimple_expand_vec_set_expr.
+ * internal-fn.c (vec_set_direct): New define.
+ (expand_vec_set_optab_fn): New function.
+ (direct_vec_set_optab_supported_p): New define.
+ * internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN.
+ * optabs.c (can_vec_set_var_idx_p): New function.
+ * optabs.h (can_vec_set_var_idx_p): New declaration.
+
+2020-09-26 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass.
+ * ipa-pure-const.c (analyze_stmt): Update comment.
+
+2020-09-26 David Edelsohn <dje.gcc@gmail.com>
+ Clement Chigot <clement.chigot@atos.com>
+
+ * collect2.c (visibility_flag): New.
+ (main): Detect -fvisibility.
+ (write_c_file_stat): Push and pop default visibility.
+
+2020-09-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h.
+ (inline_call): Call ipa_merge_modref_summary_after_inlining.
+ * ipa-inline.c (ipa_inline): Do not free summaries.
+ * ipa-modref.c (dump_records): Fix formating.
+ (merge_call_side_effects): Break out from ...
+ (analyze_call): ... here; record recursive calls.
+ (analyze_stmt): Add new parameter RECURSIVE_CALLS.
+ (analyze_function): Do iterative dataflow on recursive calls.
+ (compute_parm_map): New function.
+ (ipa_merge_modref_summary_after_inlining): New function.
+ (collapse_loads): New function.
+ (modref_propagate_in_scc): Break out from ...
+ (pass_ipa_modref::execute): ... here; Do iterative dataflow.
+ * ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare.
+
+2020-09-26 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-expand.c (expand_omp_simd): Help vectorizer for the collapse == 1
+ and non-composite collapse > 1 case with non-constant innermost loop
+ step by precomputing number of iterations before loop and using an
+ alternate IV from 0 to number of iterations - 1 with step of 1.
+
+2020-09-26 Jan Hubicka <jh@suse.cz>
+
+ * ipa-fnsummary.c (dump_ipa_call_summary): Dump
+ points_to_local_or_readonly_memory flag.
+ (analyze_function_body): Compute points_to_local_or_readonly_memory
+ flag.
+ (remap_edge_change_prob): Rename to ...
+ (remap_edge_params): ... this one; update
+ points_to_local_or_readonly_memory.
+ (remap_edge_summaries): Update.
+ (read_ipa_call_summary): Stream the new flag.
+ (write_ipa_call_summary): Likewise.
+ * ipa-predicate.h (struct inline_param_summary): Add
+ points_to_local_or_readonly_memory.
+ (inline_param_summary::equal_to): Update.
+ (inline_param_summary::useless_p): Update.
+
+2020-09-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_ref_node::insert_access): Track if something
+ changed.
+ (modref_base_node::insert_ref): Likewise (and add a new optional
+ argument)
+ (modref_tree::insert): Likewise.
+ (modref_tree::merge): Rewrite
+
+2020-09-25 Jan Hubicka <hubicka@ucw.cz>
+
+ * doc/invoke.texi: Add -fno-ipa-modref to flags disabled by
+ -flive-patching.
+ * opts.c (control_options_for_live_patching): Disable ipa-modref.
+
+2020-09-25 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (analyze_stmt): Fix return value for gimple_clobber.
+
+2020-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-option-extensions.def (rng): Add
+ cpuinfo string.
+
+2020-09-25 Alex Coplan <alex.coplan@arm.com>
+
+ * config/arm/arm-cpus.in (neoverse-v1): Add FP16.
+
+2020-09-25 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/64636
+ * value-prof.c (stream_out_histogram_value): Allow negative
+ values for HIST_TYPE_IOR.
+
+2020-09-25 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.c (nvptx_assemble_integer, nvptx_print_operand):
+ Use gcc_fallthrough ().
+
+2020-09-25 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/96814
+ * expr.c (store_constructor): Handle VECTOR_BOOLEAN_TYPE_P
+ CTORs correctly.
+
+2020-09-25 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97207
+ * vec.h (auto_vec<T>::operator=(auto_vec<T>&&)): Implement.
+
+2020-09-25 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/arm/arm-protos.h (arm_mve_mode_and_operands_type_check):
+ Delete.
+ * config/arm/arm.c (arm_coproc_mem_operand_wb): Use a scale factor
+ of 2 rather than 4 for 16-bit modes.
+ (arm_mve_mode_and_operands_type_check): Delete.
+ * config/arm/constraints.md (Uj): Allow writeback for Neon,
+ but continue to disallow it for MVE.
+ * config/arm/arm.md (*arm32_mov<HFBF:mode>): Add !TARGET_HAVE_MVE.
+ * config/arm/vfp.md (*mov_load_vfp_hf16, *mov_store_vfp_hf16): Fold
+ back into...
+ (*mov<mode>_vfp_<mode>16): ...here but use Uj for the FPR memory
+ constraints. Use for base MVE too.
+
+2020-09-25 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97199
+ * tree-if-conv.c (combine_blocks): Remove edges only
+ after looking at virtual PHI args.
+
+2020-09-25 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-low.c (scan_omp_1_stmt): Don't call scan_omp_simd for
+ collapse > 1 loops as simt doesn't support collapsed loops yet.
+ * omp-expand.c (expand_omp_for_init_counts, expand_omp_for_init_vars):
+ Small tweaks to function comment.
+ (expand_omp_simd): Rewritten collapse > 1 support to only attempt
+ to vectorize the innermost loop and emit set of outer loops around it.
+ For non-composite simd with collapse > 1 without broken loop don't
+ even try to compute number of iterations first. Add support for
+ non-rectangular simd loops.
+ (expand_omp_for): Don't sorry_at on non-rectangular simd loops.
+
+2020-09-25 Martin Liska <mliska@suse.cz>
+
+ * cgraph.c (cgraph_edge::debug): New.
+ * cgraph.h (cgraph_edge::debug): New.
+
+2020-09-25 Martin Liska <mliska@suse.cz>
+
+ * cgraph.c (cgraph_node::dump): Always print space at the end
+ of a message. Remove one extra space.
+
+2020-09-24 Alex Coplan <alex.coplan@arm.com>
+
+ * config/arm/arm-cpus.in (neoverse-n2): New.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Document support for Neoverse N2.
+
+2020-09-24 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add Neoverse N2.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Document AArch64 support for Neoverse N2.
+
+2020-09-24 Richard Biener <rguenther@suse.de>
+
+ * vec.h (auto_vec<T, 0>::auto_vec (auto_vec &&)): New move CTOR.
+ (auto_vec<T, 0>::operator=(auto_vec &&)): Delete.
+ * hash-table.h (hash_table::expand): Use std::move when expanding.
+ * cfgloop.h (get_loop_exit_edges): Return auto_vec<edge>.
+ * cfgloop.c (get_loop_exit_edges): Adjust.
+ * cfgloopmanip.c (fix_loop_placement): Likewise.
+ * ipa-fnsummary.c (analyze_function_body): Likewise.
+ * ira-build.c (create_loop_tree_nodes): Likewise.
+ (create_loop_tree_node_allocnos): Likewise.
+ (loop_with_complex_edge_p): Likewise.
+ * ira-color.c (ira_loop_edge_freq): Likewise.
+ * loop-unroll.c (analyze_insns_in_loop): Likewise.
+ * predict.c (predict_loops): Likewise.
+ * tree-predcom.c (last_always_executed_block): Likewise.
+ * tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise.
+ * tree-ssa-loop-im.c (store_motion_loop): Likewise.
+ * tree-ssa-loop-ivcanon.c (loop_edge_to_cancel): Likewise.
+ (canonicalize_loop_induction_variables): Likewise.
+ * tree-ssa-loop-manip.c (get_loops_exits): Likewise.
+ * tree-ssa-loop-niter.c (find_loop_niter): Likewise.
+ (finite_loop_p): Likewise.
+ (find_loop_niter_by_eval): Likewise.
+ (estimate_numbers_of_iterations): Likewise.
+ * tree-ssa-loop-prefetch.c (emit_mfence_after_loop): Likewise.
+ (may_use_storent_in_loop_p): Likewise.
+
+2020-09-24 Jan Hubicka <jh@suse.cz>
+
+ * doc/invoke.texi: Document -fipa-modref, ipa-modref-max-bases,
+ ipa-modref-max-refs, ipa-modref-max-accesses, ipa-modref-max-tests.
+ * ipa-modref-tree.c (test_insert_search_collapse): Update.
+ (test_merge): Update.
+ (gt_ggc_mx): New function.
+ * ipa-modref-tree.h (struct modref_access_node): New structure.
+ (struct modref_ref_node): Add every_access and accesses array.
+ (modref_ref_node::modref_ref_node): Update ctor.
+ (modref_ref_node::search): New member function.
+ (modref_ref_node::collapse): New member function.
+ (modref_ref_node::insert_access): New member function.
+ (modref_base_node::insert_ref): Do not collapse base if ref is 0.
+ (modref_base_node::collapse): Copllapse also refs.
+ (modref_tree): Add accesses.
+ (modref_tree::modref_tree): Initialize max_accesses.
+ (modref_tree::insert): Add access parameter.
+ (modref_tree::cleanup): New member function.
+ (modref_tree::merge): Add parm_map; merge accesses.
+ (modref_tree::copy_from): New member function.
+ (modref_tree::create_ggc): Add max_accesses.
+ * ipa-modref.c (dump_access): New function.
+ (dump_records): Dump accesses.
+ (dump_lto_records): Dump accesses.
+ (get_access): New function.
+ (record_access): Record access.
+ (record_access_lto): Record access.
+ (analyze_call): Compute parm_map.
+ (analyze_function): Update construction of modref records.
+ (modref_summaries::duplicate): Likewise; use copy_from.
+ (write_modref_records): Stream accesses.
+ (read_modref_records): Sream accesses.
+ (pass_ipa_modref::execute): Update call of merge.
+ * params.opt (-param=modref-max-accesses): New.
+ * tree-ssa-alias.c (alias_stats): Add modref_baseptr_tests.
+ (dump_alias_stats): Update.
+ (base_may_alias_with_dereference_p): New function.
+ (modref_may_conflict): Check accesses.
+ (ref_maybe_used_by_call_p_1): Update call to modref_may_conflict.
+ (call_may_clobber_ref_p_1): Update call to modref_may_conflict.
+
+2020-09-24 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/arm/arm.md (*stack_protect_combined_set_insn): For non-PIC,
+ load the address of the canary rather than the address of the
+ constant pool entry that points to it.
+ (*stack_protect_combined_test_insn): Likewise.
+
+2020-09-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97085
+ * match.pd (mask ? { false,..} : { true, ..} -> ~mask): New.
+
+2020-09-24 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_base::collapse): Release memory.
+ (modref_tree::create_ggc): New member function.
+ (modref_tree::colapse): Release memory.
+ (modref_tree::~modref_tree): New destructor.
+ * ipa-modref.c (modref_summaries::create_ggc): New function.
+ (analyze_function): Use create_ggc.
+ (modref_summaries::duplicate): Likewise.
+ (read_modref_records): Likewise.
+ (modref_read): Likewise.
+
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_rtx_costs): Pass mode to
+ reg_or_add_cint_operand and reg_or_sub_cint_operand.
+
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ PR target/93012
+ * config/rs6000/rs6000.c (num_insns_constant_gpr): Count rldimi
+ constants correctly.
+
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
+ Conditionally define __PCREL__.
+
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ PR target/97107
+ * config/rs6000/rs6000-internal.h (struct rs6000_stack): Improve
+ calls_p comment.
+ * config/rs6000/rs6000-logue.c (rs6000_stack_info): Likewise.
+ (rs6000_expand_split_stack_prologue): Emit the prologue for
+ functions that make a sibling call.
+
+2020-09-24 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/analyzer.texi (Analyzer Paths): Add note about
+ -fno-analyzer-feasibility.
+ * doc/invoke.texi (Static Analyzer Options): Add
+ -fno-analyzer-feasibility.
+
+2020-09-24 Paul A. Clarke <pc@us.ibm.com>
+
+ * doc/extend.texi: Add 'd' for doubleword variant of
+ vector insert instruction.
+
+2020-09-23 Martin Sebor <msebor@redhat.com>
+
+ * gimple-array-bounds.cc (build_zero_elt_array_type): New function.
+ (array_bounds_checker::check_mem_ref): Call it.
+
+2020-09-23 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97175
+ * builtins.c (maybe_warn_for_bound): Handle both DECLs and EXPRESSIONs
+ in pad->dst.ref, same is pad->src.ref.
+
+2020-09-23 Jan Hubicka <jh@suse.cz>
+
+ * ipa-fnsummary.c (refs_local_or_readonly_memory_p): New function.
+ (points_to_local_or_readonly_memory_p): New function.
+ * ipa-fnsummary.h (refs_local_or_readonly_memory_p): Declare.
+ (points_to_local_or_readonly_memory_p): Declare.
+ * ipa-modref.c (record_access_p): Use refs_local_or_readonly_memory_p.
+ * ipa-pure-const.c (check_op): Likewise.
+
+2020-09-23 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.md: Don't allow operand containing sum of
+ function ref and const.
+
+2020-09-23 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_salt_type): New enum.
+ (aarch64_stack_protect_canary_mem): Declare.
+ * config/aarch64/aarch64.md (UNSPEC_SALT_ADDR): New unspec.
+ (stack_protect_set): Forward to stack_protect_combined_set.
+ (stack_protect_combined_set): New pattern. Use
+ aarch64_stack_protect_canary_mem.
+ (reg_stack_protect_address_<mode>): Add a salt operand.
+ (stack_protect_test): Forward to stack_protect_combined_test.
+ (stack_protect_combined_test): New pattern. Use
+ aarch64_stack_protect_canary_mem.
+ * config/aarch64/aarch64.c (strip_salt): New function.
+ (strip_offset_and_salt): Likewise.
+ (tls_symbolic_operand_type): Use strip_offset_and_salt.
+ (aarch64_stack_protect_canary_mem): New function.
+ (aarch64_cannot_force_const_mem): Use strip_offset_and_salt.
+ (aarch64_classify_address): Likewise.
+ (aarch64_symbolic_address_p): Likewise.
+ (aarch64_print_operand): Likewise.
+ (aarch64_output_addr_const_extra): New function.
+ (aarch64_tls_symbol_p): Use strip_salt.
+ (aarch64_classify_symbol): Likewise.
+ (aarch64_legitimate_pic_operand_p): Use strip_offset_and_salt.
+ (aarch64_legitimate_constant_p): Likewise.
+ (aarch64_mov_operand_p): Use strip_salt.
+ (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Override.
+
+2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vreinterpretq_f64_p128,
+ vreinterpretq_p128_f64): Define.
+
+2020-09-23 Alex Coplan <alex.coplan@arm.com>
+
+ * config/arm/arm-cpus.in (neoverse-v1): New.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Document support for Neoverse V1.
+
+2020-09-23 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add Neoverse V1.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Document support for Neoverse V1.
+
+2020-09-23 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/96453
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Remove
+ LT_EXPR -> NE_EXPR verification and also apply it for
+ non-constant masks.
+
+2020-09-23 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (modref_summary::lto_useful_p): New member function.
+ (modref_summary::useful_p): New member function.
+ (analyze_function): Drop useless summaries.
+ (modref_write): Skip useless summaries.
+ (pass_ipa_modref::execute): Drop useless summaries.
+ * ipa-modref.h (struct GTY): Declare useful_p and lto_useful_p.
+ * tree-ssa-alias.c (dump_alias_stats): Fix.
+ (modref_may_conflict): Fix stats.
+
+2020-09-23 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/96466
+ * internal-fn.c (expand_vect_cond_mask_optab_fn): Use
+ appropriate mode for force_reg.
+ * tree.c (build_truth_vector_type_for): Pass VOIDmode to
+ make_vector_type.
+
+2020-09-23 Richard Sandiford <richard.sandiford@arm.com>
+
+ * tree-vectorizer.h (determine_peel_for_niter): Delete in favor of...
+ (vect_determine_partial_vectors_and_peeling): ...this new function.
+ * tree-vect-loop-manip.c (vect_update_epilogue_niters): New function.
+ Reject using vector epilogue loops for single iterations. Install
+ the constant number of epilogue loop iterations in the associated
+ loop_vinfo. Rely on vect_determine_partial_vectors_and_peeling
+ to do the main part of the test.
+ (vect_do_peeling): Use vect_update_epilogue_niters to handle
+ epilogue loops with a known number of iterations. Skip recomputing
+ the number of iterations later in that case. Otherwise, use
+ vect_determine_partial_vectors_and_peeling to decide whether the
+ epilogue loop needs to use partial vectors or peeling.
+ * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Set the
+ default can_use_partial_vectors_p to false if partial-vector-usage=0.
+ (determine_peel_for_niter): Remove in favor of...
+ (vect_determine_partial_vectors_and_peeling): ...this new function,
+ split out from...
+ (vect_analyze_loop_2): ...here. Reflect the vect_verify_full_masking
+ and vect_verify_loop_lens results in CAN_USE_PARTIAL_VECTORS_P
+ rather than USING_PARTIAL_VECTORS_P.
+
+2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF
+ for modes. Remove explicit hf instantiation.
+ * config/aarch64/arm_neon.h (vrndns_f32): Define.
+
+2020-09-23 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97173
+ * tree-vect-loop.c (vectorizable_live_operation): Extend
+ assert to also conver element conversions.
+
+2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64,
+ vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define.
+
+2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vldrq_p128): Define.
+
+2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vstrq_p128): Define.
+
+2020-09-23 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97151
+ * tree-ssa-structalias.c (find_func_aliases_for_call):
+ DECL_IS_REPLACEABLE_OPERATOR_DELETE_P has no effect on
+ arguments.
+
+2020-09-23 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97162
+ * alias.c (compare_base_decls): Use DECL_HARD_REGISTER
+ and guard with VAR_P.
+
+2020-09-23 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/97069
+ * profile.c (branch_prob): Line number must be at least 1.
+
+2020-09-23 Tom de Vries <tdevries@suse.de>
+
+ PR target/97158
+ * config/nvptx/nvptx.c (nvptx_output_mov_insn): Handle move from
+ DF subreg to DF reg.
+
+2020-09-23 David Malcolm <dmalcolm@redhat.com>
+
+ * Makefile.in: Add $(ZLIBINC) to CFLAGS-analyzer/engine.o.
+
+2020-09-22 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref.c (analyze_stmt): Ignore gimple clobber.
+
+2020-09-22 Jan Hubicka <jh@suse.cz>
+
+ * ipa-modref-tree.c: Add namespace selftest.
+ (modref_tree_c_tests): Rename to ...
+ (ipa_modref_tree_c_tests): ... this.
+ * ipa-modref.c (pass_modref): Remove destructor.
+ (ipa_modref_c_finalize): New function.
+ * ipa-modref.h (ipa_modref_c_finalize): Declare.
+ * selftest-run-tests.c (selftest::run_tests): Call
+ ipa_modref_c_finalize.
+ * selftest.h (ipa_modref_tree_c_tests): Declare.
+ * toplev.c: Include ipa-modref-tree.h and ipa-modref.h
+ (toplev::finalize): Call ipa_modref_c_finalize.
+
+2020-09-22 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/analyzer.texi (Other Debugging Techniques): Mention
+ -fdump-analyzer-json.
+ * doc/invoke.texi (Static Analyzer Options): Add
+ -fdump-analyzer-json.
+
+2020-09-22 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.md: Add defines for signed div and mod operators.
+
+2020-09-22 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96979
+ * doc/invoke.texi: Document new param max-switch-clustering-attempts.
+ * params.opt: Add new parameter.
+ * tree-switch-conversion.c (jump_table_cluster::find_jump_tables):
+ Limit number of attempts.
+ (bit_test_cluster::find_bit_tests): Likewise.
+
+2020-09-22 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390.md ("*cmp<mode>_ccs_0", "*cmp<mode>_ccz_0",
+ "*cmp<mode>_ccs_0_fastmath"): Basically change "*cmp<mode>_ccs_0" into
+ "*cmp<mode>_ccz_0" and for fast math add "*cmp<mode>_ccs_0_fastmath".
+
+2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vcls_u8, vcls_u16, vcls_u32,
+ vclsq_u8, vclsq_u16, vclsq_u32): Define.
+
+2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vceqq_p64, vceqz_p64, vceqzq_p64): Define.
+
+2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vadd_p8, vadd_p16, vadd_p64, vaddq_p8,
+ vaddq_p16, vaddq_p64, vaddq_p128): Define.
+
+2020-09-22 Jakub Jelinek <jakub@redhat.com>
+
+ * params.opt (--param=modref-max-tests=): Fix typo in help text:
+ perofmed -> performed.
+ * common.opt: Fix typo: incrmeental -> incremental.
+ * ipa-modref.c: Fix typos: recroding -> recording, becaue -> because,
+ analsis -> analysis.
+ (class modref_summaries): Fix typo: betweehn -> between.
+ (analyze_call): Fix typo: calle -> callee.
+ (read_modref_records): Fix typo: expcted -> expected.
+ (pass_ipa_modref::execute): Fix typo: calle -> callee.
+
+2020-09-22 Jakub Jelinek <jakub@redhat.com>
+
+ * common.opt (-fipa-modref): Add dot at the end of option help.
+ * params.opt (--param=modref-max-tests=): Likewise.
+
+2020-09-21 Marek Polacek <polacek@redhat.com>
+
+ * doc/invoke.texi: Document -Wctad-maybe-unsupported.
+
+2020-09-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97139
+ * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Only mark the
+ pattern root, track visited vectorized stmts.
+
+2020-09-21 Jakub Jelinek <jakub@redhat.com>
+
+ * configure.ac: Use mallinfo mallinfo2 as first operand of
+ gcc_AC_CHECK_DECLS rather than [mallinfo, mallinfo2].
+ * configure: Regenerated.
+ * config.in: Regenerated.
+
+2020-09-21 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_general_expand_builtin): Use expand machinery not to
+ alter the value of an rtx returned by force_reg.
+
+2020-09-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97135
+ * tree-ssa-loop-im.c (sm_seq_push_down): Do not ignore
+ self-dependences.
+
+2020-09-21 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96915
+ * tree-switch-conversion.c (switch_conversion::expand): Accept
+ also integer constants.
+
+2020-09-21 Martin Liska <mliska@suse.cz>
+
+ * print-tree.c (print_node): Remove extra space.
+
+2020-09-21 Andrea Corallo <andrea.corallo@arm.com>
+
+ PR target/96968
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_expand_fpsr_fpcr_setter): Fix comment nit.
+ (aarch64_expand_fpsr_fpcr_getter): New function, expand these
+ getters using expand_insn machinery.
+ (aarch64_general_expand_builtin): Make use of.
+
+2020-09-21 Martin Liska <mliska@suse.cz>
+
+ * ggc-common.c (ggc_rlimit_bound): Use ONE_? macro.
+ (ggc_min_expand_heuristic): Likewise.
+ (ggc_min_heapsize_heuristic): Likewise.
+ * ggc-page.c (ggc_collect): Likewise.
+ * system.h (ONE_G): Likewise.
+
+2020-09-21 Martin Liska <mliska@suse.cz>
+
+ * ggc-common.c (ggc_prune_overhead_list): Use SIZE_AMOUNT.
+ * ggc-page.c (release_pages): Likewise.
+ (ggc_collect): Likewise.
+ (ggc_trim): Likewise.
+ (ggc_grow): Likewise.
+ * timevar.c (timer::print): Likewise.
+
+2020-09-21 Martin Liska <mliska@suse.cz>
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+ * configure.ac: Detect for mallinfo2.
+ * ggc-common.c (defined): Use it.
+ * system.h: Handle also HAVE_MALLINFO2.
+
+2020-09-20 John David Anglin < danglin@gcc.gnu.org>
+
+ * config/pa/pa-hpux11.h (LINK_GCC_C_SEQUENCE_SPEC): Delete.
+ * config/pa/pa64-hpux.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise.
+ (ENDFILE_SPEC): Link with libgcc_stub.a and mill.a.
+ * config/pa/pa32-linux.h (ENDFILE_SPEC): Link with libgcc.a.
+
+2020-09-20 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (dump_lto_records): Fix ICE.
+
+2020-09-20 David Cepelik <d@dcepelik.cz>
+ Jan Hubicka <hubicka@ucw.cz>
+
+ * Makefile.in: Add ipa-modref.c and ipa-modref-tree.c.
+ * alias.c: (reference_alias_ptr_type_1): Export.
+ * alias.h (reference_alias_ptr_type_1): Declare.
+ * common.opt (fipa-modref): New.
+ * gengtype.c (open_base_files): Add ipa-modref-tree.h and ipa-modref.h
+ * ipa-modref-tree.c: New file.
+ * ipa-modref-tree.h: New file.
+ * ipa-modref.c: New file.
+ * ipa-modref.h: New file.
+ * lto-section-in.c (lto_section_name): Add ipa_modref.
+ * lto-streamer.h (enum lto_section_type): Add LTO_section_ipa_modref.
+ * opts.c (default_options_table): Enable ipa-modref at -O1+.
+ * params.opt (-param=modref-max-bases, -param=modref-max-refs,
+ -param=modref-max-tests): New params.
+ * passes.def: Schedule pass_modref and pass_ipa_modref.
+ * timevar.def (TV_IPA_MODREF): New timevar.
+ (TV_TREE_MODREF): New timevar.
+ * tree-pass.h (make_pass_modref): Declare.
+ (make_pass_ipa_modref): Declare.
+ * tree-ssa-alias.c (dump_alias_stats): Include ipa-modref-tree.h
+ and ipa-modref.h
+ (alias_stats): Add modref_use_may_alias, modref_use_no_alias,
+ modref_clobber_may_alias, modref_clobber_no_alias, modref_tests.
+ (dump_alias_stats): Dump new stats.
+ (nonoverlapping_array_refs_p): Fix formating.
+ (modref_may_conflict): New function.
+ (ref_maybe_used_by_call_p_1): Use it.
+ (call_may_clobber_ref_p_1): Use it.
+ (call_may_clobber_ref_p): Update.
+ (stmt_may_clobber_ref_p_1): Update.
+ * tree-ssa-alias.h (call_may_clobber_ref_p_1): Update.
+
+2020-09-19 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/82608
+ PR middle-end/94195
+ PR c/50584
+ PR middle-end/84051
+ * gimple-array-bounds.cc (get_base_decl): New function.
+ (get_ref_size): New function.
+ (trailing_array): New function.
+ (array_bounds_checker::check_array_ref): Call them. Handle arrays
+ declared in function parameters.
+ (array_bounds_checker::check_mem_ref): Same. Handle references to
+ dynamically allocated arrays.
+
+2020-09-19 Martin Sebor <msebor@redhat.com>
+
+ PR c/50584
+ * builtins.c (warn_for_access): Add argument. Distinguish between
+ reads and writes.
+ (check_access): Add argument. Distinguish between reads and writes.
+ (gimple_call_alloc_size): Set range even on failure.
+ (gimple_parm_array_size): New function.
+ (compute_objsize): Call it.
+ (check_memop_access): Pass check_access an additional argument.
+ (expand_builtin_memchr, expand_builtin_strcat): Same.
+ (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
+ (expand_builtin_stpncpy, check_strncat_sizes): Same.
+ (expand_builtin_strncat, expand_builtin_strncpy): Same.
+ (expand_builtin_memcmp): Same.
+ * builtins.h (compute_objsize): Declare a new overload.
+ (gimple_parm_array_size): Declare.
+ (check_access): Add argument.
+ * calls.c (append_attrname): Simplify.
+ (maybe_warn_rdwr_sizes): Handle internal attribute access.
+ * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Avoid adding
+ quotes.
+
+2020-09-19 Martin Sebor <msebor@redhat.com>
+
+ * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Handle attribute
+ access internal representation of arrays.
+
+2020-09-19 Martin Sebor <msebor@redhat.com>
+
+ PR c/50584
+ * attribs.c (decl_attributes): Also pass decl along with type
+ attributes to handlers.
+ (init_attr_rdwr_indices): Change second argument to attribute chain.
+ Handle internal attribute representation in addition to external.
+ (get_parm_access): New function.
+ (attr_access::to_internal_string): Define new member function.
+ (attr_access::to_external_string): Define new member function.
+ (attr_access::vla_bounds): Define new member function.
+ * attribs.h (struct attr_access): Declare new members.
+ (attr_access::from_mode_char): Define new member function.
+ (get_parm_access): Declare new function.
+ * calls.c (initialize_argument_information): Pass function type
+ attributes to init_attr_rdwr_indices.
+ * doc/invoke.texi (-Warray-parameter, -Wvla-parameter): Document.
+ * tree-pretty-print.c (dump_generic_node): Correct handling of
+ qualifiers.
+ * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Same.
+ * tree.h (access_mode): Add new enumerator.
+
+2020-09-19 Sandra Loosemore <sandra@codesourcery.com>
+
+ * doc/generic.texi (Basic Statements): Document SWITCH_EXPR here,
+ not SWITCH_STMT.
+ (Statements for C and C++): Rename node to reflect what
+ the introduction already says about sharing between C and C++
+ front ends. Copy-edit and correct documentation for structured
+ loops and switch.
+
+2020-09-19 liuhongt <hongtao.liu@intel.com>
+
+ PR target/96861
+ * config/i386/x86-tune-costs.h (skylake_cost): increase rtx
+ cost of sse_to_integer from 2 to 6.
+
+2020-09-18 Sudi Das <sudi.das@arm.com>
+ Omar Tahir <omar.tahir@arm.com>
+
+ * config/arm/thumb2.md (*thumb2_csneg): New.
+ (*thumb2_negscc): Don't match if TARGET_COND_ARITH.
+ * config/arm/arm.md (*if_neg_move): Don't match if TARGET_COND_ARITH.
+
+2020-09-18 Sudi Das <sudi.das@arm.com>
+ Omar Tahir <omar.tahir@arm.com>
+
+ * config/arm/thumb2.md (*thumb2_csinc): New.
+ (*thumb2_cond_arith): Generate CINC where possible.
+
+2020-09-18 Sudi Das <sudi.das@arm.com>
+ Omar Tahir <omar.tahir@arm.com>
+
+ * config/arm/arm.h (TARGET_COND_ARITH): New macro.
+ * config/arm/arm.c (arm_have_conditional_execution): Return false if
+ TARGET_COND_ARITH before reload.
+ * config/arm/predicates.md (arm_comparison_operation): Returns true if
+ comparing CC_REGNUM with constant zero.
+ * config/arm/thumb2.md (*thumb2_csinv): New.
+ (*thumb2_movcond): Don't match if TARGET_COND_ARITH.
+
+2020-09-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR middle-end/91957
+ * ira.c (ira_setup_eliminable_regset): Skip the special elimination
+ handling of the hard frame pointer if the hard frame pointer is fixed.
+
+2020-09-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97081
+ * tree-vect-patterns.c (vect_recog_rotate_pattern): Use the
+ precision of the shifted operand to determine the mask.
+
+2020-09-18 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_print_operand): Update comment.
+ Cast to long when printing values formatted as long.
+ Support 'd', 'e', 'f' and 'g' modifiers.
+ Extract operand value with a single operation for all modifiers.
+ * doc/extend.texi (msp430Operandmodifiers): New.
+
+2020-09-18 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (increment_stack): Mark insns which increment
+ the stack as frame_related.
+ (msp430_expand_prologue): Add comments.
+ (msp430_expand_epilogue): Mark insns which decrement
+ the stack as frame_related.
+ Add reg_note to stack pop insns describing position of register
+ variables on the stack.
+
+2020-09-18 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-tree.c (execute_omp_gcn): Delete.
+ (make_pass_omp_gcn): Delete.
+ * config/gcn/t-gcn-hsa (PASSES_EXTRA): Delete.
+ * config/gcn/gcn-passes.def: Removed.
+
+2020-09-18 Alex Coplan <alex.coplan@arm.com>
+
+ * cfgloop.h (nb_iter_bound): Reword comment describing is_exit.
+
+2020-09-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97095
+ * tree-vect-loop.c (vectorizable_live_operation): Get
+ the SLP vector type from the correct object.
+
+2020-09-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97089
+ * tree-ssa-sccvn.c (visit_nary_op): Do not replace unsigned
+ divisions.
+
+2020-09-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97098
+ * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Do not
+ recurse to children when all stmts were already visited.
+
+2020-09-17 Sergei Trofimovich <siarheit@google.com>
+
+ * profile.c (sort_hist_values): Clarify hist format:
+ start with a value, not counter.
+
+2020-09-17 Yeting Kuo <fakepaper56@gmail.com>
+
+ * config/riscv/riscv.h (CSW_MAX_OFFSET): Fix typo.
+
+2020-09-17 Patrick Palka <ppalka@redhat.com>
+
+ PR c/80076
+ * gensupport.c (alter_attrs_for_subst_insn) <case SET_ATTR>:
+ Reduce indentation of misleadingly indented code fragment.
+ * lra-constraints.c (multi_block_pseudo_p): Likewise.
+ * sel-sched-ir.c (merge_fences): Likewise.
+
+2020-09-17 Martin Sebor <msebor@redhat.com>
+
+ * doc/invoke.texi (-Wuninitialized): Document -Wuninitialized for
+ allocated objects.
+ (-Wmaybe-uninitialized): Same.
+
+2020-09-17 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (visit_nary_op): Value-number multiplications
+ and divisions to negates of available negated forms.
+
+2020-09-17 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/97078
+ * function.c (use_register_for_decl): Test cfun->tail_call_marked
+ for a parameter here instead of...
+ (assign_parm_setup_reg): ...here.
+
+2020-09-17 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op.cc (multi_precision_range_tests): Normalize symbolics when copying to a
+ multi-range.
+ * value-range.cc (irange::copy_legacy_range): Add test.
+
+2020-09-17 Jan Hubicka <jh@suse.cz>
+
+ * cgraph.c (cgraph_node::get_availability): Fix availability of
+ functions in other partitions
+ * varpool.c (varpool_node::get_availability): Likewise.
+
+2020-09-17 Jojo R <jiejie_rong@c-sky.com>
+
+ * config/csky/csky.opt (msim): New.
+ * doc/invoke.texi (C-SKY Options): Document -msim.
+ * config/csky/csky-elf.h (LIB_SPEC): Add simulator runtime.
+
+2020-09-17 Sergei Trofimovich <siarheit@google.com>
+
+ * doc/cppenv.texi: Use @code{} instead of @samp{@command{}}
+ around 'date %s'.
+
+2020-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA_AVX_UNSET): Remove OPTION_MASK_ISA_XSAVE_UNSET.
+ (OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_AVX_UNSET.
+
+2020-09-16 Alexandre Oliva <oliva@adacore.com>
+
+ * config/rs6000/rs6000.c (have_compare_and_set_mask): Use
+ E_*mode in cases.
+
+2020-09-16 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/predicates.md (current_file_function_operand):
+ Remove argument from rs6000_pcrel_p call.
+ * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
+ Likewise.
+ (rs6000_global_entry_point_prologue_needed_p): Likewise.
+ (rs6000_output_function_prologue): Likewise.
+ * config/rs6000/rs6000-protos.h (rs6000_function_pcrel_p): New
+ prototype.
+ (rs6000_pcrel_p): Remove argument.
+ * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Remove
+ argument from rs6000_pcrel_p call.
+ (rs6000_call_template_1): Likewise.
+ (rs6000_indirect_call_template_1): Likewise.
+ (rs6000_longcall_ref): Likewise.
+ (rs6000_call_aix): Likewise.
+ (rs6000_sibcall_aix): Likewise.
+ (rs6000_function_pcrel_p): Rename from rs6000_pcrel_p.
+ (rs6000_pcrel_p): Rewrite.
+ * config/rs6000/rs6000.md (*pltseq_plt_pcrel<mode>): Remove
+ argument from rs6000_pcrel_p call.
+ (*call_local<mode>): Likewise.
+ (*call_value_local<mode>): Likewise.
+ (*call_nonlocal_aix<mode>): Likewise.
+ (*call_value_nonlocal_aix<mode>): Likewise.
+ (*call_indirect_pcrel<mode>): Likewise.
+ (*call_value_indirect_pcrel<mode>): Likewise.
+
+2020-09-16 Marek Polacek <polacek@redhat.com>
+
+ PR preprocessor/96935
+ * input.c (get_substring_ranges_for_loc): Return if start.column
+ is less than 1.
+
+2020-09-16 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/96295
+ * tree-ssa-uninit.c (maybe_warn_operand): Work harder to avoid
+ warning for objects of empty structs
+
+2020-09-16 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-eh.c (lower_try_finally_dup_block): Backward propagate slocs
+ to stack restore builtin calls.
+ (cleanup_all_empty_eh): Do again a post-order traversal of the EH
+ region tree.
+
+2020-09-16 Andrea Corallo <andrea.corallo@arm.com>
+
+ * tree-vect-loop.c (vect_need_peeling_or_partial_vectors_p): New
+ function.
+ (vect_analyze_loop_2): Make use of it not to select partial
+ vectors if no peel is required.
+ (determine_peel_for_niter): Move out some logic into
+ 'vect_need_peeling_or_partial_vectors_p'.
+
+2020-09-16 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97032
+ * cfgexpand.c (asm_clobber_reg_kind): Set sp_is_clobbered_by_asm
+ to true if the stack pointer is clobbered by asm statement.
+ * emit-rtl.h (rtl_data): Add sp_is_clobbered_by_asm.
+ * config/i386/i386.c (ix86_get_drap_rtx): Set need_drap to true
+ if the stack pointer is clobbered by asm statement.
+
+2020-09-16 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * config/s390/vector.md(*vec_tf_to_v1tf): Use "f" instead of "v"
+ for the source operand.
+
+2020-09-16 Jojo R <jiejie_rong@c-sky.com>
+
+ * config.gcc (C-SKY): Set use_gcc_stdint=wrap for elf target.
+
+2020-09-16 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (_stmt_vec_info::num_slp_uses): Remove.
+ (STMT_VINFO_NUM_SLP_USES): Likewise.
+ (vect_free_slp_instance): Adjust.
+ (vect_update_shared_vectype): Declare.
+ * tree-vectorizer.c (vec_info::~vec_info): Adjust.
+ * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
+ (vectorizable_live_operation): Use vector type from
+ SLP_TREE_REPRESENTATIVE.
+ (vect_transform_loop): Adjust.
+ * tree-vect-data-refs.c (vect_slp_analyze_node_alignment):
+ Set the shared vector type.
+ * tree-vect-slp.c (vect_free_slp_tree): Remove final_p
+ parameter, remove STMT_VINFO_NUM_SLP_USES updating.
+ (vect_free_slp_instance): Adjust.
+ (vect_create_new_slp_node): Remove STMT_VINFO_NUM_SLP_USES
+ updating.
+ (vect_update_shared_vectype): Always compare with the
+ present vector type, update if NULL.
+ (vect_build_slp_tree_1): Do not update the shared vector
+ type here.
+ (vect_build_slp_tree_2): Adjust.
+ (slp_copy_subtree): Likewise.
+ (vect_attempt_slp_rearrange_stmts): Likewise.
+ (vect_analyze_slp_instance): Likewise.
+ (vect_analyze_slp): Likewise.
+ (vect_slp_analyze_node_operations_1): Update the shared
+ vector type.
+ (vect_slp_analyze_operations): Adjust.
+ (vect_slp_analyze_bb_1): Likewise.
+
+2020-09-16 Jojo R <jiejie_rong@c-sky.com>
+
+ * config/csky/t-csky-linux (CSKY_MULTILIB_OSDIRNAMES): Use mfloat-abi.
+ (MULTILIB_OPTIONS): Likewise.
+ * config/csky/t-csky-elf (MULTILIB_OPTIONS): Likewise.
+ (MULTILIB_EXCEPTIONS): Likewise.
+
+2020-09-16 Jakub Jelinek <jakub@redhat.com>
+
+ * config/arm/arm.c (arm_option_restore): Comment out opts argument
+ name to avoid unused parameter warnings.
+
+2020-09-16 Jakub Jelinek <jakub@redhat.com>
+
+ * optc-save-gen.awk: In cl_optimization_stream_out use
+ bp_pack_var_len_{int,unsigned} instead of bp_pack_value. In
+ cl_optimization_stream_in use bp_unpack_var_len_{int,unsigned}
+ instead of bp_unpack_value. Formatting fix.
+
+2020-09-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/97053
+ * gimple-ssa-store-merging.c (check_no_overlap): Add FIRST_ORDER,
+ START, FIRST_EARLIER and LAST_EARLIER arguments. Return false if
+ any stores between FIRST_EARLIER inclusive and LAST_EARLIER exclusive
+ has order in between FIRST_ORDER and LAST_ORDER and overlaps the to
+ be merged store.
+ (imm_store_chain_info::try_coalesce_bswap): Add FIRST_EARLIER argument.
+ Adjust check_no_overlap caller.
+ (imm_store_chain_info::coalesce_immediate_stores): Add first_earlier
+ and last_earlier variables, adjust them during iterations. Adjust
+ check_no_overlap callers, call check_no_overlap even when extending
+ overlapping stores by extra INTEGER_CST stores.
+
+2020-09-16 Jojo R <jiejie_rong@c-sky.com>
+
+ * config/csky/csky-linux-elf.h (GLIBC_DYNAMIC_LINKER): Use mfloat-abi.
+
+2020-09-16 Kewen Lin <linkw@linux.ibm.com>
+
+ PR target/97019
+ * config/rs6000/rs6000-p8swap.c (find_alignment_op): Adjust to
+ support multiple defintions which are all AND operations with
+ the mask -16B.
+ (recombine_lvx_pattern): Adjust to handle multiple AND operations
+ from find_alignment_op.
+ (recombine_stvx_pattern): Likewise.
+
+2020-09-16 Jojo R <jiejie_rong@c-sky.com>
+
+ * config/csky/csky.md (CSKY_NPARM_FREGS): New.
+ (call_value_internal_vs/d): New.
+ (untyped_call): New.
+ * config/csky/csky.h (TARGET_SINGLE_FPU): New.
+ (TARGET_DOUBLE_FPU): New.
+ (FUNCTION_VARG_REGNO_P): New.
+ (CSKY_VREG_MODE_P): New.
+ (FUNCTION_VARG_MODE_P): New.
+ (CUMULATIVE_ARGS): Add extra regs info.
+ (INIT_CUMULATIVE_ARGS): Use csky_init_cumulative_args.
+ (FUNCTION_ARG_REGNO_P): Use FUNCTION_VARG_REGNO_P.
+ * config/csky/csky-protos.h (csky_init_cumulative_args): Extern.
+ * config/csky/csky.c (csky_cpu_cpp_builtins): Support TARGET_HARD_FLOAT_ABI.
+ (csky_function_arg): Likewise.
+ (csky_num_arg_regs): Likewise.
+ (csky_function_arg_advance): Likewise.
+ (csky_function_value): Likewise.
+ (csky_libcall_value): Likewise.
+ (csky_function_value_regno_p): Likewise.
+ (csky_arg_partial_bytes): Likewise.
+ (csky_setup_incoming_varargs): Likewise.
+ (csky_init_cumulative_args): New.
+
+2020-09-16 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (altivec_init_builtins): Fix name
+ of __builtin_altivec_xst_len_r.
+
+2020-09-15 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * rtlanal.c (set_noop_p): Treat subregs of registers in
+ different modes conservatively.
+
+2020-09-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Make swap
+ argument by-value and do not change it.
+ (vect_build_slp_tree_2): Adjust, set swap to NULL after last
+ use.
+
+2020-09-15 Feng Xue <fxue@os.amperecomputing.com>
+
+ PR tree-optimization/94234
+ * match.pd (T)(A) +- (T)(B) -> (T)(A +- B): New simplification.
+
+2020-09-15 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR rtl-optimization/96475
+ * bb-reorder.c (duplicate_computed_gotos): If we did anything, run
+ cleanup_cfg.
+
+2020-09-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_2): Also consider
+ building an operand from scalars when building it did not
+ fail fatally but avoid messing with the upcall splitting
+ of groups.
+
+2020-09-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do not
+ check +D32 for CMSE if -mfloat-abi=soft
+
+2020-09-15 liuhongt <hongtao.liu@intel.com>
+
+ PR target/96744
+ * config/i386/x86-tune-costs.h (struct processor_costs):
+ Increase mask <-> integer cost for non AVX512 target to avoid
+ spill gpr to mask. Also retune mask <-> integer and
+ mask_load/store for skylake_cost.
+
+2020-09-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/97028
+ * config/i386/sse.md (mul<mode>3<mask_name>_bcs,
+ <avx512>_div<mode>3<mask_name>_bcst): Use <avx512bcst> instead of
+ <<avx512bcst>>.
+
+2020-09-15 Tobias Burnus <tobias@codesourcery.com>
+
+ PR fortran/96668
+ * gimplify.c (gimplify_omp_for): Add 'bool openacc' argument;
+ update omp_finish_clause calls.
+ (gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses,
+ gimplify_expr, gimplify_omp_loop): Update omp_finish_clause
+ and/or gimplify_for calls.
+ * langhooks-def.h (lhd_omp_finish_clause): Add bool openacc arg.
+ * langhooks.c (lhd_omp_finish_clause): Likewise.
+ * langhooks.h (lhd_omp_finish_clause): Likewise.
+ * omp-low.c (scan_sharing_clauses): Keep GOMP_MAP_TO_PSET cause for
+ 'declare target' vars.
+
+2020-09-15 Feng Xue <fxue@os.amperecomputing.com>
+
+ PR tree-optimization/94234
+ * genmatch.c (dt_simplify::gen_1): Emit check on final simplification
+ result when "!" is specified on toplevel output expr.
+ * match.pd ((A * C) +- (B * C) -> (A +- B) * C): Allow folding on expr
+ with multi-use operands if final result is a simple gimple value.
+
+2020-09-14 Sergei Trofimovich <siarheit@google.com>
+
+ * doc/invoke.texi: fix '-fprofile-reproducibility' option
+ spelling in manual.
+
+2020-09-14 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/bpf/bpf.md ("nop"): Re-define as `ja 0'.
+
+2020-09-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * cgraphunit.c (cgraph_node::expand_thunk): Make sure to set
+ cfun->tail_call_marked when forcing a tail call.
+ * function.c (assign_parm_setup_reg): Always use a register to
+ load a parameter passed by reference if cfun->tail_call_marked.
+
+2020-09-14 Pat Haugen <pthaugen@linux.ibm.com>
+
+ * config/rs6000/power10.md (power10-mffgpr, power10-mftgpr): Rename to
+ power10-mtvsr/power10-mfvsr.
+ * config/rs6000/power6.md (X2F_power6, power6-mftgpr, power6-mffgpr):
+ Remove.
+ * config/rs6000/power8.md (power8-mffgpr, power8-mftgpr): Rename to
+ power8-mtvsr/power8-mfvsr.
+ * config/rs6000/power9.md (power9-mffgpr, power9-mftgpr): Rename to
+ power9-mtvsr/power9-mfvsr.
+ * config/rs6000/rs6000.c (rs6000_adjust_cost): Remove Power6
+ TYPE_MFFGPR cases.
+ * config/rs6000/rs6000.md (mffgpr, mftgpr, zero_extendsi<mode>2,
+ extendsi<mode>2, @signbit<mode>2_dm, lfiwax, lfiwzx, *movsi_internal1,
+ movsi_from_sf, *movdi_from_sf_zero_ext, *mov<mode>_internal,
+ movsd_hardfloat, movsf_from_si, *mov<mode>_hardfloat64, p8_mtvsrwz,
+ p8_mtvsrd_df, p8_mtvsrd_sf, p8_mfvsrd_3_<mode>, *movdi_internal64,
+ unpack<mode>_dm): Rename mffgpr/mftgpr to mtvsr/mfvsr.
+ * config/rs6000/vsx.md (vsx_mov<mode>_64bit, vsx_extract_<mode>,
+ vsx_extract_si, *vsx_extract_<mode>_p8): Likewise.
+
+2020-09-14 Jakub Jelinek <jakub@redhat.com>
+
+ * config/arm/arm.opt (x_arm_arch_string, x_arm_cpu_string,
+ x_arm_tune_string): Remove TargetSave entries.
+ (march=, mcpu=, mtune=): Add Save keyword.
+ * config/arm/arm.c (arm_option_save): Remove.
+ (TARGET_OPTION_SAVE): Don't redefine.
+ (arm_option_restore): Don't restore x_arm_*_string here.
+
+2020-09-14 Jakub Jelinek <jakub@redhat.com>
+
+ * opt-read.awk: Also initialize extra_target_var_types array.
+ * opth-gen.awk: Emit explicit_mask arrays to struct cl_optimization
+ and cl_target_option. Adjust cl_optimization_save,
+ cl_optimization_restore, cl_target_option_save and
+ cl_target_option_restore declarations.
+ * optc-save-gen.awk: Add opts_set argument to cl_optimization_save,
+ cl_optimization_restore, cl_target_option_save and
+ cl_target_option_restore functions and save or restore opts_set
+ next to the opts values into or from explicit_mask arrays.
+ In cl_target_option_eq and cl_optimization_option_eq compare
+ explicit_mask arrays, in cl_target_option_hash and cl_optimization_hash
+ hash them and in cl_target_option_stream_out,
+ cl_target_option_stream_in, cl_optimization_stream_out and
+ cl_optimization_stream_in stream them.
+ * tree.h (build_optimization_node, build_target_option_node): Add
+ opts_set argument.
+ * tree.c (build_optimization_node): Add opts_set argument, pass it
+ to cl_optimization_save.
+ (build_target_option_node): Add opts_set argument, pass it to
+ cl_target_option_save.
+ * function.c (invoke_set_current_function_hook): Adjust
+ cl_optimization_restore caller.
+ * ipa-inline-transform.c (inline_call): Adjust cl_optimization_restore
+ and build_optimization_node callers.
+ * target.def (TARGET_OPTION_SAVE, TARGET_OPTION_RESTORE): Add opts_set
+ argument.
+ * target-globals.c (save_target_globals_default_opts): Adjust
+ cl_optimization_restore callers.
+ * toplev.c (process_options): Adjust build_optimization_node and
+ cl_optimization_restore callers.
+ (target_reinit): Adjust cl_optimization_restore caller.
+ * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers):
+ Adjust build_optimization_node and cl_optimization_restore callers.
+ * doc/tm.texi: Updated.
+ * config/aarch64/aarch64.c (aarch64_override_options): Adjust
+ build_target_option_node caller.
+ (aarch64_option_save, aarch64_option_restore): Add opts_set argument.
+ (aarch64_set_current_function): Adjust cl_target_option_restore
+ caller.
+ (aarch64_option_valid_attribute_p): Adjust cl_target_option_save,
+ cl_target_option_restore, cl_optimization_restore,
+ build_optimization_node and build_target_option_node callers.
+ * config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Adjust
+ cl_target_option_restore and build_target_option_node callers.
+ * config/arm/arm.c (arm_option_save, arm_option_restore): Add
+ opts_set argument.
+ (arm_option_override): Adjust cl_target_option_save,
+ build_optimization_node and build_target_option_node callers.
+ (arm_set_current_function): Adjust cl_target_option_restore caller.
+ (arm_valid_target_attribute_tree): Adjust build_target_option_node
+ caller.
+ (add_attribute): Formatting fix.
+ (arm_valid_target_attribute_p): Adjust cl_optimization_restore,
+ cl_target_option_restore, arm_valid_target_attribute_tree and
+ build_optimization_node callers.
+ * config/arm/arm-c.c (arm_pragma_target_parse): Adjust
+ cl_target_option_restore callers.
+ * config/csky/csky.c (csky_option_override): Adjust
+ build_target_option_node and cl_target_option_save callers.
+ * config/gcn/gcn.c (gcn_fixup_accel_lto_options): Adjust
+ build_optimization_node and cl_optimization_restore callers.
+ * config/i386/i386-builtins.c (get_builtin_code_for_version):
+ Adjust cl_target_option_save and cl_target_option_restore
+ callers.
+ * config/i386/i386-c.c (ix86_pragma_target_parse): Adjust
+ build_target_option_node and cl_target_option_restore callers.
+ * config/i386/i386-options.c (ix86_function_specific_save,
+ ix86_function_specific_restore): Add opts_set arguments.
+ (ix86_valid_target_attribute_tree): Adjust build_target_option_node
+ caller.
+ (ix86_valid_target_attribute_p): Adjust build_optimization_node,
+ cl_optimization_restore, cl_target_option_restore,
+ ix86_valid_target_attribute_tree and build_optimization_node callers.
+ (ix86_option_override_internal): Adjust build_target_option_node
+ caller.
+ (ix86_reset_previous_fndecl, ix86_set_current_function): Adjust
+ cl_target_option_restore callers.
+ * config/i386/i386-options.h (ix86_function_specific_save,
+ ix86_function_specific_restore): Add opts_set argument.
+ * config/nios2/nios2.c (nios2_option_override): Adjust
+ build_target_option_node caller.
+ (nios2_option_save, nios2_option_restore): Add opts_set argument.
+ (nios2_valid_target_attribute_tree): Adjust build_target_option_node
+ caller.
+ (nios2_valid_target_attribute_p): Adjust build_optimization_node,
+ cl_optimization_restore, cl_target_option_save and
+ cl_target_option_restore callers.
+ (nios2_set_current_function, nios2_pragma_target_parse): Adjust
+ cl_target_option_restore callers.
+ * config/pru/pru.c (pru_option_override): Adjust
+ build_target_option_node caller.
+ (pru_set_current_function): Adjust cl_target_option_restore
+ callers.
+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust
+ cl_target_option_save caller.
+ (rs6000_option_override_internal): Adjust build_target_option_node
+ caller.
+ (rs6000_valid_attribute_p): Adjust build_optimization_node,
+ cl_optimization_restore, cl_target_option_save,
+ cl_target_option_restore and build_target_option_node callers.
+ (rs6000_pragma_target_parse): Adjust cl_target_option_restore and
+ build_target_option_node callers.
+ (rs6000_activate_target_options): Adjust cl_target_option_restore
+ callers.
+ (rs6000_function_specific_save, rs6000_function_specific_restore):
+ Add opts_set argument.
+ * config/s390/s390.c (s390_function_specific_restore): Likewise.
+ (s390_option_override_internal): Adjust s390_function_specific_restore
+ caller.
+ (s390_option_override, s390_valid_target_attribute_tree): Adjust
+ build_target_option_node caller.
+ (s390_valid_target_attribute_p): Adjust build_optimization_node,
+ cl_optimization_restore and cl_target_option_restore callers.
+ (s390_activate_target_options): Adjust cl_target_option_restore
+ caller.
+ * config/s390/s390-c.c (s390_cpu_cpp_builtins): Adjust
+ cl_target_option_save caller.
+ (s390_pragma_target_parse): Adjust build_target_option_node and
+ cl_target_option_restore callers.
+
+2020-09-13 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]:
+ Provide accurate costs for DImode shifts of integer constants.
+
+2020-09-12 Roger Sayle <roger@nextmovesoftware.com>
+ John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md (shrpsi4_1, shrpsi4_2): New define_insns split
+ out from previous shrpsi4 providing two commutitive variants using
+ plus_xor_ior_operator as a predicate.
+ (shrpdi4_1, shrpdi4_2, shrpdi_3, shrpdi_4): Likewise DImode versions
+ where _1 and _2 take register shifts, and _3 and _4 for integers.
+ (rotlsi3_internal): Name this anonymous instruction.
+ (rotrdi3): New DImode insn copied from rotrsi3.
+ (rotldi3): New DImode expander copied from rotlsi3.
+ (rotldi4_internal): New DImode insn copied from rotsi3_internal.
+
+2020-09-11 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_maybe_emit_maxc_minc): Rename
+ from rs6000_emit_p9_fp_minmax. Change return type to bool. Add
+ comments to document NaN/signed zero behavior.
+ (rs6000_maybe_emit_fp_cmove): Rename from rs6000_emit_p9_fp_cmove.
+ (have_compare_and_set_mask): New helper function.
+ (rs6000_emit_cmove): Update calls to new names and the new helper
+ function.
+
+2020-09-11 Nathan Sidwell <nathan@acm.org>
+
+ * config/i386/sse.md (mov<mode>): Fix operand indices.
+
+2020-09-11 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/96903
+ * builtins.c (compute_objsize): Remove incorrect offset adjustment.
+ (compute_objsize): Adjust offset range here instead.
+
+2020-09-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97020
+ * tree-vect-slp.c (vect_slp_analyze_operations): Apply
+ SLP costs when doing loop vectorization.
+
+2020-09-11 Tom de Vries <tdevries@suse.de>
+
+ PR target/96964
+ * config/nvptx/nvptx.md (define_expand "atomic_test_and_set"): New
+ expansion.
+
+2020-09-11 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
+ * config/gcn/gcn.md: Assert that TImode registers do not early clobber.
+
+2020-09-11 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (_slp_instance::location): New method.
+ (vect_schedule_slp): Adjust prototype.
+ * tree-vectorizer.c (vec_info::remove_stmt): Adjust
+ the BB region begin if we removed the stmt it points to.
+ * tree-vect-loop.c (vect_transform_loop): Adjust.
+ * tree-vect-slp.c (_slp_instance::location): Implement.
+ (vect_analyze_slp_instance): For BB vectorization set
+ vect_location to that of the instance.
+ (vect_slp_analyze_operations): Likewise.
+ (vect_bb_vectorization_profitable_p): Remove wrapper.
+ (vect_slp_analyze_bb_1): Remove cost check here.
+ (vect_slp_region): Cost check and code generate subgraphs separately,
+ report optimized locations and missed optimizations due to
+ profitability for each of them.
+ (vect_schedule_slp): Get the vector of SLP graph entries to
+ vectorize as argument.
+
+2020-09-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97013
+ * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove duplicate dumping.
+
+2020-09-11 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_1): Check vector
+ types for all lanes are compatible.
+ (vect_analyze_slp_instance): Appropriately check for stores.
+ (vect_schedule_slp): Likewise.
+
+2020-09-11 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.c (nvptx_assemble_value): Fix undefined
+ behaviour.
+
+2020-09-11 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.c (nvptx_assemble_value): Handle negative
+ __int128.
+
+2020-09-11 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Change default.
+
+2020-09-10 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000-protos.h (rs6000_emit_cmove): Change return
+ type to bool.
+ (rs6000_emit_int_cmove): Change return type to bool.
+ * config/rs6000/rs6000.c (rs6000_emit_cmove): Change return type
+ to bool.
+ (rs6000_emit_int_cmove): Change return type to bool.
+
+2020-09-10 Tom de Vries <tdevries@suse.de>
+
+ PR target/97004
+ * config/nvptx/nvptx.c (nvptx_assemble_value): Handle shift by
+ number of bits in shift operand.
+
+2020-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * lto-streamer-out.c (collect_block_tree_leafs): Recurse on
+ root rather than BLOCK_SUBBLOCKS (root).
+
+2020-09-10 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add Cortex-R82.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Add entry for Cortex-R82.
+
+2020-09-10 Alex Coplan <alex.coplan@arm.com>
+
+ * common/config/aarch64/aarch64-common.c
+ (aarch64_get_extension_string_for_isa_flags): Don't force +crc for
+ Armv8-R.
+ * config/aarch64/aarch64-arches.def: Add entry for Armv8-R.
+ * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): Set
+ __ARM_ARCH_PROFILE correctly for Armv8-R.
+ * config/aarch64/aarch64.h (AARCH64_FL_V8_R): New.
+ (AARCH64_FL_FOR_ARCH8_R): New.
+ (AARCH64_ISA_V8_R): New.
+ * doc/invoke.texi: Add Armv8-R to architecture table.
+
+2020-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * config/arm/arm.c (arm_override_options_after_change_1): Add opts_set
+ argument, test opts_set->x_str_align_functions rather than
+ opts->x_str_align_functions.
+ (arm_override_options_after_change, arm_option_override_internal,
+ arm_set_current_function): Adjust callers.
+
+2020-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/96939
+ * config/arm/arm.c (arm_override_options_after_change): Don't call
+ arm_configure_build_target here.
+ (arm_set_current_function): Call arm_override_options_after_change_1
+ at the end.
+
+2020-09-10 Pat Haugen <pthaugen@linux.ibm.com>
+
+ * config/rs6000/rs6000.md
+ (lfiwzx, floatunssi<mode>2_lfiwzx, p8_mtvsrwz, p8_mtvsrd_sf): Fix insn
+ type.
+ * config/rs6000/vsx.md
+ (vsx_concat_<mode>, vsx_splat_<mode>_reg, vsx_splat_v4sf): Likewise.
+
+2020-09-10 Jonathan Yong <10walls@gmail.com>
+
+ * config.host: Adjust plugin name for Windows.
+
+2020-09-10 Tom de Vries <tdevries@suse.de>
+
+ PR tree-optimization/97000
+ * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): Don't clear
+ flag for IFN_UNIQUE.
+
+2020-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/93865
+ * lto-streamer.h (struct output_block): Add emit_pwd member.
+ * lto-streamer-out.c: Include toplev.h.
+ (clear_line_info): Set emit_pwd.
+ (lto_output_location_1): Encode the ob->current_file != xloc.file
+ bit directly into the location number. If changing file, emit
+ additionally a bit whether pwd is emitted and emit it before the
+ first relative pathname since clear_line_info.
+ (output_function, output_constructor): Don't call clear_line_info
+ here.
+ * lto-streamer-in.c (struct string_pair_map): New type.
+ (struct string_pair_map_hasher): New type.
+ (string_pair_map_hasher::hash): New method.
+ (string_pair_map_hasher::equal): New method.
+ (path_name_pair_hash_table, string_pair_map_allocator): New variables.
+ (relative_path_prefix, canon_relative_path_prefix,
+ canon_relative_file_name): New functions.
+ (canon_file_name): Add relative_prefix argument, if non-NULL
+ and string is a relative path, return canon_relative_file_name.
+ (lto_location_cache::input_location_and_block): Decode file change
+ bit from the location number. If changing file, unpack bit whether
+ pwd is streamed and stream in pwd. Adjust canon_file_name caller.
+ (lto_free_file_name_hash): Delete path_name_pair_hash_table
+ and string_pair_map_allocator.
+
+2020-09-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/96043
+ * tree-vectorizer.h (_slp_instance::cost_vec): New.
+ (_slp_instance::subgraph_entries): Likewise.
+ (BB_VINFO_TARGET_COST_DATA): Remove.
+ * tree-vect-slp.c (vect_free_slp_instance): Free
+ cost_vec and subgraph_entries.
+ (vect_analyze_slp_instance): Initialize them.
+ (vect_slp_analyze_operations): Defer passing costs to
+ the target, instead record them in the SLP graph entry.
+ (get_ultimate_leader): New helper for graph partitioning.
+ (vect_bb_partition_graph_r): Likewise.
+ (vect_bb_partition_graph): New function to partition the
+ SLP graph into independently costable parts.
+ (vect_bb_vectorization_profitable_p): Adjust to work on
+ a subgraph.
+ (vect_bb_vectorization_profitable_p): New wrapper,
+ discarding non-profitable vectorization of subgraphs.
+ (vect_slp_analyze_bb_1): Call vect_bb_partition_graph before
+ costing.
+
+2020-09-09 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/94355
+ * doc/invoke.texi: Document -Wanalyzer-mismatching-deallocation.
+
+2020-09-09 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR rtl-optimization/96475
+ * bb-reorder.c (maybe_duplicate_computed_goto): Remove single_pred_p
+ micro-optimization.
+
+2020-09-09 Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Fix Wformat
+ warning.
+
+2020-09-09 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
+ nothing when the permutation doesn't permute.
+
+2020-09-09 Tom de Vries <tdevries@suse.de>
+
+ PR target/96991
+ * config/nvptx/nvptx.c (write_fn_proto): Fix boolean type check.
+
+2020-09-09 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_comparison): Allow
+ STMT_VINFO_LIVE_P stmts.
+
+2020-09-09 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_condition): Allow
+ STMT_VINFO_LIVE_P stmts.
+
+2020-09-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/96978
+ * tree-vect-stmts.c (vectorizable_condition): Do not
+ look at STMT_VINFO_LIVE_P for BB vectorization.
+ (vectorizable_comparison): Likewise.
+
+2020-09-09 liuhongt <hongtao.liu@intel.com>
+
+ PR target/96955
+ * config/i386/i386.md (get_thread_pointer<mode>): New
+ expander.
+
+2020-09-08 Julian Brown <julian@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (scatter<mode>_insn_1offset_ds<exec_scatter>):
+ Add waitcnt.
+ * config/gcn/gcn.md (*mov<mode>_insn, *movti_insn): Add waitcnt to
+ ds_write alternatives.
+
+2020-09-08 Julian Brown <julian@codesourcery.com>
+
+ * config/gcn/mkoffload.c (process_asm): Initialise regcount. Update
+ scanning for SGPR/VGPR usage for HSACO v3.
+
+2020-09-08 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/96967
+ * tree-vrp.c (find_case_label_range): Cast label range to
+ type of switch operand.
+
+2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_file_end): Fix jumbled
+ HAVE_AS_MSPABI_ATTRIBUTE and HAVE_AS_GNU_ATTRIBUTE checks.
+ * configure: Regenerate.
+ * configure.ac: Use ".mspabi_attribute 4,2" to check for assembler
+ support for this object attribute directive.
+
+2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * common/config/msp430/msp430-common.c (msp430_handle_option): Remove
+ OPT_mcpu_ handling.
+ Set target_cpu value to new enum values when parsing certain -mmcu=
+ values.
+ * config/msp430/msp430-opts.h (enum msp430_cpu_types): New.
+ * config/msp430/msp430.c (msp430_option_override): Handle new
+ target_cpu enum values.
+ Set target_cpu using extracted value for given MCU when -mcpu=
+ option is not passed by the user.
+ * config/msp430/msp430.opt: Handle -mcpu= values using enums.
+
+2020-09-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/96796
+ * lra-constraints.c (in_class_p): Add a default-false
+ allow_all_reload_class_changes_p parameter. Do not treat
+ reload moves specially when the parameter is true.
+ (get_reload_reg): Try to narrow the class of an existing OP_OUT
+ reload if we're reloading a reload pseudo in a reload instruction.
+
+2020-09-07 Andrea Corallo <andrea.corallo@arm.com>
+
+ * tree-vect-loop.c (vect_estimate_min_profitable_iters): Revert
+ dead-code removal introduced by 09fa6acd8d9 + add a comment to
+ clarify.
+
+2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * doc/rtl.texi (subreg): Fix documentation to state there is a known
+ number of undefined bits in regs and subregs of MODE_PARTIAL_INT modes.
+
+2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.c (msp430_option_override): Don't set the
+ ISA to 430 when the MCU is unrecognized.
+
+2020-09-07 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_libc_has_function): Report sincos
+ available from 10.9.
+
+2020-09-07 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): Delete.
+ (*subs_mul_imm_<mode>): Delete.
+ (*adds_<optab><mode>_multp2): Delete.
+ (*subs_<optab><mode>_multp2): Delete.
+ (*add_mul_imm_<mode>): Delete.
+ (*add_<optab><ALLX:mode>_mult_<GPI:mode>): Delete.
+ (*add_<optab><SHORT:mode>_mult_si_uxtw): Delete.
+ (*add_<optab><mode>_multp2): Delete.
+ (*add_<optab>si_multp2_uxtw): Delete.
+ (*add_uxt<mode>_multp2): Delete.
+ (*add_uxtsi_multp2_uxtw): Delete.
+ (*sub_mul_imm_<mode>): Delete.
+ (*sub_mul_imm_si_uxtw): Delete.
+ (*sub_<optab><mode>_multp2): Delete.
+ (*sub_<optab>si_multp2_uxtw): Delete.
+ (*sub_uxt<mode>_multp2): Delete.
+ (*sub_uxtsi_multp2_uxtw): Delete.
+ (*neg_mul_imm_<mode>2): Delete.
+ (*neg_mul_imm_si2_uxtw): Delete.
+ * config/aarch64/predicates.md (aarch64_pwr_imm3): Delete.
+ (aarch64_pwr_2_si): Delete.
+ (aarch64_pwr_2_di): Delete.
+
+2020-09-07 Alex Coplan <alex.coplan@arm.com>
+
+ * config/aarch64/aarch64.md
+ (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand
+ agrees with width of extension specifier.
+ (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise.
+ (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
+ (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
+ (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise.
+ (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
+ (*add_uxt<mode>_shift2): Likewise.
+ (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise.
+ (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
+ (*sub_uxt<mode>_shift2): Likewise.
+ (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise.
+ (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
+
+2020-09-07 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_analyze_slp_instance): Dump
+ stmts we start SLP analysis from, failure and splitting.
+ (vect_schedule_slp): Dump SLP graph entry and root stmt
+ we are about to emit code for.
+
+2020-09-07 Martin Storsjö <martin@martin.st>
+
+ * dwarf2out.c (file_name_acquire): Make a strchr return value
+ pointer to const.
+
+2020-09-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/94235
+ * lto-streamer-out.c (output_cfg): Also stream goto_locus for edges.
+ Use bp_pack_var_len_unsigned instead of streamer_write_uhwi to stream
+ e->dest->index and e->flags.
+ (output_function): Call output_cfg before output_ssa_name, rather than
+ after streaming all bbs.
+ * lto-streamer-in.c (input_cfg): Stream in goto_locus for edges.
+ Use bp_unpack_var_len_unsigned instead of streamer_read_uhwi to stream
+ in dest_index and edge_flags.
+
+2020-09-07 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vectorizable_live_operation): Adjust.
+ * tree-vect-loop.c (vectorizable_live_operation): Vectorize
+ live lanes out of basic-block vectorization nodes.
+ * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): New function.
+ (vect_slp_analyze_operations): Analyze live lanes and their
+ vectorization possibility after the whole SLP graph is final.
+ (vect_bb_slp_scalar_cost): Adjust for vectorized live lanes.
+ * tree-vect-stmts.c (can_vectorize_live_stmts): Adjust.
+ (vect_transform_stmt): Call can_vectorize_live_stmts also for
+ basic-block vectorization.
+
+2020-09-04 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/96698
+ PR tree-optimization/96920
+ * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove.
+ (loop_vec_info::reduc_latch_slp_defs): Likewise.
+ * tree-vect-stmts.c (vect_transform_stmt): Remove vectorized
+ cycle PHI latch code.
+ * tree-vect-loop.c (maybe_set_vectorized_backedge_value): New
+ helper to set vectorized cycle PHI latch values.
+ (vect_transform_loop): Walk over all PHIs again af[...]
[diff truncated at 524288 bytes]
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