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* [gcc r12-2775] Daily bump.
@ 2021-08-06 0:17 GCC Administrator
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From: GCC Administrator @ 2021-08-06 0:17 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:8ebf4fb54ace6532b53f66405cd44fbbf8572508
commit r12-2775-g8ebf4fb54ace6532b53f66405cd44fbbf8572508
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri Aug 6 00:16:29 2021 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 96 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 82 ++++++++++++++++++++++++++++++++++++++++++
libcpp/ChangeLog | 11 ++++++
libgcc/ChangeLog | 7 ++++
libgomp/ChangeLog | 31 ++++++++++++++++
libstdc++-v3/ChangeLog | 47 ++++++++++++++++++++++++
7 files changed, 275 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d888dc5798d..6b7a77d7f24 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,99 @@
+2021-08-05 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/99744
+ * config/i386/i386.c (ix86_can_inline_p): Ignore MASK_80387 if
+ callee only uses GPRs.
+ * config/i386/ia32intrin.h: Revert commit 5463cee2770.
+ * config/i386/serializeintrin.h: Revert commit 71958f740f1.
+ * config/i386/x86gprintrin.h: Add
+ #pragma GCC target("general-regs-only") and #pragma GCC pop_options
+ to disable non-GPR ISAs.
+
+2021-08-05 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR middle-end/101787
+ * doc/md.texi (cond_ashl, cond_ashr, cond_lshr): Document.
+
+2021-08-05 Richard Sandiford <richard.sandiford@arm.com>
+
+ * tree-vectorizer.h (vect_is_store_elt_extraction, vect_is_reduction)
+ (vect_reduc_type, vect_embedded_comparison_type, vect_comparison_type)
+ (vect_is_extending_load, vect_is_integer_truncation): New functions,
+ moved from aarch64.c but given different names.
+ * config/aarch64/aarch64.c (aarch64_is_store_elt_extraction)
+ (aarch64_is_reduction, aarch64_reduc_type)
+ (aarch64_embedded_comparison_type, aarch64_comparison_type)
+ (aarch64_extending_load_p, aarch64_integer_truncation_p): Delete
+ in favor of the above. Update callers accordingly.
+
+2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/101723
+ * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
+ writing .cpu directive in asm output.
+ * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
+ (arm_last_printed_arch_string): Delete.
+ (arm_last-printed_fpu_string): Delete.
+ (arm_configure_build_target): If use of floating-point/SIMD is
+ disabled, remove all fp/simd related features from the target ISA.
+ (last_arm_targ_options): New variable.
+ (arm_print_asm_arch_directives): Add new parameters. Change order
+ of emitted directives and handle all cases here.
+ (arm_file_start): Always call arm_print_asm_arch_directives, move
+ all generation of .arch/.arch_extension here.
+ (arm_file_end): Call arm_print_asm_arch.
+ (arm_declare_function_name): Call arm_print_asm_arch_directives
+ instead of printing .arch/.fpu directives directly.
+
+2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.c (arm_configure_build_target): Don't call
+ arm_option_reconfigure_globals.
+ (arm_option_restore): Call arm_option_reconfigure_globals after
+ reconfiguring the target.
+ * config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
+
+2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.c (arm_configure_build_target): Ensure the target's
+ arch_name is always set.
+
+2021-08-05 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/aarch64.c: Traverse RTL tree to prevent cost
+ of vec_select high-half from being added into Neon subtract
+ cost.
+
+2021-08-05 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/aarch64.c: Traverse RTL tree to prevent cost
+ of vec_select high-half from being added into Neon add cost.
+
+2021-08-05 Kewen Lin <linkw@linux.ibm.com>
+
+ * cfgloop.h (loops_list::loops_list): Add one optional argument
+ root and adjust accordingly, update loop tree walking and factor
+ out to ...
+ * cfgloop.c (loops_list::walk_loop_tree): ... this. New function.
+
+2021-08-05 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ PR tree-optimization/101626
+ * tree-sra.c (propagate_subaccesses_from_rhs): Do not set the
+ reverse scalar storage order on a pointer or vector component.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (cond_<code><mode>): New expander.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (cond_<code><mode>): New expander.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (cond_<code><mode>): New expander.
+
2021-08-04 David Malcolm <dmalcolm@redhat.com>
PR analyzer/101570
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6168f4600b0..891ccf65a21 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210805
+20210806
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 04b011beabd..d4c03074f52 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,85 @@
+2021-08-05 Jonathan Wakely <jwakely@redhat.com>
+
+ * g++.old-deja/g++.other/inline7.C: Cast nodiscard call to void.
+
+2021-08-05 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/99744
+ * gcc.target/i386/pr99744-3.c: New test.
+ * gcc.target/i386/pr99744-4.c: Likewise.
+ * gcc.target/i386/pr99744-5.c: Likewise.
+ * gcc.target/i386/pr99744-6.c: Likewise.
+ * gcc.target/i386/pr99744-7.c: Likewise.
+ * gcc.target/i386/pr99744-8.c: Likewise.
+
+2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/101723
+ * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected output.
+ * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
+ * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do assemble.
+ Add a non-no-op function body.
+ * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
+ * gcc.target/arm/pr98636.c (dg-options): Add -mfloat-abi=softfp.
+ * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
+ * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use
+ check-function-bodies.
+ * gcc.target/arm/attr-neon3.c: Likewise.
+ * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
+ multiple instances.
+ * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
+ * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.
+
+2021-08-05 Jonathan Wright <jonathan.wright@arm.com>
+
+ * gcc.target/aarch64/vsubX_high_cost.c: New test.
+
+2021-08-05 Jonathan Wright <jonathan.wright@arm.com>
+
+ * gcc.target/aarch64/vaddX_high_cost.c: New test.
+
+2021-08-05 Richard Biener <rguenther@suse.de>
+
+ * gcc.dg/vect/bb-slp-pr101756.c: Add -w.
+
+2021-08-05 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * gcc.dg/sso-15.c: New test.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/cond_op_anylogic_d-1.c: New test.
+ * gcc.target/i386/cond_op_anylogic_d-2.c: New test.
+ * gcc.target/i386/cond_op_anylogic_q-1.c: New test.
+ * gcc.target/i386/cond_op_anylogic_q-2.c: New test.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/cond_op_maxmin_double-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_double-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_float-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_float-2.c: New test.
+
+2021-08-05 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/cond_op_maxmin_b-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_b-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_d-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_d-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_q-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_q-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_ub-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_ub-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_ud-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_ud-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_uq-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_uq-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_uw-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_uw-2.c: New test.
+ * gcc.target/i386/cond_op_maxmin_w-1.c: New test.
+ * gcc.target/i386/cond_op_maxmin_w-2.c: New test.
+
2021-08-04 David Malcolm <dmalcolm@redhat.com>
PR analyzer/101570
diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog
index 7b9896f3450..518dbdcf039 100644
--- a/libcpp/ChangeLog
+++ b/libcpp/ChangeLog
@@ -1,3 +1,14 @@
+2021-08-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/100977
+ * ucnid.h: Regenerated using Unicode 13.0.0 files.
+
+2021-08-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/100977
+ * makeucnid.c (write_table): Fix computation of last_combine.
+ * ucnid.h: Regenerated using Unicode 6.3.0 files.
+
2021-06-16 Jason Merrill <jason@redhat.com>
PR c++/100796
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 6845f39d368..de145fa80f4 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,10 @@
+2021-08-05 Jakub Jelinek <jakub@redhat.com>
+
+ * config/t-slibgcc (SHLIB_LINK): Add $(LDFLAGS).
+ * config/t-slibgcc-darwin (SHLIB_LINK): Likewise.
+ * config/t-slibgcc-vms (SHLIB_LINK): Likewise.
+ * config/t-slibgcc-fuchsia (SHLIB_LDFLAGS): Remove $(LDFLAGS).
+
2021-08-04 Jakub Jelinek <jakub@redhat.com>
* config/t-slibgcc-fuchsia: Undo doubly applied patch.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 3cf5ef4c951..274d238c9f9 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,34 @@
+2021-08-05 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * icv-device.c (omp_get_device_num): New API function, host side.
+ * fortran.c (omp_get_device_num_): New interface function.
+ * libgomp-plugin.h (GOMP_DEVICE_NUM_VAR): Define macro symbol.
+ * libgomp.map (OMP_5.0.2): New version space with omp_get_device_num,
+ omp_get_device_num_.
+ * libgomp.texi (omp_get_device_num): Add documentation for new API
+ function.
+ * omp.h.in (omp_get_device_num): Add declaration.
+ * omp_lib.f90.in (omp_get_device_num): Likewise.
+ * omp_lib.h.in (omp_get_device_num): Likewise.
+ * target.c (gomp_load_image_to_device): If additional entry for device
+ number exists at end of returned entries from 'load_image_func' hook,
+ copy the assigned device number over to the device variable.
+ * config/gcn/icv-device.c (GOMP_DEVICE_NUM_VAR): Define static global.
+ (omp_get_device_num): New API function, device side.
+ * plugin/plugin-gcn.c ("symcat.h"): Add include.
+ (GOMP_OFFLOAD_load_image): Add addresses of device GOMP_DEVICE_NUM_VAR
+ at end of returned 'target_table' entries.
+ * config/nvptx/icv-device.c (GOMP_DEVICE_NUM_VAR): Define static global.
+ (omp_get_device_num): New API function, device side.
+ * plugin/plugin-nvptx.c ("symcat.h"): Add include.
+ (GOMP_OFFLOAD_load_image): Add addresses of device GOMP_DEVICE_NUM_VAR
+ at end of returned 'target_table' entries.
+ * testsuite/lib/libgomp.exp
+ (check_effective_target_offload_target_intelmic): New function for
+ testing for intelmic offloading.
+ * testsuite/libgomp.c-c++-common/target-45.c: New test.
+ * testsuite/libgomp.fortran/target10.f90: New test.
+
2021-07-30 Thomas Schwinge <thomas@codesourcery.com>
Ulrich Drepper <drepper@redhat.com>
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index b6b3a0efbe3..be5daf026ce 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,50 @@
+2021-08-05 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/101782
+ * include/bits/ranges_base.h (ranges::begin, ranges::end)
+ (ranges::rbegin, ranges::rend, ranges::size, ranges::ssize)
+ (ranges::empty, ranges::data): Move attribute after the
+ declarator-id instead of at the end of the declarator.
+ * include/bits/stl_iterator.h (__gnu_cxx::__normal_iterator):
+ Move attributes back to the start of the function declarator,
+ but move the requires-clause to the end.
+ (common_iterator): Move attribute after the declarator-id.
+ * include/bits/stl_queue.h (queue): Remove ill-formed attributes
+ from friend declaration that are not definitions.
+ * include/std/ranges (views::all, views::filter)
+ (views::transform, views::take, views::take_while,
+ views::drop) (views::drop_while, views::join,
+ views::lazy_split) (views::split, views::counted,
+ views::common, views::reverse) (views::elements): Move
+ attributes after the declarator-id.
+
+2021-08-05 Jonathan Wakely <jwakely@redhat.com>
+
+ * libsupc++/compare (partial_ordering, weak_ordering)
+ (strong_ordering, is_eq, is_neq, is_lt, is_lteq, is_gt, is_gteq)
+ (compare_three_way, strong_order, weak_order, partial_order)
+ (compare_strong_order_fallback, compare_weak_order_fallback)
+ (compare_partial_order_fallback, __detail::__synth3way): Add
+ nodiscard attribute.
+ * testsuite/18_support/comparisons/categories/zero_neg.cc: Add
+ -Wno-unused-result to options.
+
+2021-08-05 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/101782
+ * include/bits/ranges_base.h (ranges::begin, ranges::end)
+ (ranges::rbegin, ranges::rend, ranges::size, ranges::ssize)
+ (ranges::empty, ranges::data): Move attribute to the end of
+ the declarator.
+ * include/bits/stl_iterator.h (__gnu_cxx::__normal_iterator)
+ (common_iterator): Likewise for non-member operator functions.
+ * include/std/ranges (views::all, views::filter)
+ (views::transform, views::take, views::take_while, views::drop)
+ (views::drop_while, views::join, views::lazy_split)
+ (views::split, views::counted, views::common, views::reverse)
+ (views::elements): Likewise.
+ * testsuite/std/ranges/access/101782.cc: New test.
+
2021-08-04 Jonathan Wakely <jwakely@redhat.com>
* include/bits/forward_list.h: Add [[nodiscard]] to functions
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