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* [gcc r13-3208] Daily bump.
@ 2022-10-11 0:17 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2022-10-11 0:17 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:27bfe54e975d12aac750f0702f716a4c1c0a81fe
commit r13-3208-g27bfe54e975d12aac750f0702f716a4c1c0a81fe
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Oct 11 00:17:00 2022 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 146 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/c-family/ChangeLog | 17 ++++++
gcc/cp/ChangeLog | 12 ++++
gcc/fortran/ChangeLog | 6 ++
gcc/testsuite/ChangeLog | 58 +++++++++++++++++++
libcpp/po/ChangeLog | 4 ++
libgfortran/ChangeLog | 5 ++
libstdc++-v3/ChangeLog | 29 ++++++++++
9 files changed, 278 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8f729dc5b33..bc10014541b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,149 @@
+2022-10-10 Nathan Sidwell <nathan@acm.org>
+
+ * common.opt (-fabi-version=): Document 18.
+ * doc/invoke.texi (-fabi-version): Document 18.
+
+2022-10-10 Andrea Corallo <andrea.corallo@arm.com>
+
+ PR other/99723
+ * toplev.cc (toplev::main): Don't run self tests in case of
+ previous error.
+
+2022-10-10 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv-c.cc: Add newline to the end of file.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op-float.cc (class foperator_identity): Make members public.
+ (class foperator_equal): Same.
+ (class foperator_not_equal): Same.
+ (class foperator_lt): Same.
+ (class foperator_le): Same.
+ (class foperator_gt): Same.
+ (class foperator_ge): Same.
+ (class foperator_unordered): Same.
+ (class foperator_ordered): Same.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.h (frange::maybe_isnan): New.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op-float.cc (foperator_not_equal::op1_range): Set NAN on
+ TRUE side for x != x.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op-float.cc (foperator_unordered::op1_range): Set NAN when
+ operands are equal and result is TRUE.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * range.h (range_true): Return int_range<2>.
+ (range_false): Same.
+ (range_true_and_false): Same.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-op.cc: Add op1_range entry for __builtin_signbit.
+
+2022-10-10 liuhongt <hongtao.liu@intel.com>
+
+ PR target/107185
+ * config/i386/i386.md (lrint<MODEF:mode><SWI48:mode>2): Swap
+ predicate of operands[0] and operands[1].
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * common/config/arc/arc-common.cc (arc_option_optimization_table):
+ Remove Rcq and Rcw options.
+ * config/arc/arc.opt (mRcq): Ignore option, preserve it for
+ backwards compatibility.
+ (mRcw): Likewise.
+ * doc/invoke.texi (mRcw, mRcq): Update document.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc.cc (arc_check_short_reg_p): New function.
+ (arc_address_cost): Replace satisfies_constraint_Rcq with the
+ above new function.
+ (arc_output_addsi): Likewise.
+ (split_addsi): Likewise.
+ (split_subsi): Likewise.
+ * config/arc/arc.md (movqi_insn): Remove Rcq constraint.
+ (movhi_insn): Likewise.
+ (movsi_insn): Likewise.
+ (tst_movb): Likewise.
+ (tst): Likewise.
+ (tst_bitfield): Likewise.
+ (abssi2): Likewise.
+ (addsi3_mixed): Likewise.
+ (mulhisi3_reg): Likewise.
+ (umulhisi3_reg): Likewise.
+ (mulsi_600): Likewise.
+ (mul64): Likewise.
+ (subsi3_insn): Likewise.
+ (bicsi3_insn): Likewise.
+ (xorsi3): Likewise.
+ (negsi2): Likewise.
+ (one_cmplsi2): Likewise.
+ (lshrsi3_insn): Likewise.
+ (cmpsi_cc_insn_mixed): Likewise.
+ (cmpsi_cc_zn_insn): Likewise.
+ (btst): Likewise.
+ (cmpsi_cc_z_insn): Likewise.
+ (cmpsi_cc_c_insn): Likewise.
+ (indirect_jump): Likewise.
+ (casesi_jump): Likewise.
+ (call_i): Likewise.
+ (call_value_i): Likewise.
+ (bbit): Likewise.
+ (abssf2): Likewise.
+ (ashlsi2_cnt1): Likewise.
+ (lshrsi3_cnt1): Likewise.
+ (ashrsi3_cnt1): Likewise.
+ * config/arc/constraints.md (Rcq): Remove.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc.md (smaxsi3): Remove Rcw.
+ (sminsi3): Likewise.
+ (addsi3_mixed): Likewise.
+ (add_f_2): Likewise.
+ (subsi3_insn): Likewise.
+ (sub_f): Likewise.
+ (sub_n): Likewise.
+ (bset): Likewise.
+ (bxor): Likewise.
+ (bclr): Likewise.
+ (bset_insn): Likewise.
+ (bxor_insn): Likewise.
+ (bclr_insn): Likewise.
+ (bmsk_insn): Likewise.
+ (bicsi3_insn): Likewise.
+ (xorsi3): Likewise.
+ (negsi2): Likewise.
+ (lshrsi3_insn): Likewise.
+ (abssf2): Likewise.
+ (negsf2): Likewise.
+ * config/arc/constraints.md(Rcw): Remove it.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc.md(mulsi3_700): Remove Rcr.
+ (mulsi3_highpart): Likewise.
+ (umulsi3_highpart_i): Likewise.
+ (umulsi3_highpart_int): Likewise.
+ (macd): Likewise.
+ (macdu): Likewise.
+ * config/arc/constraints.md (Rcr): Remove it.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc.cc (arc_save_callee_enter): Use negative offsets.
+
2022-10-09 Dimitar Dimitrov <dimitar@dinux.eu>
PR target/106562
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 836fdacb295..ee52440e2ce 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20221010
+20221011
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 7bae1d543b3..f6176a7c74a 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,20 @@
+2022-10-10 Nathan Sidwell <nathan@acm.org>
+
+ * c-opts.cc (c_common_post_options): Bump abi to 18.
+
+2022-10-10 Marek Polacek <polacek@redhat.com>
+
+ PR c++/106937
+ * c-pretty-print.cc (pp_c_specifier_qualifier_list): Print only GNU
+ attributes here.
+ (c_pretty_printer::direct_abstract_declarator): Print the standard [[]]
+ attributes here.
+ (pp_c_attributes): Remove.
+ (pp_c_attributes_display): Print the [[]] form if appropriate. Use
+ get_attribute_name. Don't print a trailing space when printing the
+ [[]] form.
+ * c-pretty-print.h (pp_c_attributes): Remove.
+
2022-10-07 Qing Zhao <qing.zhao@oracle.com>
* c-attribs.cc (handle_strict_flex_array_attribute): New function.
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index e8926285372..50e5f3eb789 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2022-10-10 Nathan Sidwell <nathan@acm.org>
+
+ * mangle.cc (write_prefix): Add VAR_DECL & FIELD_DECL to
+ substitution table under abi=18. Note possible mismatch.
+
+2022-10-10 Marek Polacek <polacek@redhat.com>
+
+ PR c++/106937
+ * error.cc: Include "attribs.h".
+ (dump_type_prefix): Print only GNU attributes here.
+ (dump_type_suffix): Print standard attributes here.
+
2022-10-08 Jason Merrill <jason@redhat.com>
* cp-tree.h (TARGET_EXPR_ELIDING_P): New.
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 573cbaf5b2e..094a11dd29d 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,9 @@
+2022-10-10 Jakub Jelinek <jakub@redhat.com>
+
+ * trans-openmp.cc (gfc_trans_omp_assume): Use create_tmp_var_raw
+ instead of gfc_create_var for TARGET_EXPR slot creation. Create it
+ with boolean_type_node and convert.
+
2022-10-08 Harald Anlauf <anlauf@gmx.de>
Mikael Morin <mikael@gcc.gnu.org>
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1b40443e012..723077352d9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,61 @@
+2022-10-10 Nathan Sidwell <nathan@acm.org>
+
+ * g++.dg/abi/lambda-ctx1-17.C: New.
+ * g++.dg/abi/lambda-ctx1-18.C: New.
+ * g++.dg/abi/lambda-ctx1-18vs17.C: New.
+ * g++.dg/abi/lambda-ctx1.h: New.
+ * g++.dg/abi/lambda-vis.C: Adjust expected mangles.
+ * g++.dg/abi/macro0.C: Adjust.
+
+2022-10-10 Marek Polacek <polacek@redhat.com>
+
+ PR c++/106937
+ * c-c++-common/pointer-to-fn1.c: New test.
+
+2022-10-10 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/rvv/base/riscv_vector.h: New.
+
+2022-10-10 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/rvv/base/user-1.c: Add dg-options and drop
+ dg-skip-if.
+
+2022-10-10 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/rvv/base/pragma-1.c: Add newline to the end of file.
+ * gcc.target/riscv/rvv/base/pragma-2.c: Ditto.
+ * gcc.target/riscv/rvv/base/pragma-3.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-1.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-2.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-3.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-4.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-5.c: Ditto.
+ * gcc.target/riscv/rvv/base/user-6.c: Ditto.
+ * gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
+ * gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
+
+2022-10-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/107153
+ * gcc.dg/autopar/pr107153.c: Require fgraphite effective target.
+
+2022-10-10 Aldy Hernandez <aldyh@redhat.com>
+
+ * gcc.dg/tree-ssa/vrp-float-signbit-3.c: New test.
+
+2022-10-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/pr107185.c: New test.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * gcc.target/arc/tmac-2.c: Update test.
+
+2022-10-10 Claudiu Zissulescu <claziss@gmail.com>
+
+ * gcc.target/arc/enter-dw2-1.c: New file.
+
2022-10-09 Dimitar Dimitrov <dimitar@dinux.eu>
PR target/106562
diff --git a/libcpp/po/ChangeLog b/libcpp/po/ChangeLog
index a8ffca2c662..7ab8d50dada 100644
--- a/libcpp/po/ChangeLog
+++ b/libcpp/po/ChangeLog
@@ -1,3 +1,7 @@
+2022-10-10 Joseph Myers <joseph@codesourcery.com>
+
+ * ro.po: New.
+
2022-05-04 Joseph Myers <joseph@codesourcery.com>
* es.po: Update.
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index 864bf6a5be6..ffe8058598f 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-10 LIU Hao <lh_mouse@126.com>
+
+ * io/async.h (struct async_unit): Use `__gthread_t` instead
+ of `pthread_t`.
+
2022-09-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
* ieee/ieee_arithmetic.F90 (IEEE_SET_ROUNDING_MODE): Handle
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 68f9a1d877d..58b011baac4 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,32 @@
+2022-10-10 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/type_traits (make_signed, make_unsigned): Remove
+ constraints on primary template.
+ * testsuite/20_util/make_signed/requirements/typedefs_neg.cc:
+ Undo changes to expected error in C++20 mode.
+ * testsuite/20_util/make_unsigned/requirements/typedefs_neg.cc:
+ Likewise.
+ * testsuite/24_iterators/range_access/range_access_cpp20_neg.cc:
+ Likewise.
+ * testsuite/20_util/make_signed/requirements/uninstantiated.cc:
+ New test.
+ * testsuite/20_util/make_unsigned/requirements/uninstantiated.cc:
+ New test.
+
+2022-10-10 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/type_traits (make_signed, make_unsigned): Add
+ specializations for cv bool. Add requires-clause for C++20 to
+ improve diagnostics for non-integral, non-enum cases.
+ * testsuite/20_util/make_signed/requirements/typedefs_neg.cc:
+ Check cv bool.
+ * testsuite/20_util/make_unsigned/requirements/typedefs_neg.cc:
+ Likewise.
+ * testsuite/24_iterators/range_access/range_access_cpp20_neg.cc:
+ Adjust expected errors for C++20 and later.
+ * testsuite/lib/prune.exp: Prune "in requirements [with ...]"
+ lines from diagnostics.
+
2022-10-07 Jonathan Wakely <jwakely@redhat.com>
* acinclude.m4 (GLIBCXX_ENABLE_HOSTED): Add libstdcxx-hosted
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