[gcc r13-4146] Daily bump.

[gcc r13-4146] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:add8984069648390a0c5d93719147bcf7d275da2

commit r13-4146-gadd8984069648390a0c5d93719147bcf7d275da2
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Fri Nov 18 18:09:19 2022 +0000

    Daily bump.

Diff:
---
 contrib/ChangeLog       |   5 ++
 gcc/ChangeLog           | 132 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/c/ChangeLog         |  12 +++++
 gcc/cp/ChangeLog        |  13 +++++
 gcc/fortran/ChangeLog   |   5 ++
 gcc/testsuite/ChangeLog |  93 ++++++++++++++++++++++++++++++++++
 libstdc++-v3/ChangeLog  |   7 +++
 8 files changed, 268 insertions(+), 1 deletion(-)

diff --git a/contrib/ChangeLog b/contrib/ChangeLog
index 31bd07333c6..1a1c5cfb1fb 100644
--- a/contrib/ChangeLog
+++ b/contrib/ChangeLog
@@ -1,3 +1,8 @@
+2022-11-18  Jakub Jelinek  <jakub@redhat.com>
+
+	* gcc-changelog/git_update_version.py: Add
+	1957bedf29a1b2cc231972aba680fe80199d5498 to ignored commits.
+
 2022-11-15  Martin Liska  <mliska@suse.cz>
 
 	* gcc-changelog/git_commit.py: Revert temporary rule
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fdc9d7534e8..6cb657803d4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,135 @@
+2022-11-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR middle-end/107705
+	* function.cc (aggregate_value_p): Return 0 if
+	the function type was an error operand.
+
+2022-11-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR c/106764
+	PR c/106765
+	PR c/107307
+	* gimplify.cc (gimplify_compound_lval): Return GS_ERROR
+	if gimplify_expr had return GS_ERROR.
+	(gimplify_call_expr): Likewise.
+
+2022-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/atomics.md (*aarch64_atomic_load<ALLX:mode>_rcpc_sext):
+	Use <GPI:w>  for destination format.
+	* config/aarch64/iterators.md (w_sz): Delete.
+
+2022-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64.h (TARGET_RCPC2): Define.
+	* config/aarch64/atomics.md (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
+	Adjust output template.
+	(*aarch64_atomic_load<ALLX:mode>_rcpc_sex): Guard on TARGET_RCPC2.
+	Adjust output template.
+	* config/aarch64/iterators.md (w_sz): New mode attr.
+
+2022-11-18  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107647
+	* tree-vect-slp-patterns.cc (addsub_pattern::recognize): Only
+	allow FMA generation with -ffp-contract=fast for FP types.
+	(complex_mul_pattern::matches): Likewise.
+
+2022-11-18  Jinyang He  <hejinyang@loongson.cn>
+
+	PR target/107713
+	* config/loongarch/sync.md
+	(atomic_cas_value_exchange_7_<mode>): New define_insn.
+	(atomic_exchange): Use atomic_cas_value_exchange_7_si instead of
+	atomic_cas_value_cmp_and_7_si.
+
+2022-11-17  Andrew Pinski  <apinski@marvell.com>
+
+	PR middle-end/107734
+	* match.pd (perm + vector op pattern): Clear the sbitmap before
+	use.
+
+2022-11-17  Aldy Hernandez  <aldyh@redhat.com>
+
+	PR tree-optimization/107732
+	* range-op-float.cc (foperator_abs::op1_range): Early exit when
+	result is undefined.
+
+2022-11-17  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+
+	* config/riscv/bitmanip.md (*bclri<mode>_nottwobits): New pattern.
+	(*bclridisi_nottwobits): New pattern, handling the sign-bit.
+	* config/riscv/predicates.md (const_nottwobits_operand):
+	New predicate.
+
+2022-11-17  mtsamis  <manolis.tsamis@vrull.eu>
+
+	* config/riscv/riscv.cc (struct machine_function): Add array to store
+	register wrapping information.
+	(riscv_for_each_saved_reg): Skip registers that are wrapped separetely.
+	(riscv_get_separate_components): New function.
+	(riscv_components_for_bb): Likewise.
+	(riscv_disqualify_components): Likewise.
+	(riscv_process_components): Likewise.
+	(riscv_emit_prologue_components): Likewise.
+	(riscv_emit_epilogue_components): Likewise.
+	(riscv_set_handled_components): Likewise.
+	(TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
+	(TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
+	(TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
+	(TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
+	(TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
+	(TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
+
+2022-11-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/atomics.md (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
+	Add mode size check to condition.
+	(*aarch64_atomic_load<ALLX:mode>_rcpc_sext): Likewise.
+
+2022-11-17  Aldy Hernandez  <aldyh@redhat.com>
+
+	PR tree-optimization/68097
+	* gimple-fold.cc (gimple_stmt_nonnegative_warnv_p): Call
+	range_of_stmt for floats.
+
+2022-11-17  Lili Cui  <lili.cui@intel.com>
+
+	* config/i386/x86-tune.def
+	(X86_TUNE_AVX256_MOVE_BY_PIECES): Add alderlake.
+	(X86_TUNE_AVX256_STORE_BY_PIECES): Ditto.
+
+2022-11-17  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/107717
+	* match.pd: Ensure same SSA_NAME.
+
+2022-11-17  Tamar Christina  <tamar.christina@arm.com>
+
+	* match.pd: Replace GET_MODE_WIDER_MODE with
+	custom code.
+
+2022-11-17  Aldy Hernandez  <aldyh@redhat.com>
+
+	* range-op-float.cc (range_operator_float::fold_range): Make check
+	for maybe_isnan more readable.
+
+2022-11-17  Kewen Lin  <linkw@linux.ibm.com>
+
+	* gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Use
+	tree_fits_shwi_p rather than tree_fits_uhwi_p as bias is signed.
+
+2022-11-17  Jia-Wei Chen  <jiawei@iscas.ac.cn>
+
+	* config/riscv/riscv.cc (riscv_expand_epilogue):
+	Do not emit useless add sp, sp, 0 instrutions.
+
+2022-11-17  Jeff Law  <jlaw@ventanamicro.com>
+
+	* config/sh/sh_treg_combine.cc: Include tm-preds.h.
+	(t_reg_operand): Remove bogus prototype.
+	(negt_reg_operand): Likewise.
+
 2022-11-16  Marek Polacek  <polacek@redhat.com>
 
 	PR c++/106649
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 3204c3c9c61..578404781e6 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20221117
+20221118
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 43b6d940024..2ef65a89f82 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,15 @@
+2022-11-17  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
+
+	* c-decl.cc (start_function): Set the result decl source
+	location to the location of the typespec.
+
+2022-11-17  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/107711
+	* c-parser.cc (ana::c_translation_unit::consider_macro): Pass NULL
+	to cpp_create_reader, rather than ident_hash, so that the new
+	reader gets its own hash table.
+
 2022-11-15  David Malcolm  <dmalcolm@redhat.com>
 
 	PR analyzer/106302
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index faf4c21f6ef..acf78b6c0d5 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,16 @@
+2022-11-18  Jakub Jelinek  <jakub@redhat.com>
+
+	* decl.cc (grokdeclarator): Implement
+	CWG2635 - Constrained structured bindings.  Emit a pedwarn on
+	constrained auto type.  Add auto_diagnostic_group for error_at
+	and inform for non-auto type on structured bindings declaration.
+
+2022-11-18  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/104066
+	* decl.cc (grokdeclarator): Check funcdecl_p before complaining
+	about constinit.
+
 2022-11-16  Marek Polacek  <polacek@redhat.com>
 
 	PR c++/106649
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 6c3ace128ff..08ed6caefa2 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,8 @@
+2022-11-17  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
+
+	PR fortran/99884
+	* io.cc (check_open_constraints): Remove double spaces.
+
 2022-11-16  Steve Kargl  <kargl@gcc.gnu.org>
 
 	PR fortran/107707
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fd4883422a6..cf3b7fc312e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,96 @@
+2022-11-18  Andrew Pinski  <apinski@marvell.com>
+
+	* gcc.dg/redecl-22.c: New test.
+
+2022-11-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR c/106764
+	PR c/106765
+	PR c/107307
+	* gcc.dg/redecl-19.c: New test.
+	* gcc.dg/redecl-20.c: New test.
+	* gcc.dg/redecl-21.c: New test.
+
+2022-11-18  Yixuan Chen  <chenyixuan@iscas.ac.cn>
+
+	* gcc.dg/pr25521.c: Fix testcase for architectures that use .srodata.
+
+2022-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gcc.target/aarch64/ldapr-sext.c: Adjust expected output.
+
+2022-11-18  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* lib/target-supports.exp (check_is_prog_name_available):
+	New.
+	* lib/target-supports-dg.exp
+	(dg-require-prog-name-available): New.
+	* g++.dg/modules/modules.exp: Verify avilability of module
+	mapper.
+
+2022-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gcc.target/aarch64/ldapr-ext.c: Rename to...
+	* gcc.target/aarch64/ldapr-zext.c: ... This.  Fix expected assembly.
+	* gcc.target/aarch64/ldapr-sext.c: New test.
+
+2022-11-18  Jakub Jelinek  <jakub@redhat.com>
+
+	* g++.dg/cpp2a/decomp5.C: New test.
+	* g++.dg/cpp2a/decomp6.C: New test.
+	* g++.dg/cpp2a/decomp7.C: New test.
+	* g++.dg/cpp2a/concepts-placeholder7.C: Adjust expected diagnostics.
+	* g++.dg/cpp2a/concepts-placeholder8.C: Likewise.
+	* g++.dg/cpp2a/concepts-placeholder9.C: New test.
+	* g++.dg/cpp2a/concepts-placeholder10.C: New test.
+
+2022-11-18  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107647
+	* gcc.target/i386/pr107647.c: New testcase.
+
+2022-11-18  Jinyang He  <hejinyang@loongson.cn>
+
+	PR target/107713
+	* gcc.target/loongarch/pr107713-1.c: New test.
+	* gcc.target/loongarch/pr107713-2.c: New test.
+
+2022-11-18  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/104066
+	* g++.dg/cpp2a/constinit18.C: New test.
+
+2022-11-17  Aldy Hernandez  <aldyh@redhat.com>
+
+	PR tree-optimization/107732
+	* gcc.dg/tree-ssa/pr107732.c: New test.
+
+2022-11-17  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/107711
+	* gcc.dg/analyzer/named-constants-Wunused-macros.c: New test.
+
+2022-11-17  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+
+	* gcc.target/riscv/zbs-bclri.c: New test.
+
+2022-11-17  mtsamis  <manolis.tsamis@vrull.eu>
+
+	* gcc.target/riscv/shrink-wrap-1.c: New test.
+
+2022-11-17  Lili Cui  <lili.cui@intel.com>
+
+	* gcc.target/i386/pieces-memset-50.c: New test.
+
+2022-11-17  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/107717
+	* gcc.target/aarch64/sve2/pr107717.c: New test.
+
+2022-11-17  Jia-Wei Chen  <jiawei@iscas.ac.cn>
+
+	* gcc.target/riscv/rvv/base/spill-sp-adjust.c: New test.
+
 2022-11-16  David Malcolm  <dmalcolm@redhat.com>
 
 	* gcc.dg/analyzer/named-constants-via-command-line.c: New test.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 08c5bc3f5d5..b9fc8fd9f42 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,10 @@
+2022-11-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/107720
+	* include/std/format [_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT]:
+	Declare overloads of std::to_chars for the alternative long
+	double type.
+
 2022-11-16  Jonathan Wakely  <jwakely@redhat.com>
 
 	PR libstdc++/107720