public inbox for libstdc++-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc/devel/rust/master] Merge commit '9e56306f4d7c15e7667d8ac0b62ae6efb93ba756' into HEAD
@ 2023-02-13 13:11 Thomas Schwinge
0 siblings, 0 replies; only message in thread
From: Thomas Schwinge @ 2023-02-13 13:11 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:d0a30acf3e50b0757a7e82cebf24e379906ce92d
commit d0a30acf3e50b0757a7e82cebf24e379906ce92d
Merge: ebecfbd3519 9e56306f4d7
Author: Thomas Schwinge <thomas@codesourcery.com>
Date: Sun Feb 12 16:43:57 2023 +0100
Merge commit '9e56306f4d7c15e7667d8ac0b62ae6efb93ba756' into HEAD
Diff:
contrib/ChangeLog | 30 +
contrib/gcc-changelog/test_patches.txt | 3 +-
contrib/gcc_update | 14 +-
contrib/update-copyright.py | 1 +
fixincludes/ChangeLog | 14 +
fixincludes/fixincl.x | 109 +-
fixincludes/inclhack.def | 47 +
fixincludes/tests/base/objc/runtime.h | 24 +
fixincludes/tests/base/stdio.h | 7 +
gcc/BASE-VER | 2 +-
gcc/ChangeLog | 1156 +++++++++++
gcc/DATESTAMP | 2 +-
gcc/Makefile.in | 6 +-
gcc/ada/ChangeLog | 98 +
gcc/ada/exp_ch3.adb | 327 ++--
gcc/ada/exp_ch4.adb | 18 +-
gcc/ada/exp_ch6.adb | 52 +-
gcc/ada/exp_util.adb | 193 +-
gcc/ada/exp_util.ads | 4 +
gcc/ada/gcc-interface/Make-lang.in | 4 +-
gcc/ada/gcc-interface/Makefile.in | 2 +-
gcc/ada/gcc-interface/ada-builtin-types.def | 2 +-
gcc/ada/gcc-interface/ada-builtins.def | 2 +-
gcc/ada/gcc-interface/ada-tree.def | 2 +-
gcc/ada/gcc-interface/ada-tree.h | 2 +-
gcc/ada/gcc-interface/ada.h | 2 +-
gcc/ada/gcc-interface/config-lang.in | 2 +-
gcc/ada/gcc-interface/cuintp.cc | 2 +-
gcc/ada/gcc-interface/decl.cc | 2 +-
gcc/ada/gcc-interface/gadaint.h | 2 +-
gcc/ada/gcc-interface/gigi.h | 2 +-
gcc/ada/gcc-interface/lang-specs.h | 2 +-
gcc/ada/gcc-interface/lang.opt | 2 +-
gcc/ada/gcc-interface/misc.cc | 2 +-
gcc/ada/gcc-interface/system.ads | 2 +-
gcc/ada/gcc-interface/targtyps.cc | 2 +-
gcc/ada/gcc-interface/trans.cc | 2 +-
gcc/ada/gcc-interface/utils.cc | 2 +-
gcc/ada/gcc-interface/utils2.cc | 2 +-
gcc/analyzer/ChangeLog | 62 +
gcc/analyzer/analyzer.h | 6 +-
gcc/analyzer/checker-event.cc | 8 +-
gcc/analyzer/checker-event.h | 11 +-
gcc/analyzer/diagnostic-manager.cc | 38 +-
gcc/analyzer/infinite-recursion.cc | 103 +-
gcc/analyzer/pending-diagnostic.cc | 1 +
gcc/analyzer/pending-diagnostic.h | 15 +-
gcc/analyzer/sm-malloc.cc | 35 +-
gcc/bb-reorder.cc | 21 +-
gcc/c-family/ChangeLog | 10 +
gcc/c-family/c-common.cc | 3 +-
gcc/c-family/c-pragma.cc | 3 +
gcc/c/ChangeLog | 12 +
gcc/c/c-parser.cc | 13 +-
gcc/cgraph.cc | 22 +-
gcc/cgraphbuild.cc | 12 +
gcc/cgraphunit.cc | 2 -
gcc/common/config/aarch64/aarch64-common.cc | 13 +-
gcc/common/config/riscv/riscv-common.cc | 4 +
gcc/config.gcc | 18 +-
gcc/config/aarch64/aarch64-c.cc | 10 +-
gcc/config/aarch64/aarch64-cores.def | 2 +-
gcc/config/aarch64/aarch64-option-extensions.def | 2 +-
gcc/config/aarch64/aarch64-opts.h | 10 -
gcc/config/aarch64/aarch64-protos.h | 22 +-
gcc/config/aarch64/aarch64-simd.md | 6 +-
gcc/config/aarch64/aarch64.cc | 451 ++---
gcc/config/aarch64/aarch64.md | 7 +-
gcc/config/aarch64/aarch64.opt | 15 +-
gcc/config/aarch64/arm_neon.h | 35 +-
gcc/config/aarch64/t-aarch64 | 4 +-
gcc/config/alpha/linux.h | 2 +-
.../aarch-bti-insert.cc} | 72 +-
gcc/config/arm/aarch-common-protos.h | 12 +
gcc/config/arm/aarch-common.cc | 185 ++
gcc/config/arm/aarch-common.h | 73 +
gcc/config/arm/aout.h | 3 +-
gcc/config/arm/arm-c.cc | 18 +
gcc/config/arm/arm-cpus.in | 20 +
gcc/config/arm/arm-mlib.h | 22 +
gcc/config/arm/arm-passes.def | 21 +
gcc/config/arm/arm-protos.h | 5 +
gcc/config/arm/arm-tables.opt | 3 +
gcc/config/arm/arm-tune.md | 11 +-
gcc/config/arm/arm.cc | 254 ++-
gcc/config/arm/arm.h | 34 +-
gcc/config/arm/arm.md | 31 +
gcc/config/arm/arm.opt | 13 +
gcc/config/arm/arm_mve.h | 36 +-
gcc/config/arm/mve.md | 57 +-
gcc/config/arm/t-arm | 10 +
gcc/config/arm/t-rmprofile | 68 +-
gcc/config/arm/unspecs.md | 4 +
gcc/config/bpf/bpf.cc | 8 +
gcc/config/csky/csky-linux-elf.h | 3 +
gcc/config/i386/avx512erintrin.h | 18 +-
gcc/config/i386/cygwin.h | 2 +-
gcc/config/i386/darwin.h | 2 +-
gcc/config/i386/gnu64.h | 40 +
gcc/config/i386/i386-expand.cc | 16 +-
gcc/config/i386/i386.cc | 13 +
gcc/config/i386/i386.h | 6 +
gcc/config/i386/i386.opt | 2 +-
gcc/config/i386/mingw32.h | 2 +-
gcc/config/i386/x86-tune.def | 23 +-
gcc/config/ia64/linux.h | 2 +-
gcc/config/loongarch/gnu-user.h | 2 +-
gcc/config/loongarch/loongarch.cc | 14 +
gcc/config/mips/gnu-user.h | 2 +-
gcc/config/pru/pru.h | 5 +-
gcc/config/pru/pru.md | 15 +-
gcc/config/riscv/predicates.md | 4 +
gcc/config/riscv/riscv-passes.def | 2 +-
gcc/config/riscv/riscv-protos.h | 1 +
gcc/config/riscv/riscv-v.cc | 22 +
gcc/config/riscv/riscv-vector-builtins-bases.cc | 98 +-
gcc/config/riscv/riscv-vector-builtins-bases.h | 20 +
.../riscv/riscv-vector-builtins-functions.def | 20 +
gcc/config/riscv/riscv-vector-builtins-shapes.cc | 56 +-
gcc/config/riscv/riscv-vector-builtins-shapes.h | 1 +
gcc/config/riscv/riscv-vector-builtins-types.def | 15 +
gcc/config/riscv/riscv-vector-builtins.cc | 364 +++-
gcc/config/riscv/riscv-vector-builtins.def | 78 +-
gcc/config/riscv/riscv-vector-builtins.h | 44 +-
gcc/config/riscv/riscv-vsetvl.cc | 1885 ++++++++++++++----
gcc/config/riscv/riscv-vsetvl.h | 123 +-
gcc/config/riscv/vector-iterators.md | 93 +-
gcc/config/riscv/vector.md | 499 ++++-
gcc/config/rs6000/rs6000-overload.def | 2 +-
gcc/config/rs6000/rs6000.cc | 19 +-
gcc/config/s390/s390-d.cc | 9 +-
gcc/config/sol2.h | 2 +-
gcc/config/sparc/freebsd.h | 2 +-
gcc/config/sparc/linux.h | 2 +-
gcc/config/sparc/linux64.h | 2 +-
gcc/config/sparc/sp-elf.h | 2 +-
gcc/config/sparc/sp64-elf.h | 2 +-
gcc/config/v850/v850.cc | 1 -
gcc/config/xtensa/xtensa.md | 98 +-
gcc/cp/ChangeLog | 117 ++
gcc/cp/call.cc | 42 +-
gcc/cp/cp-gimplify.cc | 36 +-
gcc/cp/cp-tree.h | 1 +
gcc/cp/cvt.cc | 6 +-
gcc/cp/decl.cc | 6 +-
gcc/cp/init.cc | 2 +
gcc/cp/mangle.cc | 2 +-
gcc/cp/parser.cc | 162 +-
gcc/cp/pt.cc | 5 +
gcc/cp/tree.cc | 30 +-
gcc/doc/contrib.texi | 4 +
gcc/doc/extend.texi | 55 +-
gcc/doc/include/fdl.texi | 4 +-
gcc/doc/install.texi | 4 +-
gcc/doc/invoke.texi | 81 +-
gcc/doc/lto.texi | 12 +-
gcc/doc/options.texi | 6 +-
gcc/doc/sourcebuild.texi | 14 +-
gcc/doc/standards.texi | 4 +-
gcc/dominance.cc | 9 +-
gcc/dominance.h | 2 +-
gcc/fortran/ChangeLog | 90 +
gcc/fortran/ChangeLog-2022 | 2 +-
gcc/fortran/array.cc | 4 +-
gcc/fortran/check.cc | 2 +
gcc/fortran/data.cc | 7 -
gcc/fortran/dependency.cc | 5 +
gcc/fortran/expr.cc | 4 +-
gcc/fortran/interface.cc | 26 +-
gcc/fortran/iresolve.cc | 9 +-
gcc/fortran/match.cc | 10 +
gcc/fortran/parse.cc | 9 +-
gcc/fortran/primary.cc | 10 +-
gcc/fortran/resolve.cc | 33 +-
gcc/fortran/simplify.cc | 1 +
gcc/fortran/trans-openmp.cc | 2 +
gcc/function-tests.cc | 1 +
gcc/gcc.cc | 1 +
gcc/genmatch.cc | 15 +
gcc/gimple-predicate-analysis.cc | 6 +-
gcc/gimple-range-fold.cc | 3 +
gcc/gimple-ssa-store-merging.cc | 8 +-
gcc/ginclude/unwind-arm-common.h | 3 +-
gcc/go/ChangeLog | 6 +
gcc/go/go-gcc.cc | 10 +
gcc/ipa-modref.cc | 5 +-
gcc/ipa-sra.cc | 52 +-
gcc/ipa-utils.cc | 263 +++
gcc/ipa-utils.h | 2 +
gcc/lra-constraints.cc | 20 +-
gcc/m2/ChangeLog | 352 ++++
gcc/m2/Make-lang.in | 18 +-
gcc/m2/configure | 6 +-
gcc/m2/configure.ac | 4 +-
gcc/m2/gm2-compiler/DynamicStringPath.def | 113 ++
gcc/m2/gm2-compiler/DynamicStringPath.mod | 265 +++
gcc/m2/gm2-compiler/M2Comp.mod | 57 +-
gcc/m2/gm2-compiler/M2GCCDeclare.mod | 29 +-
gcc/m2/gm2-compiler/M2LexBuf.mod | 39 +-
gcc/m2/gm2-compiler/M2Options.def | 91 +-
gcc/m2/gm2-compiler/M2Options.mod | 151 +-
gcc/m2/gm2-compiler/M2Preprocess.def | 2 +-
gcc/m2/gm2-compiler/M2Preprocess.mod | 130 +-
gcc/m2/gm2-compiler/M2Quads.mod | 58 +-
gcc/m2/gm2-compiler/M2Search.def | 25 -
gcc/m2/gm2-compiler/M2Search.mod | 131 +-
gcc/m2/gm2-compiler/P2Build.bnf | 11 +-
gcc/m2/gm2-compiler/P2SymBuild.def | 8 +
gcc/m2/gm2-compiler/P2SymBuild.mod | 12 +
gcc/m2/gm2-compiler/SymbolTable.def | 18 +-
gcc/m2/gm2-compiler/SymbolTable.mod | 45 +
gcc/m2/gm2-gcc/init.cc | 2 +
gcc/m2/gm2-gcc/m2decl.cc | 3 +-
gcc/m2/gm2-gcc/m2decl.def | 3 +-
gcc/m2/gm2-gcc/m2decl.h | 3 +-
gcc/m2/gm2-gcc/m2except.cc | 17 +-
gcc/m2/gm2-gcc/m2options.h | 12 +-
gcc/m2/gm2-gcc/m2statement.cc | 17 -
gcc/m2/gm2-gcc/m2type.cc | 4 +
gcc/m2/gm2-lang.cc | 349 +++-
gcc/m2/gm2-libs-iso/M2RTS.def | 17 +-
gcc/m2/gm2-libs-iso/M2RTS.mod | 80 +-
gcc/m2/gm2-libs-iso/Preemptive.mod | 5 +-
gcc/m2/gm2-libs-iso/RTco.def | 4 +-
.../{gm2-libs-pim => gm2-libs-log}/BitBlockOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitBlockOps.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/BitByteOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitByteOps.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/BitWordOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitWordOps.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/BlockOps.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/BlockOps.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Break.c | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Break.def | 0
.../{gm2-libs-pim => gm2-libs-log}/CardinalIO.def | 0
.../{gm2-libs-pim => gm2-libs-log}/CardinalIO.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/Conversions.def | 0
.../{gm2-libs-pim => gm2-libs-log}/Conversions.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/DebugPMD.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/DebugPMD.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/DebugTrace.def | 0
.../{gm2-libs-pim => gm2-libs-log}/DebugTrace.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Delay.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Delay.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Display.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Display.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/ErrorCode.def | 0
.../{gm2-libs-pim => gm2-libs-log}/ErrorCode.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/FileSystem.def | 0
.../{gm2-libs-pim => gm2-libs-log}/FileSystem.mod | 0
.../FloatingUtilities.def | 0
.../FloatingUtilities.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/InOut.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/InOut.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Keyboard.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Keyboard.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/LongIO.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/LongIO.mod | 0
.../NumberConversion.def | 0
.../NumberConversion.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/README.texi | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Random.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Random.mod | 0
.../RealConversions.def | 0
.../RealConversions.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/RealInOut.def | 0
.../{gm2-libs-pim => gm2-libs-log}/RealInOut.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Strings.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Strings.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Termbase.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Termbase.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Terminal.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Terminal.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/TimeDate.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/TimeDate.mod | 0
gcc/m2/gm2-libs/Args.mod | 2 +-
gcc/m2/gm2-libs/DynamicStrings.mod | 8 -
gcc/m2/gm2-libs/M2Dependent.mod | 2 +-
gcc/m2/gm2-libs/M2RTS.def | 19 +-
gcc/m2/gm2-libs/M2RTS.mod | 80 +-
gcc/m2/gm2-libs/config-host | 6 +-
gcc/m2/{gm2config.h.in => gm2config.aci.in} | 2 +-
gcc/m2/gm2spec.cc | 371 ++--
gcc/m2/lang-specs.h | 42 +-
gcc/m2/lang.opt | 200 +-
gcc/m2/m2.flex | 73 +-
gcc/m2/m2pp.cc | 2 +
gcc/m2/mc-boot-ch/Glibc.c | 14 +
gcc/m2/mc-boot/GArgs.c | 2 +-
gcc/m2/mc-boot/GDynamicStrings.c | 42 +-
gcc/m2/mc-boot/GFIO.c | 14 +-
gcc/m2/mc-boot/GFormatStrings.c | 2 +-
gcc/m2/mc-boot/GIndexing.c | 6 +-
gcc/m2/mc-boot/GM2Dependent.c | 49 +-
gcc/m2/mc-boot/GM2EXCEPTION.c | 4 +-
gcc/m2/mc-boot/GM2RTS.c | 121 +-
gcc/m2/mc-boot/GM2RTS.h | 15 +-
gcc/m2/mc-boot/GPushBackInput.c | 6 +-
gcc/m2/mc-boot/GRTExceptions.c | 34 +-
gcc/m2/mc-boot/GRTint.c | 20 +-
gcc/m2/mc-boot/GStdIO.c | 4 +-
gcc/m2/mc-boot/GStringConvert.c | 4 +-
gcc/m2/mc-boot/GSysStorage.c | 6 +-
gcc/m2/mc-boot/Gdecl.c | 161 +-
gcc/m2/mc-boot/Gkeyc.c | 6 +-
gcc/m2/mc-boot/GmcComment.c | 2 +-
gcc/m2/mc-boot/GmcComp.c | 4 +-
gcc/m2/mc-boot/GmcDebug.c | 2 +-
gcc/m2/mc-boot/GmcMetaError.c | 8 +-
gcc/m2/mc-boot/GmcOptions.c | 44 +-
gcc/m2/mc-boot/GmcStack.c | 4 +-
gcc/m2/mc-boot/GnameKey.c | 4 +-
gcc/m2/mc-boot/GsymbolKey.c | 6 +-
gcc/m2/mc/decl.mod | 4 +-
gcc/m2/mc/keyc.mod | 6 +-
gcc/m2/mc/mcOptions.mod | 45 +-
gcc/m2/pge-boot/GArgs.c | 2 +-
gcc/m2/pge-boot/GDynamicStrings.c | 42 +-
gcc/m2/pge-boot/GFIO.c | 6 +-
gcc/m2/pge-boot/GIndexing.c | 6 +-
gcc/m2/pge-boot/GM2Dependent.c | 2 +-
gcc/m2/pge-boot/GM2EXCEPTION.c | 4 +-
gcc/m2/pge-boot/GM2RTS.c | 121 +-
gcc/m2/pge-boot/GNameKey.c | 4 +-
gcc/m2/pge-boot/GPushBackInput.c | 6 +-
gcc/m2/pge-boot/GRTExceptions.c | 34 +-
gcc/m2/pge-boot/GStdIO.c | 4 +-
gcc/m2/pge-boot/GSymbolKey.c | 6 +-
gcc/m2/pge-boot/GSysStorage.c | 6 +-
gcc/m2/tools-src/makeSystem | 17 +-
gcc/match.pd | 14 +
gcc/omp-expand.cc | 4 +-
gcc/optc-save-gen.awk | 2 +-
gcc/opts.cc | 9 +-
gcc/range-op-float.cc | 40 +-
gcc/range-op.cc | 4 +-
gcc/sched-deps.cc | 36 +-
gcc/selftest.h | 1 +
gcc/testsuite/ChangeLog | 2019 ++++++++++++++++++++
gcc/testsuite/ChangeLog-2022 | 2 +-
.../c-c++-common/asan/pointer-subtract-5.c | 15 +
.../c-c++-common/asan/pointer-subtract-6.c | 15 +
.../c-c++-common/asan/pointer-subtract-7.c | 15 +
.../c-c++-common/asan/pointer-subtract-8.c | 15 +
gcc/testsuite/c-c++-common/hwasan/arguments-3.c | 6 +-
gcc/testsuite/c-c++-common/rotate-10.c | 53 +
gcc/testsuite/c-c++-common/rotate-11.c | 53 +
gcc/testsuite/c-c++-common/rotate-2.c | 32 +
gcc/testsuite/c-c++-common/rotate-2b.c | 100 +
gcc/testsuite/c-c++-common/rotate-4.c | 32 +
gcc/testsuite/c-c++-common/rotate-4b.c | 100 +
gcc/testsuite/g++.dg/cet-notrack-1.C | 4 +-
gcc/testsuite/g++.dg/cpp0x/initlist-vect2.C | 16 +
gcc/testsuite/g++.dg/cpp0x/move2.C | 14 +
gcc/testsuite/g++.dg/cpp0x/udlit-error1.C | 21 +
gcc/testsuite/g++.dg/cpp1z/decomp57.C | 27 +
gcc/testsuite/g++.dg/cpp1z/decomp58.C | 39 +
gcc/testsuite/g++.dg/cpp23/static-operator-call5.C | 13 +
gcc/testsuite/g++.dg/cpp23/subscript12.C | 34 +
gcc/testsuite/g++.dg/cpp23/subscript13.C | 43 +
gcc/testsuite/g++.dg/ext/builtin-shufflevector-5.C | 14 +
gcc/testsuite/g++.dg/ext/pragma1.C | 4 +
gcc/testsuite/g++.dg/gomp/pr108503.C | 27 +
gcc/testsuite/g++.dg/init/lifetime4.C | 39 +
gcc/testsuite/g++.dg/init/new51.C | 11 +
gcc/testsuite/g++.dg/init/pr53932.C | 25 +
.../g++.dg/template/explicit-instantiation5.C | 15 +
gcc/testsuite/g++.dg/tree-ssa/pr106077.C | 22 +
gcc/testsuite/g++.dg/warn/Wunused-value-1.C | 12 +
.../bitfield-abi-warning-align16-O2-extra.C | 2 +-
.../aarch64/bitfield-abi-warning-align16-O2.C | 2 +-
.../bitfield-abi-warning-align32-O2-extra.C | 2 +-
.../aarch64/bitfield-abi-warning-align32-O2.C | 2 +-
.../aarch64/bitfield-abi-warning-align8-O2.C | 2 +-
gcc/testsuite/g++.target/aarch64/sve/pr99766.C | 2 +-
gcc/testsuite/g++.target/arm/pac-1.C | 35 +
gcc/testsuite/g++.target/i386/pr105980.C | 8 +
.../g++.target/riscv/rvv/base/riscv_vector.h | 11 +
gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C | 345 ++++
gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vle_tum-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vle_tumu-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vloxei16-1.C | 660 +++++++
.../g++.target/riscv/rvv/base/vloxei16-2.C | 660 +++++++
.../g++.target/riscv/rvv/base/vloxei16-3.C | 660 +++++++
.../g++.target/riscv/rvv/base/vloxei16_mu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_mu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_mu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tum-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tum-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tum-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tumu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tumu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei16_tumu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vloxei32-1.C | 608 ++++++
.../g++.target/riscv/rvv/base/vloxei32-2.C | 608 ++++++
.../g++.target/riscv/rvv/base/vloxei32-3.C | 608 ++++++
.../g++.target/riscv/rvv/base/vloxei32_mu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_mu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_mu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tum-1.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tum-2.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tum-3.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tumu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tumu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei32_tumu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vloxei64-1.C | 518 +++++
.../g++.target/riscv/rvv/base/vloxei64-2.C | 518 +++++
.../g++.target/riscv/rvv/base/vloxei64-3.C | 518 +++++
.../g++.target/riscv/rvv/base/vloxei64_mu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_mu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_mu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tum-1.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tum-2.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tum-3.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tumu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tumu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei64_tumu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vloxei8-1.C | 686 +++++++
.../g++.target/riscv/rvv/base/vloxei8-2.C | 686 +++++++
.../g++.target/riscv/rvv/base/vloxei8-3.C | 686 +++++++
.../g++.target/riscv/rvv/base/vloxei8_mu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_mu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_mu-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tu-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tum-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tum-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tum-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tumu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tumu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vloxei8_tumu-3.C | 346 ++++
gcc/testsuite/g++.target/riscv/rvv/base/vlse-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vlse_tu-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vlse_tum-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vlse_tumu-1.C | 345 ++++
.../g++.target/riscv/rvv/base/vluxei16-1.C | 660 +++++++
.../g++.target/riscv/rvv/base/vluxei16-2.C | 660 +++++++
.../g++.target/riscv/rvv/base/vluxei16-3.C | 660 +++++++
.../g++.target/riscv/rvv/base/vluxei16_mu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_mu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_mu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tum-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tum-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tum-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tumu-1.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tumu-2.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei16_tumu-3.C | 333 ++++
.../g++.target/riscv/rvv/base/vluxei32-1.C | 608 ++++++
.../g++.target/riscv/rvv/base/vluxei32-2.C | 608 ++++++
.../g++.target/riscv/rvv/base/vluxei32-3.C | 608 ++++++
.../g++.target/riscv/rvv/base/vluxei32_mu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_mu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_mu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tum-1.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tum-2.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tum-3.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tumu-1.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tumu-2.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei32_tumu-3.C | 307 +++
.../g++.target/riscv/rvv/base/vluxei64-1.C | 518 +++++
.../g++.target/riscv/rvv/base/vluxei64-2.C | 518 +++++
.../g++.target/riscv/rvv/base/vluxei64-3.C | 518 +++++
.../g++.target/riscv/rvv/base/vluxei64_mu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_mu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_mu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tum-1.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tum-2.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tum-3.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tumu-1.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tumu-2.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei64_tumu-3.C | 262 +++
.../g++.target/riscv/rvv/base/vluxei8-1.C | 686 +++++++
.../g++.target/riscv/rvv/base/vluxei8-2.C | 686 +++++++
.../g++.target/riscv/rvv/base/vluxei8-3.C | 686 +++++++
.../g++.target/riscv/rvv/base/vluxei8_mu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_mu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_mu-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tu-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tum-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tum-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tum-3.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tumu-1.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tumu-2.C | 346 ++++
.../g++.target/riscv/rvv/base/vluxei8_tumu-3.C | 346 ++++
gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C | 685 +++++++
gcc/testsuite/g++.target/riscv/rvv/base/vsm-1.C | 40 +
.../g++.target/riscv/rvv/base/vsoxei16-1.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsoxei16-2.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsoxei16-3.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsoxei32-1.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsoxei32-2.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsoxei32-3.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsoxei64-1.C | 518 +++++
.../g++.target/riscv/rvv/base/vsoxei64-2.C | 518 +++++
.../g++.target/riscv/rvv/base/vsoxei64-3.C | 518 +++++
.../g++.target/riscv/rvv/base/vsoxei8-1.C | 686 +++++++
.../g++.target/riscv/rvv/base/vsoxei8-2.C | 686 +++++++
.../g++.target/riscv/rvv/base/vsoxei8-3.C | 686 +++++++
gcc/testsuite/g++.target/riscv/rvv/base/vsse-1.C | 685 +++++++
.../g++.target/riscv/rvv/base/vsuxei16-1.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsuxei16-2.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsuxei16-3.C | 660 +++++++
.../g++.target/riscv/rvv/base/vsuxei32-1.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsuxei32-2.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsuxei32-3.C | 608 ++++++
.../g++.target/riscv/rvv/base/vsuxei64-1.C | 518 +++++
.../g++.target/riscv/rvv/base/vsuxei64-2.C | 518 +++++
.../g++.target/riscv/rvv/base/vsuxei64-3.C | 518 +++++
.../g++.target/riscv/rvv/base/vsuxei8-1.C | 686 +++++++
.../g++.target/riscv/rvv/base/vsuxei8-2.C | 686 +++++++
.../g++.target/riscv/rvv/base/vsuxei8-3.C | 686 +++++++
gcc/testsuite/g++.target/riscv/rvv/rvv.exp | 44 +
gcc/testsuite/gcc.c-torture/compile/pr108596.c | 26 +
.../gcc.c-torture/execute/ieee/pr108540-1.c | 84 +
.../gcc.c-torture/execute/ieee/pr108540-2.c | 23 +
gcc/testsuite/gcc.c-torture/execute/pr106523.c | 22 +
gcc/testsuite/gcc.c-torture/execute/pr108498-1.c | 82 +
gcc/testsuite/gcc.c-torture/execute/pr108498-2.c | 91 +
.../gcc.dg/analyzer/SARD-tc117-basic-00001-min.c | 67 +
.../analyzer/SARD-tc1909-stack_overflow_loop.c | 29 +
.../gcc.dg/analyzer/SARD-tc249-basic-00034-min.c | 67 +
.../gcc.dg/analyzer/SARD-tc293-basic-00045-min.c | 69 +
.../gcc.dg/analyzer/SARD-tc841-basic-00182-min.c | 76 +
.../gcc.dg/analyzer/deref-before-check-1.c | 36 +
.../analyzer/deref-before-check-pr108455-1.c | 36 +
...deref-before-check-pr108455-git-pack-revindex.c | 133 ++
.../analyzer/infinite-recursion-pr108524-1.c | 145 ++
.../analyzer/infinite-recursion-pr108524-2.c | 113 ++
...finite-recursion-pr108524-qobject-json-parser.c | 322 ++++
gcc/testsuite/gcc.dg/attr-aligned.c | 3 +
.../gcc.dg/builtin-dynamic-object-size-0.c | 83 +
gcc/testsuite/gcc.dg/c2x-auto-1.c | 4 +-
gcc/testsuite/gcc.dg/c2x-auto-3.c | 7 +
gcc/testsuite/gcc.dg/c2x-nullptr-6.c | 33 +
gcc/testsuite/gcc.dg/guality/pr36728-2.c | 28 +-
gcc/testsuite/gcc.dg/guality/pr54519-1.c | 6 +-
gcc/testsuite/gcc.dg/guality/pr54519-3.c | 6 +-
gcc/testsuite/gcc.dg/guality/pr54693-2.c | 4 +-
gcc/testsuite/gcc.dg/guality/sra-1.c | 2 +-
gcc/testsuite/gcc.dg/ipa/ipa-sra-30.c | 31 +
gcc/testsuite/gcc.dg/ipa/ipa-sra-31.c | 4 +
gcc/testsuite/gcc.dg/lto/pr108445_0.c | 4 +
gcc/testsuite/gcc.dg/lto/pr108445_1.c | 19 +
gcc/testsuite/gcc.dg/pr106061.c | 18 +
gcc/testsuite/gcc.dg/pr108306.c | 29 +
gcc/testsuite/gcc.dg/pr108447.c | 33 +
gcc/testsuite/gcc.dg/pr108449.c | 5 +
gcc/testsuite/gcc.dg/pr108582-1.c | 58 +
gcc/testsuite/gcc.dg/pr95115.c | 2 +-
gcc/testsuite/gcc.dg/torture/pr108482.c | 18 +
gcc/testsuite/gcc.dg/torture/pr108523.c | 16 +
gcc/testsuite/gcc.dg/torture/pr108574-1.c | 19 +
gcc/testsuite/gcc.dg/torture/pr108574-2.c | 25 +
gcc/testsuite/gcc.dg/torture/pr108574-3.c | 27 +
gcc/testsuite/gcc.dg/tree-ssa/modref-dse-7.c | 22 +
gcc/testsuite/gcc.dg/uninit-pr108547.c | 24 +
...st-math-bb-slp-complex-add-pattern-half-float.c | 2 +-
.../complex/fast-math-complex-add-half-float.c | 4 +-
gcc/testsuite/gcc.dg/vect/vect-bitfield-write-2.c | 1 +
gcc/testsuite/gcc.dg/vect/vect-bitfield-write-3.c | 1 +
gcc/testsuite/gcc.dg/vect/vect-fmax-1.c | 2 +
gcc/testsuite/gcc.dg/vect/vect-fmax-2.c | 2 +
gcc/testsuite/gcc.dg/vect/vect-fmax-3.c | 2 +
gcc/testsuite/gcc.dg/vect/vect-fmin-1.c | 2 +
gcc/testsuite/gcc.dg/vect/vect-fmin-2.c | 2 +
gcc/testsuite/gcc.dg/vect/vect-fmin-3.c | 2 +
gcc/testsuite/gcc.target/aarch64/acle/pmull64.c | 14 +
gcc/testsuite/gcc.target/aarch64/aes-fuse-1.c | 4 +-
gcc/testsuite/gcc.target/aarch64/aes-fuse-2.c | 4 +-
gcc/testsuite/gcc.target/aarch64/aes_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/aes_2.c | 4 +-
gcc/testsuite/gcc.target/aarch64/aes_xor_combine.c | 2 +-
.../gcc.target/aarch64/bfloat16_scalar_typecheck.c | 4 +-
.../bitfield-abi-warning-align16-O2-extra.c | 2 +-
.../aarch64/bitfield-abi-warning-align16-O2.c | 2 +-
.../bitfield-abi-warning-align32-O2-extra.c | 2 +-
.../aarch64/bitfield-abi-warning-align32-O2.c | 2 +-
.../aarch64/bitfield-abi-warning-align8-O2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sha1_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sha256_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c | 27 +-
gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c | 27 +-
gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c | 12 +-
.../gcc.target/aarch64/simd/vmul_n_f64_1.c | 12 +-
.../gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c | 20 +-
.../gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c | 20 +-
.../gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c | 20 +-
.../gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c | 21 +-
.../gcc.target/aarch64/simd/vqdmulhh_lane_s16.c | 15 +-
.../gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c | 18 +-
.../gcc.target/aarch64/simd/vqdmulhs_lane_s32.c | 33 +-
.../gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c | 18 +-
.../gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c | 15 +-
.../aarch64/simd/vqrdmulhh_laneq_s16_1.c | 18 +-
.../gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c | 15 +-
.../aarch64/simd/vqrdmulhs_laneq_s32_1.c | 18 +-
.../aarch64/sve/acle/general-c/sizeless-1.c | 3 +-
.../aarch64/sve/acle/general-c/sizeless-2.c | 3 +-
gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_6.c | 2 +-
.../gcc.target/aarch64/sve/cond_unary_5.c | 2 +-
.../gcc.target/aarch64/sve/cond_unary_6.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c | 2 +-
.../gcc.target/aarch64/sve/cond_xorsign_1.c | 34 +
.../gcc.target/aarch64/sve/cond_xorsign_2.c | 17 +
gcc/testsuite/gcc.target/aarch64/sve/slp_13.c | 11 +-
.../gcc.target/aarch64/sve/vcond_4_costly.c | 4 +-
.../gcc.target/aarch64/target_attr_crypto_ice_1.c | 2 +-
.../gcc.target/arm/acle/pacbti-m-predef-1.c | 17 +
.../gcc.target/arm/acle/pacbti-m-predef-10.c | 11 +
.../gcc.target/arm/acle/pacbti-m-predef-11.c | 11 +
.../gcc.target/arm/acle/pacbti-m-predef-12.c | 11 +
.../gcc.target/arm/acle/pacbti-m-predef-2.c | 24 +
.../gcc.target/arm/acle/pacbti-m-predef-3.c | 17 +
.../gcc.target/arm/acle/pacbti-m-predef-4.c | 20 +
.../gcc.target/arm/acle/pacbti-m-predef-5.c | 25 +
.../gcc.target/arm/acle/pacbti-m-predef-6.c | 16 +
.../gcc.target/arm/acle/pacbti-m-predef-7.c | 17 +
.../gcc.target/arm/acle/pacbti-m-predef-8.c | 12 +
.../gcc.target/arm/acle/pacbti-m-predef-9.c | 11 +
gcc/testsuite/gcc.target/arm/bti-1.c | 12 +
gcc/testsuite/gcc.target/arm/bti-2.c | 58 +
gcc/testsuite/gcc.target/arm/multilib.exp | 33 +
.../arm/mve/general/preserve_user_namespace_1.c | 6 +
.../intrinsics/mve_intrinsic_type_overloads-fp.c | 65 +
.../intrinsics/mve_intrinsic_type_overloads-int.c | 45 +
.../arm/mve/intrinsics/vcaddq_rot270_f16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_f32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_s32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_s8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_u16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_u32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_u16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_u32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vclsq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_m_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot180_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot270_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot270_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 +-
.../arm/mve/intrinsics/vmladavaxq_p_s16.c | 8 +
.../arm/mve/intrinsics/vmladavaxq_p_s32.c | 8 +
.../arm/mve/intrinsics/vmladavaxq_p_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_u16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_u32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_m_s16.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 +-
.../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +-
.../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c | 24 +-
.../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +-
.../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c | 24 +-
.../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 +-
.../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 +-
.../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 +-
.../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 +-
.../arm/mve/intrinsics/vmullbq_poly_p16.c | 24 +-
.../arm/mve/intrinsics/vmullbq_poly_p8.c | 24 +-
.../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 33 +-
.../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_m_s16.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_m_s32.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_m_s8.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_m_u16.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_m_u32.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_m_u8.c | 34 +-
.../arm/mve/intrinsics/vmulltq_int_s16.c | 24 +-
.../arm/mve/intrinsics/vmulltq_int_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c | 24 +-
.../arm/mve/intrinsics/vmulltq_int_u16.c | 24 +-
.../arm/mve/intrinsics/vmulltq_int_u32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c | 24 +-
.../arm/mve/intrinsics/vmulltq_int_x_s16.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_x_s32.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_x_s8.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_x_u16.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_x_u32.c | 33 +-
.../arm/mve/intrinsics/vmulltq_int_x_u8.c | 33 +-
.../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 34 +-
.../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 34 +-
.../arm/mve/intrinsics/vmulltq_poly_p16.c | 24 +-
.../arm/mve/intrinsics/vmulltq_poly_p8.c | 24 +-
.../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 33 +-
.../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vnegq_m_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_m_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vnegq_x_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_x_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vnegq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 8 +
.../arm/mve/intrinsics/vqdmladhq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqdmladhq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c | 24 +-
.../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 8 +
.../arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 8 +
.../arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 8 +
.../arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 8 +
.../arm/mve/intrinsics/vqdmlashq_n_s16.c | 8 +
.../arm/mve/intrinsics/vqdmlashq_n_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c | 8 +
.../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c | 24 +-
.../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 24 +-
.../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c | 24 +-
.../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 34 +-
.../arm/mve/intrinsics/vqrdmladhxq_s16.c | 24 +-
.../arm/mve/intrinsics/vqrdmladhxq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c | 24 +-
.../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 32 +-
.../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 32 +-
.../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 32 +-
.../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c | 24 +-
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 34 +-
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 34 +-
.../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 24 +-
.../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 24 +-
.../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 34 +-
.../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 34 +-
.../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 34 +-
.../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c | 34 +-
.../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 24 +-
.../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 8 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c | 8 +
gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-1.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-10.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-11.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-12.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-13.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-14.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-2.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-3.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-4.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-5.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-6.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-7.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-8.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c | 6 +
gcc/testsuite/gcc.target/arm/mve/pr108177-9.c | 20 +
gcc/testsuite/gcc.target/arm/mve/pr108177-main.x | 31 +
gcc/testsuite/gcc.target/arm/mve/pr108177.x | 9 +
gcc/testsuite/gcc.target/arm/pac-1.c | 11 +
gcc/testsuite/gcc.target/arm/pac-10.c | 10 +
gcc/testsuite/gcc.target/arm/pac-11.c | 10 +
gcc/testsuite/gcc.target/arm/pac-12.c | 7 +
gcc/testsuite/gcc.target/arm/pac-13.c | 7 +
gcc/testsuite/gcc.target/arm/pac-14.c | 7 +
gcc/testsuite/gcc.target/arm/pac-15.c | 32 +
gcc/testsuite/gcc.target/arm/pac-2.c | 11 +
gcc/testsuite/gcc.target/arm/pac-3.c | 11 +
gcc/testsuite/gcc.target/arm/pac-4.c | 10 +
gcc/testsuite/gcc.target/arm/pac-5.c | 28 +
gcc/testsuite/gcc.target/arm/pac-6.c | 18 +
gcc/testsuite/gcc.target/arm/pac-7.c | 32 +
gcc/testsuite/gcc.target/arm/pac-8.c | 34 +
gcc/testsuite/gcc.target/arm/pac-9.c | 11 +
gcc/testsuite/gcc.target/arm/pac.h | 17 +
gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 +-
gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 4 +-
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 +-
gcc/testsuite/gcc.target/i386/avx2-pr108599.c | 32 +
gcc/testsuite/gcc.target/i386/pr106746.c | 29 +
gcc/testsuite/gcc.target/i386/pr108436.c | 15 +
gcc/testsuite/gcc.target/i386/sse-23.c | 2 +-
.../loongarch/{tst-asm-const.c => pr107731.c} | 6 +-
gcc/testsuite/gcc.target/pdp11/pdp11.exp | 41 +
gcc/testsuite/gcc.target/pdp11/pr108388.c | 90 +
gcc/testsuite/gcc.target/powerpc/pr108348-1.c | 23 +
gcc/testsuite/gcc.target/powerpc/pr108348-2.c | 23 +
gcc/testsuite/gcc.target/powerpc/pr108396.c | 14 +
gcc/testsuite/gcc.target/pru/clz-hi-2.c | 24 +
gcc/testsuite/gcc.target/pru/clz-hi.c | 35 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle-constraint-1.c | 12 +-
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-3.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-1.c | 344 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-2.c | 344 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-3.c | 344 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tum-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tum-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tum-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tumu-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tumu-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vle_tumu-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlm_vsm-1.c | 75 +
.../gcc.target/riscv/rvv/base/vlm_vsm-2.c | 75 +
.../gcc.target/riscv/rvv/base/vlm_vsm-3.c | 75 +
.../gcc.target/riscv/rvv/base/vloxei16_v-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_m-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_m-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_m-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_mu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_mu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_mu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tum-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tum-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tum-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tumu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tumu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei16_v_tumu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vloxei32_v-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_m-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_m-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_m-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_mu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_mu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_mu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tum-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tum-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tum-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tumu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tumu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei32_v_tumu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vloxei64_v-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_m-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_m-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_m-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_mu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_mu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_mu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tum-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tum-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tum-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tumu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tumu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei64_v_tumu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vloxei8_v-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_m-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_m-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_m-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_mu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_mu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_mu-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tu-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tum-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tum-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tum-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tumu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tumu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vloxei8_v_tumu-3.c | 346 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-3.c | 345 ++++
.../riscv/rvv/base/vlse-vsse-constraint-1.c | 113 ++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_mu-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_mu-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_mu-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tu-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tu-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tu-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tum-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tum-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tum-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tumu-1.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tumu-2.c | 345 ++++
.../gcc.target/riscv/rvv/base/vlse_tumu-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_m-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_m-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_m-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_mu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_mu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_mu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tum-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tum-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tum-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vluxei32_v-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_m-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_m-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_m-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vluxei64_v-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_m-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_m-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_m-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tum-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tum-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tum-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tumu-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tumu-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vluxei8_v-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_m-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_m-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_m-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_mu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_mu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_mu-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tum-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tum-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tum-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-3.c | 346 ++++
.../riscv/rvv/base/vlxei-vsxei-constraint-1.c | 121 ++
gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vse-constraint-1.c | 97 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsoxei32_v-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei32_v-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei32_v-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vsoxei8_v-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsoxei8_v-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsoxei8_v-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-3.c | 346 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-3.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-1.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-2.c | 345 ++++
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-3.c | 345 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-1.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-2.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-3.c | 333 ++++
.../gcc.target/riscv/rvv/base/vsuxei32_v-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei32_v-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei32_v-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-1.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-2.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-3.c | 307 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-1.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-2.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-3.c | 262 +++
.../gcc.target/riscv/rvv/base/vsuxei8_v-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsuxei8_v-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsuxei8_v-3.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-1.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-2.c | 346 ++++
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-3.c | 346 ++++
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c | 35 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c | 73 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c | 39 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c | 46 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c | 66 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c | 67 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c | 67 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c | 35 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c | 39 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c | 38 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c | 39 +
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c | 74 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-1.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-10.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-11.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-12.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-13.c | 28 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-14.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-15.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-16.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-17.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-18.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-19.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-2.c | 18 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-20.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-21.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-22.c | 42 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-23.c | 34 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-24.c | 36 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-25.c | 38 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-26.c | 35 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-27.c | 36 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-28.c | 30 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-29.c | 31 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-3.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-30.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-31.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-32.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-33.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-34.c | 28 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-35.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-36.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-37.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-38.c | 57 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-39.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-4.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-40.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-41.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-42.c | 15 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-43.c | 16 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-44.c | 18 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-45.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-46.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-47.c | 35 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-48.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-49.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-5.c | 18 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-50.c | 23 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-51.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-52.c | 34 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-53.c | 31 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-54.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-55.c | 38 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-56.c | 38 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-57.c | 43 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-58.c | 43 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-59.c | 31 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-6.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-60.c | 30 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-61.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-62.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-63.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-64.c | 41 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-65.c | 33 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-66.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-67.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-68.c | 26 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-69.c | 40 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-7.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-70.c | 46 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-71.c | 54 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-72.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-73.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-74.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-75.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-76.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-77.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-8.c | 18 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-9.c | 57 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c | 32 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c | 42 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c | 42 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c | 31 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c | 33 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c | 30 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c | 31 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c | 37 +
.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c | 37 +
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c | 26 +
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c | 36 +
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c | 43 +
.../riscv/rvv/vsetvl/imm_loop_invariant-1.c | 195 ++
.../riscv/rvv/vsetvl/imm_loop_invariant-10.c | 41 +
.../riscv/rvv/vsetvl/imm_loop_invariant-11.c | 41 +
.../riscv/rvv/vsetvl/imm_loop_invariant-12.c | 28 +
.../riscv/rvv/vsetvl/imm_loop_invariant-13.c | 30 +
.../riscv/rvv/vsetvl/imm_loop_invariant-14.c | 31 +
.../riscv/rvv/vsetvl/imm_loop_invariant-15.c | 32 +
.../riscv/rvv/vsetvl/imm_loop_invariant-16.c | 29 +
.../riscv/rvv/vsetvl/imm_loop_invariant-17.c | 22 +
.../riscv/rvv/vsetvl/imm_loop_invariant-2.c | 168 ++
.../riscv/rvv/vsetvl/imm_loop_invariant-3.c | 141 ++
.../riscv/rvv/vsetvl/imm_loop_invariant-4.c | 77 +
.../riscv/rvv/vsetvl/imm_loop_invariant-5.c | 114 ++
.../riscv/rvv/vsetvl/imm_loop_invariant-6.c | 64 +
.../riscv/rvv/vsetvl/imm_loop_invariant-7.c | 39 +
.../riscv/rvv/vsetvl/imm_loop_invariant-8.c | 45 +
.../riscv/rvv/vsetvl/imm_loop_invariant-9.c | 41 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-1.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-2.c | 28 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-3.c | 189 ++
.../gcc.target/riscv/rvv/vsetvl/imm_switch-4.c | 26 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-5.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-6.c | 30 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-7.c | 29 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-8.c | 35 +
.../gcc.target/riscv/rvv/vsetvl/imm_switch-9.c | 47 +
.../riscv/rvv/vsetvl/vlmax_back_prop-13.c | 6 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-27.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-45.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c | 6 -
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c | 6 -
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c | 1 -
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c | 7 -
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c | 14 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c | 14 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c | 14 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c | 1 -
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c | 1 -
.../riscv/rvv/vsetvl/vlmax_miss_default-1.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-10.c | 1 -
.../riscv/rvv/vsetvl/vlmax_miss_default-11.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-12.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-13.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-14.c | 8 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-2.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-3.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-4.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-5.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-6.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-7.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-8.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-9.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c | 1 -
.../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/vsetvl-1.c | 16 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-10.c | 20 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-11.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-12.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-13.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-14.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-15.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-16.c | 20 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-17.c | 14 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-18.c | 20 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-19.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-2.c | 20 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-20.c | 23 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-3.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-4.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-5.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-6.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-7.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-8.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-9.c | 20 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c | 17 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c | 23 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c | 23 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c | 26 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c | 27 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c | 18 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c | 23 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c | 14 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c | 16 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c | 19 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c | 16 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c | 21 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c | 24 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c | 22 +
.../gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c | 23 +
.../gfortran.dg/ISO_Fortran_binding_17.f90 | 8 +-
gcc/testsuite/gfortran.dg/array_temporaries_2.f90 | 2 +-
gcc/testsuite/gfortran.dg/bind-c-contiguous-1.f90 | 400 ++--
gcc/testsuite/gfortran.dg/bind-c-contiguous-4.f90 | 400 ++--
gcc/testsuite/gfortran.dg/bind-c-contiguous-5.f90 | 400 ++--
gcc/testsuite/gfortran.dg/common_27.f90 | 14 +
gcc/testsuite/gfortran.dg/fmt_error_4.f90 | 2 +-
gcc/testsuite/gfortran.dg/fmt_error_5.f90 | 2 +-
gcc/testsuite/gfortran.dg/fmt_float.f90 | 36 +-
gcc/testsuite/gfortran.dg/fmt_l.f90 | 32 +-
gcc/testsuite/gfortran.dg/fmt_nonchar_2.f90 | 2 +-
gcc/testsuite/gfortran.dg/fmt_zero_precision.f90 | 74 +-
.../gfortran.dg/g77/f77-edit-apostrophe-out.f | 10 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-colon-out.f | 2 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-h-out.f | 6 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-i-out.f | 30 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-s-out.f | 10 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-slash-out.f | 2 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-t-out.f | 6 +-
gcc/testsuite/gfortran.dg/g77/f77-edit-x-out.f | 4 +-
.../gfortran.dg/gomp/declare-variant-10.f90 | 4 +-
.../gfortran.dg/gomp/declare-variant-11.f90 | 4 +-
.../gfortran.dg/gomp/declare-variant-12.f90 | 4 +-
gcc/testsuite/gfortran.dg/gomp/minmaxloc_1.f90 | 32 +
gcc/testsuite/gfortran.dg/namelist_40.f90 | 8 +-
gcc/testsuite/gfortran.dg/namelist_47.f90 | 8 +-
gcc/testsuite/gfortran.dg/namelist_print_1.f | 2 +-
.../gfortran.dg/parameter_array_dummy.f90 | 10 +-
gcc/testsuite/gfortran.dg/parameter_data0.f90 | 6 +
gcc/testsuite/gfortran.dg/pr103506_1.f90 | 9 +
gcc/testsuite/gfortran.dg/pr108420.f90 | 10 +
gcc/testsuite/gfortran.dg/pr108421.f90 | 11 +
gcc/testsuite/gfortran.dg/pr108434.f90 | 11 +
gcc/testsuite/gfortran.dg/pr108501.f90 | 14 +
gcc/testsuite/gfortran.dg/pr108502.f90 | 12 +
gcc/testsuite/gfortran.dg/pr108527.f90 | 10 +
gcc/testsuite/gfortran.dg/pr108528.f90 | 9 +
gcc/testsuite/gfortran.dg/pr108529.f90 | 9 +
gcc/testsuite/gfortran.dg/pr108544.f90 | 11 +
gcc/testsuite/gfortran.dg/pr88048.f90 | 2 +-
gcc/testsuite/gfortran.dg/pr96102b.f90 | 24 +
gcc/testsuite/gm2/case/pass/case-pass.exp | 2 +-
gcc/testsuite/gm2/complex/pass/complex-pass.exp | 2 +-
.../gm2/complex/run/pass/complex-run-pass.exp | 1 -
.../pim/run/pass/coroutines-pim-run-pass.exp | 2 +-
.../gm2/iso/analysis/fail/iso-analysis-fail.exp | 2 +-
.../gm2/iso/check/fail/iso-check-fail.exp | 2 +-
gcc/testsuite/gm2/iso/fail/iso-fail.exp | 2 +-
gcc/testsuite/gm2/iso/pass/iso-pass.exp | 2 +-
gcc/testsuite/gm2/iso/run/pass/iso-run-pass.exp | 1 -
.../gm2/isolib/run/pass/isolib-run-pass.exp | 2 +-
.../pass/link-externalscaffold-pass.exp | 1 -
gcc/testsuite/gm2/pim/fail/empty.mod | 1 +
gcc/testsuite/gm2/pim/fail/pim-fail.exp | 2 +-
gcc/testsuite/gm2/pim/pass/pim-pass.exp | 2 +-
.../logitech/run/pass/pimlib-logitech-run-pass.exp | 4 +-
gcc/testsuite/gm2/pimlib/pass/pimlib-pass.exp | 2 +-
.../gm2/pimlib/run/pass/pimlib-run-pass.exp | 4 +-
.../run/pass/halma/projects-iso-run-pass-halma.exp | 3 +-
.../run/pass/hello/projects-iso-run-pass-hello.exp | 3 +-
.../run/pass/hello/projects-log-run-pass-hello.exp | 3 +-
.../run/pass/hello/projects-pim-run-pass-hello.exp | 3 +-
.../pass/random/projects-pim-run-pass-random.exp | 29 +-
gcc/testsuite/gm2/recover/pass/recover-pass.exp | 2 +-
gcc/testsuite/gm2/sets/run/pass/sets-run-pass.exp | 1 -
.../makeall/fail/switches-makeall-fail.exp | 2 +-
.../makeall/pass/switches-makeall-pass.exp | 2 +-
.../gm2/switches/none/run/pass/gm2-none.exp | 3 +-
.../pic/run/pass/switches-pic-run-pass.exp | 2 -
.../pim2/run/pass/switches-pim2-run-pass.exp | 2 +-
gcc/testsuite/gm2/ulmlib/pass/ulmlib-pass.exp | 2 +-
.../gm2/ulmlib/std/pass/ulmlib-std-pass.exp | 2 +-
.../gm2/ulmlib/sys/pass/ulmlib-sys-pass.exp | 2 +-
.../gm2/warnings/returntype/fail/badreturn.mod | 11 +
.../returntype/fail/warnings-returntype-fail.exp | 44 +
.../gm2/warnings/returntype/pass/Termbase.mod | 220 +++
.../gm2/warnings/returntype/pass/goodreturn.mod | 13 +
.../warnings/returntype/pass/keypressedsimple.mod | 21 +
.../returntype/pass/warnings-returntype-pass.exp | 38 +
gcc/testsuite/lib/gm2.exp | 333 ++--
gcc/testsuite/lib/target-supports.exp | 33 +-
gcc/tree-cfgcleanup.cc | 6 +-
gcc/tree-core.h | 15 +-
gcc/tree-inline.cc | 2 +-
gcc/tree-object-size.cc | 7 +-
gcc/tree-ssa-alias.cc | 1 +
gcc/tree-ssa-forwprop.cc | 108 +-
gcc/tree-ssa-loop-niter.cc | 33 +-
gcc/tree-ssa-phiopt.cc | 5 +
gcc/tree-ssa-sccvn.cc | 15 +-
gcc/tree-vect-generic.cc | 8 +
gcc/tree-vectorizer.cc | 6 +-
gcc/tree.cc | 59 +
gcc/tree.h | 1 +
gcc/value-relation.cc | 51 +-
libatomic/ChangeLog | 5 +
libbacktrace/ChangeLog | 30 +
libbacktrace/Makefile.in | 2 +-
libbacktrace/dwarf.c | 88 +-
libcpp/po/ChangeLog | 4 +
libcpp/po/ka.po | 1110 +++++++++++
libffi/ChangeLog | 5 +
libffi/testsuite/lib/libffi.exp | 1 +
libgcc/ChangeLog | 36 +
libgcc/config.host | 8 +-
libgcc/config/aarch64/aarch64-unwind.h | 40 +-
libgcc/config/arm/pr-support.c | 43 +
libgcc/config/arm/unwind-arm.c | 28 +
libgcc/config/i386/gnu-unwind.h | 10 +
libgcc/unwind-dw2-execute_cfa.h | 11 +-
libgcc/unwind-dw2.c | 4 +-
libgcc/unwind-dw2.h | 1 +
libgfortran/ChangeLog | 5 +
libgfortran/intrinsics/execute_command_line.c | 5 +
libgm2/ChangeLog | 82 +
libgm2/Makefile.am | 6 +-
libgm2/Makefile.in | 7 +-
libgm2/configure | 98 +-
libgm2/configure.ac | 30 +-
libgm2/libm2cor/Makefile.am | 24 +-
libgm2/libm2cor/Makefile.in | 25 +-
libgm2/libm2iso/Makefile.am | 28 +-
libgm2/libm2iso/Makefile.in | 29 +-
libgm2/libm2iso/RTco.cc | 31 +-
libgm2/libm2iso/m2rts.h | 4 +-
libgm2/libm2log/Makefile.am | 28 +-
libgm2/libm2log/Makefile.in | 29 +-
libgm2/libm2min/Makefile.am | 24 +-
libgm2/libm2min/Makefile.in | 25 +-
libgm2/libm2pim/Makefile.am | 20 +-
libgm2/libm2pim/Makefile.in | 21 +-
libgomp/ChangeLog | 20 +
libgomp/Makefile.in | 2 +-
libgomp/configure | 2 +-
libgomp/libgomp.texi | 2 +-
libgomp/testsuite/libgomp.c/pr108459.c | 41 +
.../testsuite/libgomp.fortran/has_device_addr.f90 | 59 +
libphobos/ChangeLog | 5 +
libphobos/Makefile.in | 2 +-
libphobos/libdruntime/Makefile.in | 2 +-
libsanitizer/ChangeLog | 5 +
libsanitizer/configure | 12 +-
libsanitizer/configure.ac | 12 +-
.../sanitizer_platform_interceptors.h | 2 +-
libstdc++-v3/ChangeLog | 153 ++
libstdc++-v3/acinclude.m4 | 8 +-
libstdc++-v3/configure | 8 +-
libstdc++-v3/doc/html/manual/abi.html | 4 +-
.../doc/html/manual/appendix_contributing.html | 4 +-
libstdc++-v3/doc/html/manual/bugs.html | 314 +--
.../doc/html/manual/documentation_hacking.html | 4 +-
libstdc++-v3/doc/html/manual/memory.html | 8 +-
.../doc/html/manual/policy_data_structures.html | 8 +-
libstdc++-v3/doc/xml/manual/abi.xml | 4 +-
.../doc/xml/manual/appendix_contributing.xml | 4 +-
.../doc/xml/manual/documentation_hacking.xml | 4 +-
libstdc++-v3/doc/xml/manual/intro.xml | 6 +-
.../xml/manual/policy_data_structures_biblio.xml | 6 +-
libstdc++-v3/doc/xml/manual/shared_ptr.xml | 6 +-
libstdc++-v3/include/bits/fs_path.h | 2 +
libstdc++-v3/include/bits/random.h | 10 +-
libstdc++-v3/include/bits/ranges_base.h | 2 +-
libstdc++-v3/include/bits/stl_tree.h | 2 +
libstdc++-v3/include/debug/safe_iterator.h | 35 +-
libstdc++-v3/include/debug/safe_local_iterator.h | 15 +-
libstdc++-v3/include/std/tuple | 16 +-
libstdc++-v3/src/c++11/debug.cc | 53 +
libstdc++-v3/src/c++20/tzdb.cc | 80 +-
libstdc++-v3/src/libbacktrace/Makefile.in | 2 +-
libstdc++-v3/testsuite/17_intro/names.cc | 7 +-
.../20_util/tuple/make_from_tuple/dangling_ref.cc | 5 +
.../20_util/tuple/make_from_tuple/tuple_like.cc | 43 +
.../testsuite/22_locale/codecvt/codecvt_unicode.cc | 18 +-
.../testsuite/22_locale/codecvt/codecvt_unicode.h | 9 +-
.../22_locale/codecvt/codecvt_unicode_wchar_t.cc | 12 +-
.../23_containers/map/modifiers/108554.cc | 21 +
.../27_io/filesystem/path/construct/90281.cc | 1 +
.../filesystem/path/factory/u8path-char8_t.cc | 1 +
.../27_io/filesystem/path/factory/u8path-depr.cc | 16 +
.../27_io/filesystem/path/factory/u8path.cc | 1 +
.../27_io/filesystem/path/native/string.cc | 1 +
1747 files changed, 176079 insertions(+), 5463 deletions(-)
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-02-13 13:11 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-13 13:11 [gcc/devel/rust/master] Merge commit '9e56306f4d7c15e7667d8ac0b62ae6efb93ba756' into HEAD Thomas Schwinge
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).