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* [gcc(refs/vendors/microsoft/heads/main)] Merge commit '44ea73185a84fd42e86c4c823043f6063576aac5' into merge-master-44ea73185a84fd42e86c4c8230
@ 2023-03-14 6:18 Eugene Rozenfeld
0 siblings, 0 replies; only message in thread
From: Eugene Rozenfeld @ 2023-03-14 6:18 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:656fba0ac0145e1a12a7b1c742e00cbfbf182333
commit 656fba0ac0145e1a12a7b1c742e00cbfbf182333
Merge: a5c235d9fc9 44ea73185a8
Author: MS Automation <gnutools@microsoft.com>
Date: Mon Mar 13 09:35:31 2023 +0000
Merge commit '44ea73185a84fd42e86c4c823043f6063576aac5' into merge-master-44ea73185a84fd42e86c4c823043f6063576aac5-2023-03-13T09-35-29
Diff:
ChangeLog | 8 +
MAINTAINERS | 4 +-
contrib/ChangeLog | 12 +
contrib/config-list.mk | 4 +-
contrib/make_sunver.pl | 2 +-
contrib/regression/ChangeLog | 4 +
contrib/regression/objs-gcc.sh | 4 +-
fixincludes/ChangeLog | 5 +
fixincludes/fixincl.x | 15 +-
fixincludes/inclhack.def | 1 +
gcc/ChangeLog | 4472 +++
gcc/DATESTAMP | 2 +-
gcc/Makefile.in | 6 +-
gcc/ada/ChangeLog | 32 +
gcc/ada/adaint.c | 3 +-
gcc/ada/gcc-interface/trans.cc | 4 +-
gcc/ada/sem_ch6.adb | 15 +
gcc/addresses.h | 6 +-
gcc/analyzer/ChangeLog | 213 +
gcc/analyzer/analyzer.h | 2 +
gcc/analyzer/analyzer.opt | 4 +
gcc/analyzer/constraint-manager.cc | 166 +-
gcc/analyzer/constraint-manager.h | 7 +
gcc/analyzer/diagnostic-manager.cc | 39 +-
gcc/analyzer/engine.cc | 59 +-
gcc/analyzer/exploded-graph.h | 1 +
gcc/analyzer/feasible-graph.cc | 30 +
gcc/analyzer/feasible-graph.h | 5 +
gcc/analyzer/infinite-recursion.cc | 252 +-
gcc/analyzer/kf.cc | 31 +
gcc/analyzer/pending-diagnostic.cc | 6 +
gcc/analyzer/pending-diagnostic.h | 14 +
gcc/analyzer/program-state.cc | 28 +-
gcc/analyzer/region-model.cc | 133 +-
gcc/analyzer/sm-fd.cc | 41 +-
gcc/analyzer/sm-file.cc | 10 +-
gcc/analyzer/sm-malloc.cc | 122 +-
gcc/analyzer/state-purge.cc | 17 +-
gcc/analyzer/store.cc | 70 +-
gcc/analyzer/store.h | 11 +-
gcc/asan.cc | 53 +-
gcc/asan.h | 15 +-
gcc/attribs.cc | 1 +
gcc/attribs.h | 16 +-
gcc/basic-block.h | 54 +-
gcc/bb-reorder.cc | 21 +-
gcc/bitmap.h | 20 +-
gcc/builtins.cc | 29 +-
gcc/builtins.def | 1 +
gcc/c-family/ChangeLog | 104 +
gcc/c-family/c-attribs.cc | 28 +-
gcc/c-family/c-common.cc | 45 +-
gcc/c-family/c-common.h | 6 +-
gcc/c-family/c-cppbuiltin.cc | 2 +
gcc/c-family/c-gimplify.cc | 22 +-
gcc/c-family/c-pragma.cc | 3 +
gcc/c-family/c-ubsan.cc | 63 +-
gcc/c-family/c-warn.cc | 106 +-
gcc/c-family/c.opt | 6 +-
gcc/c/ChangeLog | 87 +
gcc/c/c-convert.cc | 21 +-
gcc/c/c-decl.cc | 70 +-
gcc/c/c-objc-common.cc | 14 +-
gcc/c/c-objc-common.h | 2 +-
gcc/c/c-parser.cc | 114 +-
gcc/c/c-parser.h | 6 +-
gcc/c/c-tree.h | 17 +-
gcc/c/c-typeck.cc | 171 +-
gcc/cfgexpand.cc | 10 +
gcc/cfghooks.h | 2 +-
gcc/cfgloop.h | 36 +-
gcc/cgraph.cc | 25 +-
gcc/cgraph.h | 6 +-
gcc/cgraphclones.cc | 16 +-
gcc/cgraphunit.cc | 3 +-
gcc/common.opt | 8 +
gcc/common/config/aarch64/aarch64-common.cc | 22 +-
gcc/common/config/arc/arc-common.cc | 1 -
gcc/common/config/i386/cpuinfo.h | 25 +-
gcc/common/config/riscv/riscv-common.cc | 10 +-
gcc/compare-elim.cc | 3 +-
gcc/config.gcc | 44 +-
gcc/config.host | 5 +-
gcc/config/aarch64/aarch64-builtins.cc | 18 +-
gcc/config/aarch64/aarch64-cores.def | 7 +-
gcc/config/aarch64/aarch64-option-extensions.def | 2 +-
gcc/config/aarch64/aarch64-protos.h | 2 -
gcc/config/aarch64/aarch64-simd.md | 75 +-
gcc/config/aarch64/aarch64-sve-builtins.def | 2 +-
gcc/config/aarch64/aarch64-sve2.md | 57 +-
gcc/config/aarch64/aarch64.cc | 128 +-
gcc/config/aarch64/aarch64.h | 5 +-
gcc/config/aarch64/aarch64.md | 27 +-
gcc/config/aarch64/aarch64.opt | 2 +-
gcc/config/alpha/linux.h | 2 +-
gcc/config/arm/aarch-common.cc | 1 -
gcc/config/arm/arm-builtins.cc | 50 +-
gcc/config/arm/arm-modes.def | 1 +
gcc/config/arm/arm-protos.h | 1 -
gcc/config/arm/arm-simd-builtin-types.def | 4 -
gcc/config/arm/arm.cc | 54 +-
gcc/config/arm/arm.h | 5 +
gcc/config/arm/arm.opt | 3 +
gcc/config/arm/arm_mve.h | 18 +-
gcc/config/arm/arm_mve_builtins.def | 18 +-
gcc/config/arm/constraints.md | 2 +-
gcc/config/arm/iterators.md | 18 +-
gcc/config/arm/mve.md | 66 +-
gcc/config/arm/unspecs.md | 10 +-
gcc/config/arm/vfp.md | 8 +-
gcc/config/bpf/bpf.cc | 2 +-
gcc/config/bpf/bpf.md | 10 +-
gcc/config/bpf/constraints.md | 11 +
gcc/config/gcn/gcn-run.cc | 62 +-
gcc/config/gcn/gcn-valu.md | 160 +-
gcc/config/gcn/gcn.cc | 304 +-
gcc/config/gcn/gcn.h | 2 +-
gcc/config/gcn/gcn.opt | 2 +-
gcc/config/gcn/mkoffload.cc | 18 +
gcc/config/host-linux.cc | 2 +-
gcc/config/i386/avx512erintrin.h | 18 +-
gcc/config/i386/gnu64.h | 40 +
gcc/config/i386/host-mingw32.cc | 10 +-
gcc/config/i386/i386-builtin.def | 36 +-
gcc/config/i386/i386-expand.cc | 35 +-
gcc/config/i386/i386-features.cc | 128 +-
gcc/config/i386/i386-features.h | 10 +-
gcc/config/i386/i386-protos.h | 1 +
gcc/config/i386/i386.cc | 35 +-
gcc/config/i386/i386.md | 311 +-
gcc/config/i386/i386.opt | 6 +-
gcc/config/i386/predicates.md | 22 +
gcc/config/i386/sym-mingw32.cc | 1 +
gcc/config/i386/t-cygwin-w64 | 3 -
gcc/config/i386/utf8-mingw32.rc | 3 +
gcc/config/i386/winnt-utf8.manifest | 8 +
gcc/config/i386/x-mingw32 | 3 +-
gcc/config/i386/x-mingw32-utf8 | 56 +
gcc/config/i386/x86-tune.def | 8 +-
gcc/config/ia64/linux.h | 2 +-
gcc/config/loongarch/gnu-user.h | 2 +-
gcc/config/loongarch/loongarch.h | 4 +-
gcc/config/loongarch/loongarch.md | 60 +-
gcc/config/loongarch/predicates.md | 8 -
gcc/config/loongarch/t-linux | 2 +-
gcc/config/mips/gnu-user.h | 2 +-
gcc/config/mips/mips-protos.h | 2 +-
gcc/config/mips/mips.cc | 5 +-
gcc/config/mips/mips.h | 6 +-
gcc/config/mips/mips.md | 24 +
gcc/config/moxie/constraints.md | 6 +-
gcc/config/moxie/moxie.cc | 3 -
gcc/config/riscv/bitmanip.md | 26 +-
gcc/config/riscv/constraints.md | 28 +-
gcc/config/riscv/crypto.md | 435 +
gcc/config/riscv/genrvv-type-indexer.cc | 313 +
gcc/config/riscv/iterators.md | 36 +-
gcc/config/riscv/predicates.md | 86 +-
gcc/config/riscv/riscv-builtins.cc | 57 +
gcc/config/riscv/riscv-c.cc | 20 +
gcc/config/riscv/riscv-ftypes.def | 10 +
gcc/config/riscv/riscv-modes.def | 8 +
gcc/config/riscv/riscv-passes.def | 2 +-
gcc/config/riscv/riscv-protos.h | 62 +-
gcc/config/riscv/riscv-scalar-crypto.def | 94 +
gcc/config/riscv/riscv-v.cc | 351 +-
gcc/config/riscv/riscv-vector-builtins-bases.cc | 1980 +-
gcc/config/riscv/riscv-vector-builtins-bases.h | 212 +
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gcc/config/riscv/riscv-vector-builtins-shapes.cc | 437 +
gcc/config/riscv/riscv-vector-builtins-shapes.h | 16 +
gcc/config/riscv/riscv-vector-builtins-types.def | 758 +
gcc/config/riscv/riscv-vector-builtins.cc | 2597 +-
gcc/config/riscv/riscv-vector-builtins.def | 288 +-
gcc/config/riscv/riscv-vector-builtins.h | 214 +-
gcc/config/riscv/riscv-vsetvl.cc | 2975 +-
gcc/config/riscv/riscv-vsetvl.def | 513 +
gcc/config/riscv/riscv-vsetvl.h | 219 +-
gcc/config/riscv/riscv.cc | 87 +-
gcc/config/riscv/riscv.h | 21 +-
gcc/config/riscv/riscv.md | 58 +-
gcc/config/riscv/riscv.opt | 2 +
gcc/config/riscv/t-riscv | 21 +-
gcc/config/riscv/t-rtems | 17 +-
gcc/config/riscv/vector-iterators.md | 991 +-
gcc/config/riscv/vector.md | 6448 ++++-
gcc/config/rs6000/rs6000.cc | 11 +-
gcc/config/rs6000/rs6000.md | 35 +-
gcc/config/s390/driver-native.cc | 4 +-
gcc/config/s390/predicates.md | 12 +-
gcc/config/s390/s390.cc | 322 +-
gcc/config/s390/s390.md | 5 +-
gcc/config/s390/s390.opt | 4 +
gcc/config/s390/vector.md | 35 +
gcc/config/vx-common.h | 2 +-
gcc/config/xtensa/t-xtensa | 7 +-
gcc/config/xtensa/xtensa-dynconfig.c | 171 -
gcc/config/xtensa/xtensa-dynconfig.cc | 195 +
gcc/config/xtensa/xtensa-protos.h | 3 +-
gcc/config/xtensa/xtensa.cc | 183 +-
gcc/config/xtensa/xtensa.h | 1 +
gcc/config/xtensa/xtensa.md | 107 +-
gcc/cp/ChangeLog | 494 +
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gcc/cp/constexpr.cc | 214 +-
gcc/cp/constraint.cc | 6 +-
gcc/cp/cp-gimplify.cc | 183 +-
gcc/cp/cp-trait.def | 2 +
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gcc/cp/cxx-pretty-print.cc | 5 +-
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gcc/cp/init.cc | 78 +-
gcc/cp/lambda.cc | 4 +
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gcc/cp/parser.cc | 310 +-
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gcc/cp/rtti.cc | 56 +-
gcc/cp/search.cc | 2 +-
gcc/cp/semantics.cc | 60 +-
gcc/cp/tree.cc | 26 +-
gcc/cp/typeck.cc | 17 +-
gcc/cselib.cc | 28 +-
gcc/cselib.h | 4 +-
gcc/d/ChangeLog | 56 +
gcc/d/Make-lang.in | 1 +
gcc/d/d-codegen.cc | 38 +-
gcc/d/d-gimplify.cc | 9 +
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gcc/d/d-target.cc | 5 -
gcc/d/decl.cc | 4 +
gcc/d/dmd/MERGE | 2 +-
gcc/d/dmd/README.md | 1 +
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gcc/d/dmd/aggregate.d | 5 +-
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gcc/d/dmd/apply.d | 2 +-
gcc/d/dmd/arrayop.d | 3 +-
gcc/d/dmd/arraytypes.d | 2 +-
gcc/d/dmd/arraytypes.h | 2 +-
gcc/d/dmd/ast_node.d | 2 +-
gcc/d/dmd/ast_node.h | 2 +-
gcc/d/dmd/astenums.d | 2 +-
gcc/d/dmd/attrib.d | 3 +-
gcc/d/dmd/attrib.h | 2 +-
gcc/d/dmd/blockexit.d | 3 +-
gcc/d/dmd/builtin.d | 4 +-
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gcc/d/dmd/chkformat.d | 3 +-
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gcc/d/dmd/common/bitfields.d | 2 +-
gcc/d/dmd/common/file.d | 2 +-
gcc/d/dmd/common/outbuffer.d | 2 +-
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gcc/d/dmd/common/string.d | 2 +-
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gcc/d/dmd/cond.h | 2 +-
gcc/d/dmd/constfold.d | 12 +-
gcc/d/dmd/cparse.d | 3 +-
gcc/d/dmd/cppmangle.d | 3 +-
gcc/d/dmd/ctfe.h | 2 +-
gcc/d/dmd/ctfeexpr.d | 3 +-
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gcc/d/dmd/dclass.d | 5 +-
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gcc/d/dmd/dtoh.d | 3 +-
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gcc/d/dmd/file_manager.d | 55 +-
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gcc/d/dmd/func.d | 138 +-
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gcc/d/dmd/hdrgen.h | 2 +-
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gcc/gimple-iterator.h | 48 +-
gcc/gimple-predicate-analysis.cc | 6 +-
gcc/gimple-predict.h | 10 +-
gcc/gimple-range-cache.cc | 2 +-
gcc/gimple-range-fold.cc | 3 +
gcc/gimple-range-fold.h | 6 +-
gcc/gimple-range-gori.cc | 83 +-
gcc/gimple-range-infer.cc | 2 +-
gcc/gimple-range-op.cc | 53 +
gcc/gimple-range-op.h | 1 +
gcc/gimple-ssa-warn-access.cc | 30 +-
gcc/gimple-ssa.h | 14 +-
gcc/gimple.cc | 11 +-
gcc/gimple.h | 1026 +-
gcc/gimplify.cc | 57 +-
gcc/go/ChangeLog | 4 +
gcc/go/gccgo.texi | 34 +-
gcc/graphite.h | 24 +-
gcc/hard-reg-set.h | 18 +-
gcc/hash-map.h | 8 +-
gcc/hash-set.h | 6 +-
gcc/hash-table.h | 8 +-
gcc/hwint.h | 26 +-
gcc/ifcvt.cc | 31 +-
gcc/ifcvt.h | 8 +
gcc/input.h | 12 +-
gcc/insn-addr.h | 2 +-
gcc/internal-fn.cc | 7 +-
gcc/internal-fn.def | 8 +-
gcc/internal-fn.h | 7 +-
gcc/ipa-cp.cc | 4 +-
gcc/ipa-devirt.cc | 18 +-
gcc/ipa-fnsummary.h | 2 +-
gcc/ipa-icf-gimple.h | 6 +-
gcc/ipa-inline.h | 10 +-
gcc/ipa-modref.h | 2 +-
gcc/ipa-param-manipulation.cc | 4 +
gcc/ipa-prop.cc | 1 +
gcc/ipa-prop.h | 70 +-
gcc/ipa-split.cc | 5 +-
gcc/ipa-sra.cc | 66 +-
gcc/ipa-utils.cc | 85 +-
gcc/ipa.cc | 2 +-
gcc/ira-color.cc | 7 +
gcc/ira-costs.cc | 156 +-
gcc/ira-int.h | 50 +-
gcc/ira.cc | 38 +-
gcc/ira.h | 7 +-
gcc/jit/ChangeLog | 6 +
gcc/jit/jit-dejagnu.h | 16 +-
gcc/jit/jit-recording.h | 2 +-
gcc/lra-constraints.cc | 21 +-
gcc/lra-int.h | 16 +-
gcc/lra-spills.cc | 3 +
gcc/lra.h | 2 +-
gcc/lto-opts.cc | 1 +
gcc/lto-streamer.h | 54 +-
gcc/lto-wrapper.cc | 4 +
gcc/lto/ChangeLog | 7 +
gcc/lto/lto-common.cc | 34 +-
gcc/m2/ChangeLog | 1288 +
gcc/m2/Make-lang.in | 196 +-
gcc/m2/Make-maintainer.in | 323 +-
gcc/m2/gm2-compiler/DynamicPath.def | 88 +
gcc/m2/gm2-compiler/DynamicPath.mod | 211 +
gcc/m2/gm2-compiler/DynamicStringPath.def | 113 -
gcc/m2/gm2-compiler/DynamicStringPath.mod | 265 -
gcc/m2/gm2-compiler/M2ALU.mod | 4 +-
gcc/m2/gm2-compiler/M2AsmUtil.mod | 46 +-
gcc/m2/gm2-compiler/M2Base.mod | 11 +-
gcc/m2/gm2-compiler/M2Comp.mod | 85 +-
gcc/m2/gm2-compiler/M2GCCDeclare.mod | 35 +-
gcc/m2/gm2-compiler/M2GenGCC.mod | 8 +-
gcc/m2/gm2-compiler/M2Graph.mod | 12 +-
gcc/m2/gm2-compiler/M2LexBuf.mod | 39 +-
gcc/m2/gm2-compiler/M2Options.def | 33 +-
gcc/m2/gm2-compiler/M2Options.mod | 61 +-
gcc/m2/gm2-compiler/M2Preprocess.mod | 18 +-
gcc/m2/gm2-compiler/M2Quads.mod | 61 +-
gcc/m2/gm2-compiler/M2Scaffold.mod | 34 +-
gcc/m2/gm2-compiler/M2Search.def | 10 +-
gcc/m2/gm2-compiler/M2Search.mod | 45 +-
gcc/m2/gm2-compiler/M2System.mod | 2 +
gcc/m2/gm2-compiler/P2Build.bnf | 11 +-
gcc/m2/gm2-compiler/P2SymBuild.def | 8 +
gcc/m2/gm2-compiler/P2SymBuild.mod | 12 +
gcc/m2/gm2-compiler/PathName.def | 104 +
gcc/m2/gm2-compiler/PathName.mod | 279 +
gcc/m2/gm2-compiler/SymbolTable.def | 35 +-
gcc/m2/gm2-compiler/SymbolTable.mod | 132 +-
gcc/m2/gm2-gcc/gcc-consolidation.h | 1 +
gcc/m2/gm2-gcc/init.cc | 6 +-
gcc/m2/gm2-gcc/init.h | 7 +-
gcc/m2/gm2-gcc/m2block.cc | 36 +-
gcc/m2/gm2-gcc/m2block.h | 4 +-
gcc/m2/gm2-gcc/m2builtins.cc | 2 +-
gcc/m2/gm2-gcc/m2builtins.h | 4 +-
gcc/m2/gm2-gcc/m2convert.cc | 50 +-
gcc/m2/gm2-gcc/m2convert.h | 2 +-
gcc/m2/gm2-gcc/m2decl.cc | 21 +-
gcc/m2/gm2-gcc/m2decl.def | 3 +-
gcc/m2/gm2-gcc/m2decl.h | 13 +-
gcc/m2/gm2-gcc/m2except.cc | 19 +-
gcc/m2/gm2-gcc/m2expr.cc | 480 +-
gcc/m2/gm2-gcc/m2expr.h | 82 +-
gcc/m2/gm2-gcc/m2options.h | 4 +
gcc/m2/gm2-gcc/m2statement.cc | 124 +-
gcc/m2/gm2-gcc/m2statement.h | 20 +-
gcc/m2/gm2-gcc/m2top.cc | 2 +-
gcc/m2/gm2-gcc/m2top.h | 2 +-
gcc/m2/gm2-gcc/m2tree.cc | 10 +-
gcc/m2/gm2-gcc/m2tree.h | 13 +-
gcc/m2/gm2-gcc/m2type.cc | 154 +-
gcc/m2/gm2-gcc/m2type.h | 24 +-
gcc/m2/gm2-lang.cc | 125 +-
gcc/m2/gm2-libs-ch/UnixArgs.cc | 3 +-
gcc/m2/gm2-libs-ch/dtoa.cc | 4 +-
gcc/m2/gm2-libs-ch/ldtoa.cc | 4 +-
gcc/m2/gm2-libs-ch/m2rts.h | 2 +-
gcc/m2/gm2-libs-coroutines/Debug.def | 2 +-
gcc/m2/gm2-libs-coroutines/SYSTEM.def | 2 +-
gcc/m2/gm2-libs-iso/ClientSocket.mod | 9 +-
gcc/m2/gm2-libs-iso/EXCEPTIONS.def | 3 +-
gcc/m2/gm2-libs-iso/IOLink.def | 4 +-
gcc/m2/gm2-libs-iso/M2RTS.def | 66 +-
gcc/m2/gm2-libs-iso/M2RTS.mod | 20 +-
gcc/m2/gm2-libs-iso/SYSTEM.def | 2 +-
gcc/m2/gm2-libs-iso/TermFile.mod | 16 +-
gcc/m2/gm2-libs-iso/wrapsock.c | 260 -
gcc/m2/gm2-libs-iso/wraptime.c | 292 -
.../{gm2-libs-pim => gm2-libs-log}/BitBlockOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitBlockOps.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/BitByteOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitByteOps.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/BitWordOps.def | 0
.../{gm2-libs-pim => gm2-libs-log}/BitWordOps.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/BlockOps.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/BlockOps.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Break.c | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Break.def | 0
.../{gm2-libs-pim => gm2-libs-log}/CardinalIO.def | 0
.../{gm2-libs-pim => gm2-libs-log}/CardinalIO.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/Conversions.def | 0
.../{gm2-libs-pim => gm2-libs-log}/Conversions.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/DebugPMD.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/DebugPMD.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/DebugTrace.def | 0
.../{gm2-libs-pim => gm2-libs-log}/DebugTrace.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Delay.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Delay.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Display.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Display.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/ErrorCode.def | 0
.../{gm2-libs-pim => gm2-libs-log}/ErrorCode.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/FileSystem.def | 0
.../{gm2-libs-pim => gm2-libs-log}/FileSystem.mod | 0
.../FloatingUtilities.def | 0
.../FloatingUtilities.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/InOut.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/InOut.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Keyboard.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Keyboard.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/LongIO.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/LongIO.mod | 0
.../NumberConversion.def | 0
.../NumberConversion.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/README.texi | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Random.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Random.mod | 0
.../RealConversions.def | 0
.../RealConversions.mod | 0
.../{gm2-libs-pim => gm2-libs-log}/RealInOut.def | 0
.../{gm2-libs-pim => gm2-libs-log}/RealInOut.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Strings.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Strings.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Termbase.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Termbase.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Terminal.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/Terminal.mod | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/TimeDate.def | 0
gcc/m2/{gm2-libs-pim => gm2-libs-log}/TimeDate.mod | 0
gcc/m2/gm2-libs-min/M2RTS.def | 28 +-
gcc/m2/gm2-libs-min/M2RTS.mod | 43 +-
gcc/m2/gm2-libs/Builtins.def | 6 +-
gcc/m2/gm2-libs/Builtins.mod | 12 +-
gcc/m2/gm2-libs/FIO.mod | 13 +-
gcc/m2/gm2-libs/M2Dependent.def | 14 +-
gcc/m2/gm2-libs/M2Dependent.mod | 381 +-
gcc/m2/gm2-libs/M2RTS.def | 59 +-
gcc/m2/gm2-libs/M2RTS.mod | 20 +-
gcc/m2/gm2-libs/RTExceptions.def | 2 +-
gcc/m2/gm2-libs/RTExceptions.mod | 15 +-
gcc/m2/gm2-libs/RTint.def | 2 +-
gcc/m2/gm2-libs/RTint.mod | 399 +-
gcc/m2/gm2-libs/SYSTEM.def | 2 +-
gcc/m2/gm2-libs/libc.def | 10 +-
gcc/m2/gm2-libs/sckt.def | 16 +-
gcc/m2/gm2spec.cc | 92 +-
gcc/m2/lang-specs.h | 12 +-
gcc/m2/lang.opt | 203 +-
gcc/m2/m2.flex | 6 +-
gcc/m2/m2pp.cc | 2 +-
gcc/m2/mc-boot-ch/GBuiltins.cc | 43 +
gcc/m2/mc-boot-ch/GSYSTEM.c | 2 +-
gcc/m2/mc-boot-ch/GSelective.c | 2 +-
gcc/m2/mc-boot-ch/GSysExceptions.c | 4 +-
gcc/m2/mc-boot-ch/GUnixArgs.cc | 12 +-
gcc/m2/mc-boot-ch/Gdtoa.cc | 184 +
gcc/m2/mc-boot-ch/Gerrno.c | 54 -
gcc/m2/mc-boot-ch/Gerrno.cc | 54 +
gcc/m2/mc-boot-ch/Gldtoa.cc | 107 +
gcc/m2/mc-boot-ch/Glibc.c | 36 +
gcc/m2/mc-boot-ch/Gm2rtsdummy.cc | 62 +
gcc/m2/mc-boot-ch/Gtermios.cc | 6 +-
gcc/m2/mc-boot-ch/Gwrapc.c | 4 +-
gcc/m2/mc-boot-ch/m2rts.h | 5 +-
gcc/m2/mc-boot/GASCII.c | 86 -
gcc/m2/mc-boot/GASCII.cc | 87 +
gcc/m2/mc-boot/GASCII.h | 1 +
gcc/m2/mc-boot/GArgs.c | 120 -
gcc/m2/mc-boot/GArgs.cc | 121 +
gcc/m2/mc-boot/GArgs.h | 3 +-
gcc/m2/mc-boot/GAssertion.c | 71 -
gcc/m2/mc-boot/GAssertion.cc | 72 +
gcc/m2/mc-boot/GAssertion.h | 3 +-
gcc/m2/mc-boot/GBreak.c | 47 -
gcc/m2/mc-boot/GBreak.cc | 48 +
gcc/m2/mc-boot/GBreak.h | 1 +
gcc/m2/mc-boot/GCOROUTINES.h | 1 +
gcc/m2/mc-boot/GCmdArgs.c | 322 -
gcc/m2/mc-boot/GCmdArgs.cc | 323 +
gcc/m2/mc-boot/GCmdArgs.h | 3 +-
gcc/m2/mc-boot/GDebug.c | 168 -
gcc/m2/mc-boot/GDebug.cc | 169 +
gcc/m2/mc-boot/GDebug.h | 1 +
gcc/m2/mc-boot/GDynamicStrings.c | 2676 --
gcc/m2/mc-boot/GDynamicStrings.cc | 2677 ++
gcc/m2/mc-boot/GDynamicStrings.h | 11 +-
gcc/m2/mc-boot/GEnvironment.c | 129 -
gcc/m2/mc-boot/GEnvironment.cc | 130 +
gcc/m2/mc-boot/GEnvironment.h | 5 +-
gcc/m2/mc-boot/GFIO.c | 2328 --
gcc/m2/mc-boot/GFIO.cc | 2323 ++
gcc/m2/mc-boot/GFIO.h | 19 +-
gcc/m2/mc-boot/GFormatStrings.c | 845 -
gcc/m2/mc-boot/GFormatStrings.cc | 846 +
gcc/m2/mc-boot/GFormatStrings.h | 1 +
gcc/m2/mc-boot/GFpuIO.c | 336 -
gcc/m2/mc-boot/GFpuIO.cc | 337 +
gcc/m2/mc-boot/GFpuIO.h | 1 +
gcc/m2/mc-boot/GIO.c | 479 -
gcc/m2/mc-boot/GIO.cc | 480 +
gcc/m2/mc-boot/GIO.h | 9 +-
gcc/m2/mc-boot/GIndexing.c | 491 -
gcc/m2/mc-boot/GIndexing.cc | 492 +
gcc/m2/mc-boot/GIndexing.h | 5 +-
gcc/m2/mc-boot/GM2Dependent.c | 1161 -
gcc/m2/mc-boot/GM2Dependent.cc | 1408 +
gcc/m2/mc-boot/GM2Dependent.h | 14 +-
gcc/m2/mc-boot/GM2EXCEPTION.c | 89 -
gcc/m2/mc-boot/GM2EXCEPTION.cc | 90 +
gcc/m2/mc-boot/GM2EXCEPTION.h | 3 +-
gcc/m2/mc-boot/GM2LINK.h | 3 +-
gcc/m2/mc-boot/GM2RTS.c | 819 -
gcc/m2/mc-boot/GM2RTS.cc | 820 +
gcc/m2/mc-boot/GM2RTS.h | 63 +-
gcc/m2/mc-boot/GMemUtils.c | 126 -
gcc/m2/mc-boot/GMemUtils.cc | 127 +
gcc/m2/mc-boot/GMemUtils.h | 1 +
gcc/m2/mc-boot/GNumberIO.c | 776 -
gcc/m2/mc-boot/GNumberIO.cc | 777 +
gcc/m2/mc-boot/GNumberIO.h | 1 +
gcc/m2/mc-boot/GPushBackInput.c | 488 -
gcc/m2/mc-boot/GPushBackInput.cc | 489 +
gcc/m2/mc-boot/GPushBackInput.h | 3 +-
gcc/m2/mc-boot/GRTExceptions.c | 1221 -
gcc/m2/mc-boot/GRTExceptions.cc | 1224 +
gcc/m2/mc-boot/GRTExceptions.h | 9 +-
gcc/m2/mc-boot/GRTco.h | 2 +
gcc/m2/mc-boot/GRTentity.h | 68 +
gcc/m2/mc-boot/GRTint.c | 1122 -
gcc/m2/mc-boot/GRTint.cc | 1107 +
gcc/m2/mc-boot/GRTint.h | 5 +-
gcc/m2/mc-boot/GSArgs.c | 125 -
gcc/m2/mc-boot/GSArgs.cc | 126 +
gcc/m2/mc-boot/GSArgs.h | 3 +-
gcc/m2/mc-boot/GSFIO.c | 216 -
gcc/m2/mc-boot/GSFIO.cc | 217 +
gcc/m2/mc-boot/GSFIO.h | 5 +-
gcc/m2/mc-boot/GSYSTEM.h | 1 +
gcc/m2/mc-boot/GSelective.h | 3 +-
gcc/m2/mc-boot/GStdIO.c | 269 -
gcc/m2/mc-boot/GStdIO.cc | 270 +
gcc/m2/mc-boot/GStdIO.h | 1 +
gcc/m2/mc-boot/GStorage.c | 74 -
gcc/m2/mc-boot/GStorage.cc | 75 +
gcc/m2/mc-boot/GStorage.h | 3 +-
gcc/m2/mc-boot/GStrCase.c | 175 -
gcc/m2/mc-boot/GStrCase.cc | 176 +
gcc/m2/mc-boot/GStrCase.h | 1 +
gcc/m2/mc-boot/GStrIO.c | 277 -
gcc/m2/mc-boot/GStrIO.cc | 278 +
gcc/m2/mc-boot/GStrIO.h | 1 +
gcc/m2/mc-boot/GStrLib.c | 346 -
gcc/m2/mc-boot/GStrLib.cc | 347 +
gcc/m2/mc-boot/GStrLib.h | 7 +-
gcc/m2/mc-boot/GStringConvert.c | 2005 --
gcc/m2/mc-boot/GStringConvert.cc | 2006 ++
gcc/m2/mc-boot/GStringConvert.h | 25 +-
gcc/m2/mc-boot/GSysExceptions.h | 1 +
gcc/m2/mc-boot/GSysStorage.c | 249 -
gcc/m2/mc-boot/GSysStorage.cc | 250 +
gcc/m2/mc-boot/GSysStorage.h | 3 +-
gcc/m2/mc-boot/GTimeString.c | 91 -
gcc/m2/mc-boot/GTimeString.cc | 92 +
gcc/m2/mc-boot/GTimeString.h | 1 +
gcc/m2/mc-boot/GUnixArgs.h | 1 +
gcc/m2/mc-boot/Galists.c | 440 -
gcc/m2/mc-boot/Galists.cc | 441 +
gcc/m2/mc-boot/Galists.h | 3 +-
gcc/m2/mc-boot/Gdecl.c | 26923 -----------------
gcc/m2/mc-boot/Gdecl.cc | 26965 +++++++++++++++++
gcc/m2/mc-boot/Gdecl.h | 123 +-
gcc/m2/mc-boot/Gdtoa.h | 5 +-
gcc/m2/mc-boot/Gerrno.h | 1 +
gcc/m2/mc-boot/Gkeyc.c | 1619 --
gcc/m2/mc-boot/Gkeyc.cc | 1640 ++
gcc/m2/mc-boot/Gkeyc.h | 5 +-
gcc/m2/mc-boot/Gldtoa.h | 5 +-
gcc/m2/mc-boot/Glibc.h | 2 +
gcc/m2/mc-boot/Glibm.h | 1 +
gcc/m2/mc-boot/Glists.c | 439 -
gcc/m2/mc-boot/Glists.cc | 440 +
gcc/m2/mc-boot/Glists.h | 3 +-
gcc/m2/mc-boot/GmcComment.c | 468 -
gcc/m2/mc-boot/GmcComment.cc | 469 +
gcc/m2/mc-boot/GmcComment.h | 9 +-
gcc/m2/mc-boot/GmcComp.c | 660 -
gcc/m2/mc-boot/GmcComp.cc | 661 +
gcc/m2/mc-boot/GmcComp.h | 1 +
gcc/m2/mc-boot/GmcDebug.c | 86 -
gcc/m2/mc-boot/GmcDebug.cc | 87 +
gcc/m2/mc-boot/GmcDebug.h | 3 +-
gcc/m2/mc-boot/GmcError.c | 1197 -
gcc/m2/mc-boot/GmcError.cc | 1198 +
gcc/m2/mc-boot/GmcError.h | 1 +
gcc/m2/mc-boot/GmcFileName.c | 152 -
gcc/m2/mc-boot/GmcFileName.cc | 153 +
gcc/m2/mc-boot/GmcFileName.h | 1 +
gcc/m2/mc-boot/GmcLexBuf.c | 1849 --
gcc/m2/mc-boot/GmcLexBuf.cc | 1850 ++
gcc/m2/mc-boot/GmcLexBuf.h | 3 +-
gcc/m2/mc-boot/GmcMetaError.c | 1880 --
gcc/m2/mc-boot/GmcMetaError.cc | 1881 ++
gcc/m2/mc-boot/GmcMetaError.h | 1 +
gcc/m2/mc-boot/GmcOptions.c | 1080 -
gcc/m2/mc-boot/GmcOptions.cc | 1143 +
gcc/m2/mc-boot/GmcOptions.h | 39 +-
gcc/m2/mc-boot/GmcPreprocess.c | 181 -
gcc/m2/mc-boot/GmcPreprocess.cc | 182 +
gcc/m2/mc-boot/GmcPreprocess.h | 1 +
gcc/m2/mc-boot/GmcPretty.c | 468 -
gcc/m2/mc-boot/GmcPretty.cc | 469 +
gcc/m2/mc-boot/GmcPretty.h | 1 +
gcc/m2/mc-boot/GmcPrintf.c | 655 -
gcc/m2/mc-boot/GmcPrintf.cc | 656 +
gcc/m2/mc-boot/GmcPrintf.h | 1 +
gcc/m2/mc-boot/GmcQuiet.c | 129 -
gcc/m2/mc-boot/GmcQuiet.cc | 130 +
gcc/m2/mc-boot/GmcQuiet.h | 1 +
gcc/m2/mc-boot/GmcReserved.c | 40 -
gcc/m2/mc-boot/GmcReserved.cc | 41 +
gcc/m2/mc-boot/GmcReserved.h | 1 +
gcc/m2/mc-boot/GmcSearch.c | 408 -
gcc/m2/mc-boot/GmcSearch.cc | 409 +
gcc/m2/mc-boot/GmcSearch.h | 7 +-
gcc/m2/mc-boot/GmcStack.c | 228 -
gcc/m2/mc-boot/GmcStack.cc | 229 +
gcc/m2/mc-boot/GmcStack.h | 1 +
gcc/m2/mc-boot/GmcStream.c | 266 -
gcc/m2/mc-boot/GmcStream.cc | 267 +
gcc/m2/mc-boot/GmcStream.h | 1 +
gcc/m2/mc-boot/Gmcflex.h | 3 +-
gcc/m2/mc-boot/Gmcp1.c | 7265 -----
gcc/m2/mc-boot/Gmcp1.cc | 7266 +++++
gcc/m2/mc-boot/Gmcp1.h | 3 +-
gcc/m2/mc-boot/Gmcp2.c | 7637 -----
gcc/m2/mc-boot/Gmcp2.cc | 7638 +++++
gcc/m2/mc-boot/Gmcp2.h | 3 +-
gcc/m2/mc-boot/Gmcp3.c | 7854 -----
gcc/m2/mc-boot/Gmcp3.cc | 7855 +++++
gcc/m2/mc-boot/Gmcp3.h | 3 +-
gcc/m2/mc-boot/Gmcp4.c | 7717 -----
gcc/m2/mc-boot/Gmcp4.cc | 7718 +++++
gcc/m2/mc-boot/Gmcp4.h | 3 +-
gcc/m2/mc-boot/Gmcp5.c | 8576 ------
gcc/m2/mc-boot/Gmcp5.cc | 8577 ++++++
gcc/m2/mc-boot/Gmcp5.h | 3 +-
gcc/m2/mc-boot/GnameKey.c | 584 -
gcc/m2/mc-boot/GnameKey.cc | 585 +
gcc/m2/mc-boot/GnameKey.h | 5 +-
gcc/m2/mc-boot/Gpth.h | 43 -
gcc/m2/mc-boot/GsymbolKey.c | 406 -
gcc/m2/mc-boot/GsymbolKey.cc | 407 +
gcc/m2/mc-boot/GsymbolKey.h | 7 +-
gcc/m2/mc-boot/Gtermios.h | 9 +-
gcc/m2/mc-boot/Gtop.c | 100 -
gcc/m2/mc-boot/Gtop.cc | 101 +
gcc/m2/mc-boot/Gvarargs.c | 431 -
gcc/m2/mc-boot/Gvarargs.cc | 432 +
gcc/m2/mc-boot/Gvarargs.h | 1 +
gcc/m2/mc-boot/Gwlists.c | 471 -
gcc/m2/mc-boot/Gwlists.cc | 472 +
gcc/m2/mc-boot/Gwlists.h | 3 +-
gcc/m2/mc-boot/Gwrapc.h | 1 +
gcc/m2/mc/decl.mod | 44 +-
gcc/m2/mc/keyc.mod | 16 +-
gcc/m2/mc/mc.flex | 5 +
gcc/m2/mc/mcOptions.def | 21 +
gcc/m2/mc/mcOptions.mod | 40 +-
gcc/m2/pge-boot/GASCII.c | 84 -
gcc/m2/pge-boot/GASCII.cc | 84 +
gcc/m2/pge-boot/GArgs.c | 118 -
gcc/m2/pge-boot/GArgs.cc | 118 +
gcc/m2/pge-boot/GAssertion.c | 69 -
gcc/m2/pge-boot/GAssertion.cc | 69 +
gcc/m2/pge-boot/GBuiltins.c | 43 -
.../GBuiltins.c => pge-boot/GBuiltins.cc} | 0
gcc/m2/pge-boot/GDebug.c | 168 -
gcc/m2/pge-boot/GDebug.cc | 168 +
gcc/m2/pge-boot/GDynamicStrings.c | 2679 --
gcc/m2/pge-boot/GDynamicStrings.cc | 2679 ++
gcc/m2/pge-boot/GFIO.c | 2331 --
gcc/m2/pge-boot/GFIO.cc | 2325 ++
gcc/m2/pge-boot/GIO.c | 479 -
gcc/m2/pge-boot/GIO.cc | 479 +
gcc/m2/pge-boot/GIndexing.c | 493 -
gcc/m2/pge-boot/GIndexing.cc | 493 +
gcc/m2/pge-boot/GLists.c | 427 -
gcc/m2/pge-boot/GLists.cc | 427 +
gcc/m2/pge-boot/GM2Dependent.c | 1162 -
gcc/m2/pge-boot/GM2Dependent.cc | 1410 +
gcc/m2/pge-boot/GM2Dependent.h | 15 +-
gcc/m2/pge-boot/GM2EXCEPTION.c | 88 -
gcc/m2/pge-boot/GM2EXCEPTION.cc | 88 +
gcc/m2/pge-boot/{GM2LINK.c => GM2LINK.cc} | 0
gcc/m2/pge-boot/GM2RTS.c | 822 -
gcc/m2/pge-boot/GM2RTS.cc | 822 +
gcc/m2/pge-boot/GM2RTS.h | 73 +-
gcc/m2/pge-boot/GNameKey.c | 612 -
gcc/m2/pge-boot/GNameKey.cc | 612 +
gcc/m2/pge-boot/GNumberIO.c | 777 -
gcc/m2/pge-boot/GNumberIO.cc | 777 +
gcc/m2/pge-boot/GOutput.c | 315 -
gcc/m2/pge-boot/GOutput.cc | 315 +
gcc/m2/pge-boot/GPushBackInput.c | 489 -
gcc/m2/pge-boot/GPushBackInput.cc | 489 +
gcc/m2/pge-boot/GRTExceptions.c | 1224 -
gcc/m2/pge-boot/GRTExceptions.cc | 1226 +
gcc/m2/pge-boot/GRTco.c | 127 -
gcc/m2/{mc-boot-ch/GRTco.c => pge-boot/GRTco.cc} | 0
gcc/m2/pge-boot/GSFIO.c | 215 -
gcc/m2/pge-boot/GSFIO.cc | 215 +
gcc/m2/pge-boot/{GSYSTEM.c => GSYSTEM.cc} | 0
gcc/m2/pge-boot/{GSelective.c => GSelective.cc} | 0
gcc/m2/pge-boot/GStdIO.c | 267 -
gcc/m2/pge-boot/GStdIO.cc | 267 +
gcc/m2/pge-boot/GStorage.c | 72 -
gcc/m2/pge-boot/GStorage.cc | 72 +
gcc/m2/pge-boot/GStrCase.c | 175 -
gcc/m2/pge-boot/GStrCase.cc | 175 +
gcc/m2/pge-boot/GStrIO.c | 277 -
gcc/m2/pge-boot/GStrIO.cc | 277 +
gcc/m2/pge-boot/GStrLib.c | 346 -
gcc/m2/pge-boot/GStrLib.cc | 346 +
gcc/m2/pge-boot/GSymbolKey.c | 556 -
gcc/m2/pge-boot/GSymbolKey.cc | 556 +
gcc/m2/pge-boot/GSysExceptions.c | 237 -
gcc/m2/pge-boot/GSysExceptions.cc | 237 +
gcc/m2/pge-boot/GSysStorage.c | 249 -
gcc/m2/pge-boot/GSysStorage.cc | 249 +
gcc/m2/pge-boot/GUnixArgs.cc | 6 +-
gcc/m2/pge-boot/{Gabort.c => Gabort.cc} | 0
gcc/m2/pge-boot/Gbnflex.c | 602 -
gcc/m2/pge-boot/Gbnflex.cc | 602 +
gcc/m2/pge-boot/{Gcbuiltin.c => Gcbuiltin.cc} | 0
gcc/m2/pge-boot/Gdtoa.c | 184 -
gcc/m2/{mc-boot-ch/Gdtoa.c => pge-boot/Gdtoa.cc} | 0
gcc/m2/pge-boot/Gerrno.c | 54 -
gcc/m2/pge-boot/Gerrno.cc | 54 +
gcc/m2/pge-boot/Gldtoa.c | 107 -
gcc/m2/{mc-boot-ch/Gldtoa.c => pge-boot/Gldtoa.cc} | 0
gcc/m2/pge-boot/Glibc.c | 242 -
gcc/m2/pge-boot/Glibc.cc | 279 +
gcc/m2/pge-boot/Glibc.h | 1 +
gcc/m2/pge-boot/{Glibm.c => Glibm.cc} | 0
gcc/m2/pge-boot/{Gmcrts.c => Gmcrts.cc} | 0
gcc/m2/pge-boot/Gpge.c | 9753 -------
gcc/m2/pge-boot/Gpge.cc | 9753 +++++++
gcc/m2/pge-boot/Gtermios.cc | 2 +-
gcc/m2/pge-boot/{Gwrapc.c => Gwrapc.cc} | 0
gcc/m2/pge-boot/README | 6 +-
gcc/m2/pge-boot/m2rts.h | 2 +-
gcc/m2/pge-boot/main.c | 123 -
gcc/m2/pge-boot/main.cc | 123 +
gcc/m2/pge-boot/{network.c => network.cc} | 0
gcc/m2/plugin/m2rte.cc | 73 +-
gcc/m2/tools-src/mklink.c | 6 +-
gcc/match.pd | 34 +-
gcc/memmodel.h | 18 +-
gcc/objc/ChangeLog | 8 +
gcc/objc/objc-act.cc | 2 -
gcc/objc/objc-act.h | 6 +-
gcc/objc/objc-map.h | 12 +-
gcc/omp-general.h | 2 +-
gcc/omp-low.cc | 3 +-
gcc/omp-simd-clone.cc | 1 +
gcc/optabs-query.h | 8 +-
gcc/optabs.cc | 66 +-
gcc/optabs.h | 14 +-
gcc/opts-common.cc | 46 +-
gcc/opts-global.cc | 8 +
gcc/opts.cc | 18 +-
gcc/params.opt | 8 +
gcc/passes.cc | 7 +
gcc/plugin.h | 2 +-
gcc/po/ChangeLog | 14 +
gcc/po/be.po | 27667 ++++++++++--------
gcc/po/da.po | 28359 +++++++++---------
gcc/po/de.po | 28761 ++++++++++---------
gcc/po/el.po | 27690 ++++++++++--------
gcc/po/es.po | 28600 +++++++++---------
gcc/po/fi.po | 28184 +++++++++---------
gcc/po/fr.po | 28299 +++++++++---------
gcc/po/gcc.pot | 27954 +++++++++---------
gcc/po/hr.po | 27762 ++++++++++--------
gcc/po/id.po | 28197 +++++++++---------
gcc/po/ja.po | 28060 +++++++++---------
gcc/po/nl.po | 27907 +++++++++---------
gcc/po/ru.po | 28599 +++++++++---------
gcc/po/sr.po | 28156 +++++++++---------
gcc/po/sv.po | 28663 +++++++++---------
gcc/po/tr.po | 28381 +++++++++---------
gcc/po/uk.po | 28049 ++++++++++--------
gcc/po/vi.po | 28156 +++++++++---------
gcc/po/zh_CN.po | 28546 +++++++++---------
gcc/po/zh_TW.po | 28290 +++++++++---------
gcc/pretty-print.h | 10 +-
gcc/range-op-float.cc | 223 +-
gcc/range-op.cc | 246 +-
gcc/range-op.h | 10 +
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gcc/read-md.h | 4 +-
gcc/read-rtl-function.cc | 9 +-
gcc/recog.h | 10 +-
gcc/ree.cc | 6 +-
gcc/reg-notes.def | 5 +
gcc/regs.h | 22 +-
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gcc/rtl-iter.h | 2 +-
gcc/rtl-ssa/accesses.cc | 14 +-
gcc/rtl-ssa/insns.h | 14 +-
gcc/rtl.h | 34 +-
gcc/rust/ChangeLog | 1875 ++
gcc/rust/Make-lang.in | 7 +-
gcc/rust/ast/rust-ast-dump.cc | 1460 +-
gcc/rust/ast/rust-ast-dump.h | 89 +-
gcc/rust/ast/rust-ast-fragment.cc | 171 +
gcc/rust/ast/rust-ast-fragment.h | 118 +
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gcc/rust/ast/rust-expr.h | 11 +-
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gcc/rust/backend/rust-constexpr.h | 2 +
gcc/rust/backend/rust-mangle.cc | 6 +
gcc/rust/backend/rust-tree.cc | 5205 +++-
gcc/rust/backend/rust-tree.h | 2921 +-
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gcc/rust/checks/errors/rust-const-checker.cc | 237 +-
gcc/rust/checks/errors/rust-const-checker.h | 28 +-
gcc/rust/checks/errors/rust-unsafe-checker.cc | 152 +-
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gcc/rust/expand/rust-macro-builtins.cc | 300 +-
gcc/rust/expand/rust-macro-builtins.h | 51 +-
gcc/rust/expand/rust-macro-expand.cc | 93 +-
gcc/rust/expand/rust-macro-expand.h | 29 +-
gcc/rust/hir/rust-ast-lower-base.cc | 469 +-
gcc/rust/hir/rust-ast-lower-base.h | 32 +-
gcc/rust/hir/rust-ast-lower-expr.cc | 810 +
gcc/rust/hir/rust-ast-lower-expr.h | 727 +-
gcc/rust/hir/rust-ast-lower-implitem.h | 14 +-
gcc/rust/hir/rust-ast-lower-item.cc | 5 +-
gcc/rust/hir/rust-ast-lower-pattern.cc | 18 +
gcc/rust/hir/rust-ast-lower-pattern.h | 24 +-
gcc/rust/hir/rust-ast-lower-type.cc | 232 +
gcc/rust/hir/rust-ast-lower-type.h | 63 +-
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gcc/rust/hir/rust-hir-dump.cc | 10 +-
gcc/rust/hir/rust-hir-dump.h | 3 +-
gcc/rust/hir/tree/rust-hir-expr.h | 221 +-
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gcc/rust/hir/tree/rust-hir-full-test.cc | 39 +-
gcc/rust/hir/tree/rust-hir-item.h | 12 +-
gcc/rust/hir/tree/rust-hir-path.h | 105 +-
gcc/rust/hir/tree/rust-hir-visitor.h | 9 +-
gcc/rust/hir/tree/rust-hir.h | 5 +-
gcc/rust/lang.opt | 40 +
gcc/rust/lex/rust-lex.cc | 53 +-
gcc/rust/lex/rust-lex.h | 14 +-
gcc/rust/metadata/rust-export-metadata.cc | 24 +-
gcc/rust/parse/rust-parse-impl.h | 73 +-
gcc/rust/parse/rust-parse.h | 2 -
gcc/rust/resolve/rust-ast-resolve-expr.cc | 85 +-
gcc/rust/resolve/rust-ast-resolve-expr.h | 48 +-
gcc/rust/resolve/rust-ast-resolve-implitem.h | 12 +-
gcc/rust/resolve/rust-ast-resolve-item.cc | 27 +-
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gcc/rust/resolve/rust-ast-resolve-pattern.h | 12 +-
gcc/rust/resolve/rust-ast-resolve-stmt.h | 19 +-
gcc/rust/resolve/rust-ast-resolve-toplevel.h | 21 +-
gcc/rust/resolve/rust-ast-resolve-type.cc | 21 +-
gcc/rust/resolve/rust-ast-resolve-type.h | 2 +-
gcc/rust/resolve/rust-ast-verify-assignee.h | 8 +-
gcc/rust/resolve/rust-early-name-resolver.cc | 1087 +
gcc/rust/resolve/rust-early-name-resolver.h | 210 +
gcc/rust/resolve/rust-name-resolver.cc | 261 +-
gcc/rust/resolve/rust-name-resolver.h | 55 +-
gcc/rust/rust-backend.h | 19 +-
gcc/rust/rust-gcc.cc | 170 +-
gcc/rust/rust-gcc.h | 58 +
gcc/rust/rust-lang.cc | 19 +-
gcc/rust/rust-session-manager.cc | 91 +-
gcc/rust/rust-session-manager.h | 27 +-
gcc/rust/typecheck/rust-autoderef.cc | 27 +-
gcc/rust/typecheck/rust-coercion.cc | 62 +-
gcc/rust/typecheck/rust-hir-dot-operator.cc | 101 +-
gcc/rust/typecheck/rust-hir-dot-operator.h | 22 +-
.../typecheck/rust-hir-inherent-impl-overlap.h | 5 +-
gcc/rust/typecheck/rust-hir-path-probe.cc | 46 +
gcc/rust/typecheck/rust-hir-path-probe.h | 132 +-
gcc/rust/typecheck/rust-hir-trait-ref.h | 43 +
gcc/rust/typecheck/rust-hir-trait-resolve.cc | 92 +-
gcc/rust/typecheck/rust-hir-trait-resolve.h | 10 +-
gcc/rust/typecheck/rust-hir-type-check-base.cc | 140 +-
gcc/rust/typecheck/rust-hir-type-check-base.h | 16 +-
gcc/rust/typecheck/rust-hir-type-check-enumitem.cc | 16 +-
gcc/rust/typecheck/rust-hir-type-check-expr.cc | 546 +-
gcc/rust/typecheck/rust-hir-type-check-expr.h | 44 +-
gcc/rust/typecheck/rust-hir-type-check-implitem.cc | 186 +-
gcc/rust/typecheck/rust-hir-type-check-implitem.h | 42 +-
gcc/rust/typecheck/rust-hir-type-check-item.cc | 552 +-
gcc/rust/typecheck/rust-hir-type-check-item.h | 51 +-
gcc/rust/typecheck/rust-hir-type-check-path.cc | 16 +-
gcc/rust/typecheck/rust-hir-type-check-pattern.cc | 14 +-
gcc/rust/typecheck/rust-hir-type-check-stmt.cc | 400 +-
gcc/rust/typecheck/rust-hir-type-check-stmt.h | 62 +-
gcc/rust/typecheck/rust-hir-type-check-struct.cc | 41 +-
gcc/rust/typecheck/rust-hir-type-check-toplevel.cc | 24 +-
gcc/rust/typecheck/rust-hir-type-check-type.cc | 120 +-
gcc/rust/typecheck/rust-hir-type-check.cc | 21 +-
gcc/rust/typecheck/rust-hir-type-check.h | 84 +
gcc/rust/typecheck/rust-substitution-mapper.h | 2 +-
gcc/rust/typecheck/rust-tyctx.cc | 35 +
gcc/rust/typecheck/rust-tyty-bounds.cc | 107 +-
gcc/rust/typecheck/rust-tyty-call.cc | 133 +-
gcc/rust/typecheck/rust-tyty-call.h | 79 +-
gcc/rust/typecheck/rust-tyty-cmp.h | 43 +-
gcc/rust/typecheck/rust-tyty-rules.h | 304 +-
gcc/rust/typecheck/rust-tyty.cc | 227 +-
gcc/rust/typecheck/rust-tyty.h | 164 +-
gcc/rust/util/rust-abi.cc | 2 +
gcc/rust/util/rust-attributes.cc | 345 +-
gcc/rust/util/rust-hir-map.cc | 85 +-
gcc/rust/util/rust-hir-map.h | 11 +
gcc/rust/util/rust-inline-visitor.h | 92 +
gcc/rust/util/rust-lang-item.h | 25 +
gcc/rust/util/rust-optional.h | 1 +
gcc/sanopt.cc | 17 +-
gcc/sbitmap.h | 16 +-
gcc/sched-deps.cc | 9 +-
gcc/sched-int.h | 8 +-
gcc/sel-sched-dump.cc | 10 -
gcc/sel-sched-ir.h | 50 +-
gcc/selftest-diagnostic.cc | 1 +
gcc/sese.h | 30 +-
gcc/simplify-rtx.cc | 45 +-
gcc/sparseset.h | 22 +-
gcc/ssa-iterators.h | 86 +-
gcc/system.h | 6 +-
gcc/target-globals.h | 2 +-
gcc/target.def | 44 +-
gcc/target.h | 9 +-
gcc/targhooks.cc | 22 +-
gcc/targhooks.h | 6 +-
gcc/testsuite/ChangeLog | 10405 +++++++
gcc/testsuite/ada/acats/run_all.sh | 4 +-
gcc/testsuite/c-c++-common/Wdangling-pointer-10.c | 12 +
gcc/testsuite/c-c++-common/Wdangling-pointer-5.c | 4 +-
gcc/testsuite/c-c++-common/Wdangling-pointer-9.c | 9 +
gcc/testsuite/c-c++-common/Wsign-compare-2.c | 112 +
gcc/testsuite/c-c++-common/Wsizeof-array-div1.c | 6 +-
gcc/testsuite/c-c++-common/Wunused-var-18.c | 10 +
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.../c-c++-common/asan/pointer-subtract-5.c | 15 +
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gcc/testsuite/c-c++-common/auto-init-7.c | 2 +-
gcc/testsuite/c-c++-common/auto-init-8.c | 2 +-
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gcc/testsuite/c-c++-common/gomp/allocate-5.c | 36 +
gcc/testsuite/c-c++-common/gomp/map-8.c | 19 +
gcc/testsuite/c-c++-common/hwasan/arguments-3.c | 6 +-
gcc/testsuite/c-c++-common/pr107465.c | 22 +
gcc/testsuite/c-c++-common/pr108605.c | 24 +
gcc/testsuite/c-c++-common/ubsan/bounds-16.c | 15 +
gcc/testsuite/c-c++-common/ubsan/bounds-17.c | 17 +
gcc/testsuite/c-c++-common/ubsan/bounds-18.c | 17 +
gcc/testsuite/c-c++-common/ubsan/bounds-19.c | 20 +
gcc/testsuite/c-c++-common/ubsan/bounds-20.c | 16 +
gcc/testsuite/c-c++-common/ubsan/bounds-21.c | 18 +
gcc/testsuite/c-c++-common/ubsan/pr108880.c | 13 +
gcc/testsuite/g++.dg/DRs/dr2475.C | 6 +
gcc/testsuite/g++.dg/DRs/dr2478.C | 74 +
gcc/testsuite/g++.dg/DRs/dr2518.C | 7 +
gcc/testsuite/g++.dg/DRs/dr2530.C | 5 +
gcc/testsuite/g++.dg/DRs/dr2664.C | 17 +
gcc/testsuite/g++.dg/DRs/dr2673.C | 24 +
gcc/testsuite/g++.dg/abi/anon6.C | 19 +
gcc/testsuite/g++.dg/abi/empty12.C | 2 +-
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gcc/testsuite/g++.dg/abi/no_unique_address7.C | 33 +
gcc/testsuite/g++.dg/cet-notrack-1.C | 4 +-
gcc/testsuite/g++.dg/contracts/contracts-err1.C | 7 +
gcc/testsuite/g++.dg/coroutines/pr100127.C | 3 +-
gcc/testsuite/g++.dg/coroutines/pr100772-a.C | 3 +-
gcc/testsuite/g++.dg/coroutines/pr100772-b.C | 3 +-
gcc/testsuite/g++.dg/cpp0x/constexpr-nsdmi2.C | 9 +
gcc/testsuite/g++.dg/cpp0x/constexpr-nsdmi3.C | 17 +
gcc/testsuite/g++.dg/cpp0x/initlist-array18.C | 30 +
gcc/testsuite/g++.dg/cpp0x/initlist-array19.C | 23 +
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gcc/testsuite/g++.dg/cpp0x/lambda/lambda-108829.C | 11 +
gcc/testsuite/g++.dg/cpp0x/new6.C | 13 +
gcc/testsuite/g++.dg/cpp0x/noexcept77.C | 9 +
gcc/testsuite/g++.dg/cpp0x/overload-conv-5.C | 21 +
gcc/testsuite/g++.dg/cpp0x/overload5.C | 12 +
gcc/testsuite/g++.dg/cpp0x/overload5a.C | 10 +
gcc/testsuite/g++.dg/cpp0x/overload6.C | 16 +
gcc/testsuite/g++.dg/cpp0x/pr108698.C | 16 +
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gcc/testsuite/g++.dg/cpp0x/ptrmem-cst1.C | 11 +
gcc/testsuite/g++.dg/cpp0x/udlit-error1.C | 21 +
gcc/testsuite/g++.dg/cpp0x/variadic-alias8.C | 95 +
gcc/testsuite/g++.dg/cpp0x/variadic184.C | 12 +
gcc/testsuite/g++.dg/cpp1y/constexpr-108158.C | 32 +
gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi10.C | 18 +
gcc/testsuite/g++.dg/cpp1y/noexcept1.C | 4 +-
gcc/testsuite/g++.dg/cpp1y/pr108606.C | 11 +
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gcc/testsuite/g++.dg/cpp2a/concepts-lambda3.C | 4 +-
gcc/testsuite/g++.dg/cpp2a/concepts-new1.C | 13 +
gcc/testsuite/g++.dg/cpp2a/concepts-pr108579.C | 14 +
.../g++.dg/cpp2a/is-constant-evaluated14.C | 140 +
gcc/testsuite/g++.dg/cpp2a/lambda-generic11.C | 13 +
gcc/testsuite/g++.dg/debug/dwarf2/pr108716.C | 14 +
gcc/testsuite/g++.dg/debug/pr108967.C | 41 +
gcc/testsuite/g++.dg/ext/attr-copy-2.C | 60 +-
gcc/testsuite/g++.dg/ext/builtin-object-size1.C | 260 +-
gcc/testsuite/g++.dg/ext/builtin-object-size2.C | 260 +-
gcc/testsuite/g++.dg/ext/int128-7.C | 4 +
gcc/testsuite/g++.dg/ext/is_deducible1.C | 35 +
gcc/testsuite/g++.dg/ext/stmtexpr19.C | 2 +-
gcc/testsuite/g++.dg/gomp/attrs-10.C | 6 +-
gcc/testsuite/g++.dg/gomp/declare-simd-8.C | 1 +
gcc/testsuite/g++.dg/gomp/pr105839-1.C | 25 +
gcc/testsuite/g++.dg/gomp/pr105839-2.C | 24 +
gcc/testsuite/g++.dg/gomp/pr107558.C | 14 +
gcc/testsuite/g++.dg/gomp/pr108503.C | 27 +
gcc/testsuite/g++.dg/gomp/pr108607.C | 47 +
gcc/testsuite/g++.dg/ipa/pr106258.C | 5 +
gcc/testsuite/g++.dg/ipa/pr108509.C | 22 +
gcc/testsuite/g++.dg/lto/pr108772_0.C | 46 +
gcc/testsuite/g++.dg/modules/modules.exp | 21 +
gcc/testsuite/g++.dg/modules/virt-2_a.C | 3 +
gcc/testsuite/g++.dg/opt/is_constant_evaluated1.C | 20 +
gcc/testsuite/g++.dg/opt/is_constant_evaluated2.C | 32 +
gcc/testsuite/g++.dg/opt/is_constant_evaluated3.C | 23 +
gcc/testsuite/g++.dg/opt/pr108854.C | 37 +
gcc/testsuite/g++.dg/pr107411.C | 10 +
gcc/testsuite/g++.dg/pr108520.C | 17 +
gcc/testsuite/g++.dg/pr71488.C | 1 +
gcc/testsuite/g++.dg/rtti/pr109042.C | 20 +
gcc/testsuite/g++.dg/template/call9.C | 26 +
gcc/testsuite/g++.dg/template/typename24.C | 18 +
gcc/testsuite/g++.dg/template/typename25.C | 33 +
gcc/testsuite/g++.dg/template/typename25a.C | 37 +
gcc/testsuite/g++.dg/template/typename26.C | 19 +
gcc/testsuite/g++.dg/torture/pr108647.C | 25 +
gcc/testsuite/g++.dg/torture/pr108888.C | 18 +
gcc/testsuite/g++.dg/tree-ssa/pr107876.C | 2 +-
gcc/testsuite/g++.dg/ubsan/bounds-1.C | 8 +
gcc/testsuite/g++.dg/warn/Waddress-5.C | 6 +-
.../g++.dg/warn/Waddress-of-packed-member3.C | 23 +
gcc/testsuite/g++.dg/warn/Warray-bounds-16.C | 1 +
gcc/testsuite/g++.dg/warn/Wdangling-pointer.C | 29 +-
gcc/testsuite/g++.dg/warn/Wdangling-reference8.C | 77 +
gcc/testsuite/g++.dg/warn/Wdangling-reference9.C | 21 +
gcc/testsuite/g++.dg/warn/Wduplicated-cond3.C | 38 +
gcc/testsuite/g++.dg/warn/Wduplicated-cond4.C | 17 +
gcc/testsuite/g++.dg/warn/Wduplicated-cond5.C | 16 +
gcc/testsuite/g++.dg/warn/Wlogical-op-4.C | 23 +
gcc/testsuite/g++.dg/warn/Wmismatched-tags-11.C | 23 +
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gcc/testsuite/g++.dg/warn/Wstringop-overflow-4.C | 2 +-
gcc/testsuite/g++.dg/warn/changes-meaning2.C | 16 +
gcc/testsuite/g++.dg/warn/changes-meaning3.C | 13 +
.../g++.target/aarch64/bfloat_cpp_typecheck.C | 4 +-
gcc/testsuite/g++.target/aarch64/pr103147-10.C | 2 +-
gcc/testsuite/g++.target/aarch64/sve/pr99766.C | 2 +-
gcc/testsuite/g++.target/i386/empty-class2.C | 1 -
gcc/testsuite/g++.target/i386/pr108711.C | 20 +
gcc/testsuite/g++.target/i386/pr108934.C | 28 +
gcc/testsuite/g++.target/loongarch/bytepick.C | 32 +
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.../g++.target/riscv/rvv/base/vasub_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vv_tum-1.C | 160 +
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.../g++.target/riscv/rvv/base/vasub_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vx_mu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vasub_vx_mu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vasub_vx_mu_rv32-3.C | 157 +
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.../g++.target/riscv/rvv/base/vasub_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vasub_vx_rv32-1.C | 308 +
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.../g++.target/riscv/rvv/base/vasub_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vasub_vx_rv64-3.C | 314 +
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.../g++.target/riscv/rvv/base/vasub_vx_tu_rv32-3.C | 157 +
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.../g++.target/riscv/rvv/base/vasub_vx_tu_rv64-3.C | 160 +
.../riscv/rvv/base/vasub_vx_tum_rv32-1.C | 157 +
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.../riscv/rvv/base/vasub_vx_tum_rv32-3.C | 157 +
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.../riscv/rvv/base/vasub_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vasub_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vasubu_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vasubu_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vasubu_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_mu-3.C | 160 +
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.../g++.target/riscv/rvv/base/vasubu_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_tum-1.C | 160 +
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.../g++.target/riscv/rvv/base/vasubu_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vv_tumu-3.C | 160 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-1.C | 157 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-2.C | 157 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-3.C | 157 +
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.../riscv/rvv/base/vasubu_vx_mu_rv64-2.C | 160 +
.../riscv/rvv/base/vasubu_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vasubu_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vasubu_vx_rv32-2.C | 308 +
.../g++.target/riscv/rvv/base/vasubu_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vasubu_vx_rv64-1.C | 314 +
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.../g++.target/riscv/rvv/base/vasubu_vx_rv64-3.C | 314 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-1.C | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-2.C | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-3.C | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv64-1.C | 160 +
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.../riscv/rvv/base/vasubu_vx_tu_rv64-3.C | 160 +
.../riscv/rvv/base/vasubu_vx_tum_rv32-1.C | 157 +
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.../riscv/rvv/base/vasubu_vx_tum_rv32-3.C | 157 +
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.../riscv/rvv/base/vasubu_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv64-1.C | 160 +
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.../riscv/rvv/base/vasubu_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vdiv_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vdiv_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vdiv_vv_mu-1.C | 160 +
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.../g++.target/riscv/rvv/base/vdiv_vv_tu-3.C | 160 +
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.../g++.target/riscv/rvv/base/vdiv_vv_tumu-1.C | 160 +
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.../g++.target/riscv/rvv/base/vdiv_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vx_rv32-1.C | 308 +
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.../g++.target/riscv/rvv/base/vdiv_vx_rv32-3.C | 308 +
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.../g++.target/riscv/rvv/base/vdiv_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vdiv_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv64-1.C | 160 +
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.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vdiv_vx_tum_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_tum_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vdiv_vx_tum_rv32-3.C | 157 +
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.../g++.target/riscv/rvv/base/vdiv_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-3.C | 157 +
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.../riscv/rvv/base/vdiv_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vdiv_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv32-2.C | 308 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv64-1.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv64-3.C | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-1.C | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-2.C | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-3.C | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-1.C | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-3.C | 160 +
gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C | 345 +
gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C | 345 +
.../g++.target/riscv/rvv/base/vle_tum-1.C | 345 +
.../g++.target/riscv/rvv/base/vle_tumu-1.C | 345 +
.../g++.target/riscv/rvv/base/vloxei16-1.C | 660 +
.../g++.target/riscv/rvv/base/vloxei16-2.C | 660 +
.../g++.target/riscv/rvv/base/vloxei16-3.C | 660 +
.../g++.target/riscv/rvv/base/vloxei16_mu-1.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_mu-2.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_mu-3.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tu-1.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tu-2.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tu-3.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tum-1.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tum-2.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tum-3.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tumu-1.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tumu-2.C | 333 +
.../g++.target/riscv/rvv/base/vloxei16_tumu-3.C | 333 +
.../g++.target/riscv/rvv/base/vloxei32-1.C | 608 +
.../g++.target/riscv/rvv/base/vloxei32-2.C | 608 +
.../g++.target/riscv/rvv/base/vloxei32-3.C | 608 +
.../g++.target/riscv/rvv/base/vloxei32_mu-1.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_mu-2.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_mu-3.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tu-1.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tu-2.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tu-3.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tum-1.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tum-2.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tum-3.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tumu-1.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tumu-2.C | 307 +
.../g++.target/riscv/rvv/base/vloxei32_tumu-3.C | 307 +
.../g++.target/riscv/rvv/base/vloxei64-1.C | 518 +
.../g++.target/riscv/rvv/base/vloxei64-2.C | 518 +
.../g++.target/riscv/rvv/base/vloxei64-3.C | 518 +
.../g++.target/riscv/rvv/base/vloxei64_mu-1.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_mu-2.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_mu-3.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tu-1.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tu-2.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tu-3.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tum-1.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tum-2.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tum-3.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tumu-1.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tumu-2.C | 262 +
.../g++.target/riscv/rvv/base/vloxei64_tumu-3.C | 262 +
.../g++.target/riscv/rvv/base/vloxei8-1.C | 686 +
.../g++.target/riscv/rvv/base/vloxei8-2.C | 686 +
.../g++.target/riscv/rvv/base/vloxei8-3.C | 686 +
.../g++.target/riscv/rvv/base/vloxei8_mu-1.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_mu-2.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_mu-3.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tu-1.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tu-2.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tu-3.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tum-1.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tum-2.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tum-3.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tumu-1.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tumu-2.C | 346 +
.../g++.target/riscv/rvv/base/vloxei8_tumu-3.C | 346 +
gcc/testsuite/g++.target/riscv/rvv/base/vlse-1.C | 345 +
.../g++.target/riscv/rvv/base/vlse_tu-1.C | 345 +
.../g++.target/riscv/rvv/base/vlse_tum-1.C | 345 +
.../g++.target/riscv/rvv/base/vlse_tumu-1.C | 345 +
.../g++.target/riscv/rvv/base/vluxei16-1.C | 660 +
.../g++.target/riscv/rvv/base/vluxei16-2.C | 660 +
.../g++.target/riscv/rvv/base/vluxei16-3.C | 660 +
.../g++.target/riscv/rvv/base/vluxei16_mu-1.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_mu-2.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_mu-3.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tu-1.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tu-2.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tu-3.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tum-1.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tum-2.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tum-3.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tumu-1.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tumu-2.C | 333 +
.../g++.target/riscv/rvv/base/vluxei16_tumu-3.C | 333 +
.../g++.target/riscv/rvv/base/vluxei32-1.C | 608 +
.../g++.target/riscv/rvv/base/vluxei32-2.C | 608 +
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.../g++.target/riscv/rvv/base/vmacc_vv-1.C | 578 +
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.../g++.target/riscv/rvv/base/vmacc_vv_mu-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv64-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmacc_vx_rv32-1.C | 572 +
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.../g++.target/riscv/rvv/base/vmacc_vx_rv64-1.C | 578 +
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.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv32-1.C | 289 +
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.../riscv/rvv/base/vmacc_vx_tum_rv32-1.C | 289 +
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.../riscv/rvv/base/vmacc_vx_tumu_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vmadc_vv-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmadd_vv-1.C | 578 +
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.../g++.target/riscv/rvv/base/vmax_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmax_vx_tu_rv32-1.C | 157 +
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.../riscv/rvv/base/vmax_vx_tumu_rv32-1.C | 157 +
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.../g++.target/riscv/rvv/base/vmaxu_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmaxu_vx_mu_rv32-1.C | 157 +
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.../g++.target/riscv/rvv/base/vmaxu_vx_rv32-1.C | 308 +
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.../g++.target/riscv/rvv/base/vmaxu_vx_rv64-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmaxu_vx_tu_rv32-1.C | 157 +
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.../riscv/rvv/base/vmaxu_vx_tum_rv32-1.C | 157 +
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.../g++.target/riscv/rvv/base/vmerge_vvm-1.C | 292 +
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.../riscv/rvv/base/vmerge_vxm_tu_rv32-1.C | 289 +
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.../riscv/rvv/base/vmerge_vxm_tu_rv64-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmin_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmin_vv_mu-1.C | 160 +
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.../riscv/rvv/base/vmsleu_vx_mu_rv32-1.C | 157 +
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.../riscv/rvv/base/vmsleu_vx_mu_rv64-3.C | 160 +
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.../riscv/rvv/base/vmsltu_vx_mu_rv32-1.C | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv32-2.C | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv32-3.C | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-1.C | 160 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-2.C | 160 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-3.C | 160 +
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.../g++.target/riscv/rvv/base/vmsne_vv-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmsne_vx_m_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vmsne_vx_m_rv64-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmsne_vx_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vmul_vv-1.C | 578 +
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.../g++.target/riscv/rvv/base/vmul_vv-3.C | 578 +
.../g++.target/riscv/rvv/base/vmul_vv_mu-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmul_vx_rv32-1.C | 572 +
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.../g++.target/riscv/rvv/base/vmul_vx_rv64-1.C | 578 +
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.../g++.target/riscv/rvv/base/vmul_vx_rv64-3.C | 578 +
.../g++.target/riscv/rvv/base/vmul_vx_tu_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vmul_vx_tu_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vmul_vx_tu_rv64-1.C | 292 +
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.../g++.target/riscv/rvv/base/vmul_vx_tu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vmul_vx_tum_rv32-1.C | 289 +
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.../riscv/rvv/base/vmul_vx_tumu_rv32-1.C | 289 +
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.../riscv/rvv/base/vmul_vx_tumu_rv32-3.C | 289 +
.../riscv/rvv/base/vmul_vx_tumu_rv64-1.C | 292 +
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.../riscv/rvv/base/vmul_vx_tumu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vmulh_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmulh_vv_tu-3.C | 160 +
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.../g++.target/riscv/rvv/base/vmulh_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv32-1.C | 157 +
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.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv64-1.C | 160 +
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.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vmulh_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vmulh_vx_rv32-2.C | 308 +
.../g++.target/riscv/rvv/base/vmulh_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vmulh_vx_rv64-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmulh_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vmulh_vx_tu_rv32-1.C | 157 +
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.../riscv/rvv/base/vmulh_vx_tum_rv32-1.C | 157 +
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.../riscv/rvv/base/vmulh_vx_tum_rv64-1.C | 160 +
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.../riscv/rvv/base/vmulh_vx_tumu_rv32-1.C | 157 +
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.../riscv/rvv/base/vmulh_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vmulh_vx_tumu_rv64-1.C | 160 +
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.../riscv/rvv/base/vmulh_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vmulhsu_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmulhsu_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vmulhsu_vv_tum-1.C | 160 +
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.../g++.target/riscv/rvv/base/vmulhsu_vv_tum-3.C | 160 +
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.../g++.target/riscv/rvv/base/vmulhsu_vv_tumu-3.C | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-1.C | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-2.C | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-3.C | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-1.C | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-2.C | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vmulhsu_vx_rv32-1.C | 308 +
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.../g++.target/riscv/rvv/base/vmulhsu_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vmulhsu_vx_rv64-1.C | 314 +
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.../g++.target/riscv/rvv/base/vmulhsu_vx_rv64-3.C | 314 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-1.C | 157 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-2.C | 157 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-3.C | 157 +
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gcc/testsuite/g++.target/riscv/rvv/base/vmv_v-1.C | 392 +
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gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-1.C | 314 +
gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-2.C | 314 +
gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-3.C | 314 +
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.../riscv/rvv/base/vnmsac_vx_tu_rv32-1.C | 289 +
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gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-1.C | 314 +
gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-2.C | 314 +
gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-3.C | 314 +
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.../g++.target/riscv/rvv/base/vnsra_vx-1.C | 216 +
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.../g++.target/riscv/rvv/base/vnsrl_vv-1.C | 216 +
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gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-1.C | 578 +
gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-2.C | 578 +
gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-3.C | 578 +
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.../g++.target/riscv/rvv/base/vor_vx_rv64-1.C | 578 +
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.../g++.target/riscv/rvv/base/vor_vx_tu_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vrem_vv-1.C | 314 +
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.../riscv/rvv/base/vrem_vx_tumu_rv32-1.C | 157 +
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.../riscv/rvv/base/vrem_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vrem_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vrem_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vremu_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vremu_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vremu_vv-3.C | 314 +
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.../g++.target/riscv/rvv/base/vremu_vx_rv32-1.C | 308 +
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.../g++.target/riscv/rvv/base/vremu_vx_rv64-1.C | 314 +
.../g++.target/riscv/rvv/base/vremu_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vremu_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vremu_vx_tu_rv32-1.C | 157 +
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.../g++.target/riscv/rvv/base/vremu_vx_tu_rv64-1.C | 160 +
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.../riscv/rvv/base/vremu_vx_tum_rv32-1.C | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv32-2.C | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv32-3.C | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv64-1.C | 160 +
.../riscv/rvv/base/vremu_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vremu_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv32-3.C | 289 +
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.../g++.target/riscv/rvv/base/vrsub_vx_rv32-1.C | 572 +
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.../g++.target/riscv/rvv/base/vrsub_vx_rv32-3.C | 572 +
.../g++.target/riscv/rvv/base/vrsub_vx_rv64-1.C | 578 +
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.../g++.target/riscv/rvv/base/vrsub_vx_rv64-3.C | 578 +
.../g++.target/riscv/rvv/base/vrsub_vx_tu_rv32-1.C | 289 +
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.../riscv/rvv/base/vrsub_vx_tum_rv32-1.C | 289 +
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.../riscv/rvv/base/vsaddu_vx_mu_rv64-1.C | 160 +
.../riscv/rvv/base/vsaddu_vx_mu_rv64-2.C | 160 +
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.../riscv/rvv/base/vsaddu_vx_tu_rv32-1.C | 157 +
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.../riscv/rvv/base/vsaddu_vx_tum_rv32-1.C | 157 +
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.../riscv/rvv/base/vsaddu_vx_tumu_rv32-1.C | 157 +
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.../riscv/rvv/base/vsaddu_vx_tumu_rv64-1.C | 160 +
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.../g++.target/riscv/rvv/base/vsbc_vvm-1.C | 292 +
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.../g++.target/riscv/rvv/base/vsbc_vxm_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vsbc_vxm_rv64-1.C | 292 +
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.../g++.target/riscv/rvv/base/vsbc_vxm_tu_rv32-1.C | 289 +
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.../g++.target/riscv/rvv/base/vsbc_vxm_tu_rv64-1.C | 292 +
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gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C | 685 +
.../g++.target/riscv/rvv/base/vsext_vf2-1.C | 216 +
.../g++.target/riscv/rvv/base/vsext_vf2-2.C | 216 +
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.../g++.target/riscv/rvv/base/vsext_vf4_mu-1.C | 69 +
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.../g++.target/riscv/rvv/base/vsext_vf8-1.C | 62 +
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.../g++.target/riscv/rvv/base/vsext_vf8-3.C | 62 +
.../g++.target/riscv/rvv/base/vsext_vf8_mu-1.C | 34 +
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.../g++.target/riscv/rvv/base/vsext_vf8_tumu-2.C | 34 +
.../g++.target/riscv/rvv/base/vsext_vf8_tumu-3.C | 34 +
.../g++.target/riscv/rvv/base/vsll_vv-1.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vv-2.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vv-3.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vv_mu-1.C | 292 +
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.../g++.target/riscv/rvv/base/vsll_vv_tum-1.C | 292 +
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.../g++.target/riscv/rvv/base/vsll_vv_tumu-3.C | 292 +
.../g++.target/riscv/rvv/base/vsll_vx-1.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vx-2.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vx-3.C | 578 +
.../g++.target/riscv/rvv/base/vsll_vx_mu-1.C | 292 +
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gcc/testsuite/g++.target/riscv/rvv/base/vsm-1.C | 40 +
.../g++.target/riscv/rvv/base/vsmul_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vsmul_vv-2.C | 314 +
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.../g++.target/riscv/rvv/base/vsmul_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vsmul_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vsmul_vx_rv32-2.C | 308 +
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.../g++.target/riscv/rvv/base/vsmul_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.C | 160 +
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.../riscv/rvv/base/vsmul_vx_tum_rv32-1.C | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv32-2.C | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv32-3.C | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-1.C | 160 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vsoxei16-1.C | 660 +
.../g++.target/riscv/rvv/base/vsoxei16-2.C | 660 +
.../g++.target/riscv/rvv/base/vsoxei16-3.C | 660 +
.../g++.target/riscv/rvv/base/vsoxei32-1.C | 608 +
.../g++.target/riscv/rvv/base/vsoxei32-2.C | 608 +
.../g++.target/riscv/rvv/base/vsoxei32-3.C | 608 +
.../g++.target/riscv/rvv/base/vsoxei64-1.C | 518 +
.../g++.target/riscv/rvv/base/vsoxei64-2.C | 518 +
.../g++.target/riscv/rvv/base/vsoxei64-3.C | 518 +
.../g++.target/riscv/rvv/base/vsoxei8-1.C | 686 +
.../g++.target/riscv/rvv/base/vsoxei8-2.C | 686 +
.../g++.target/riscv/rvv/base/vsoxei8-3.C | 686 +
.../g++.target/riscv/rvv/base/vsra_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vsra_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vsra_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vsra_vv_mu-1.C | 160 +
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.../g++.target/riscv/rvv/base/vsra_vx-1.C | 314 +
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.../g++.target/riscv/rvv/base/vsrl_vv-1.C | 314 +
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.../g++.target/riscv/rvv/base/vsrl_vv_mu-1.C | 160 +
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.../g++.target/riscv/rvv/base/vsrl_vx-1.C | 314 +
.../g++.target/riscv/rvv/base/vsrl_vx-2.C | 314 +
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.../g++.target/riscv/rvv/base/vsrl_vx_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vsrl_vx_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vsrl_vx_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vsrl_vx_tumu-3.C | 160 +
gcc/testsuite/g++.target/riscv/rvv/base/vsse-1.C | 685 +
.../g++.target/riscv/rvv/base/vssra_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx-1.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vx-2.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vx-3.C | 314 +
.../g++.target/riscv/rvv/base/vssra_vx_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssra_vx_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx-1.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vx-2.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vx-3.C | 314 +
.../g++.target/riscv/rvv/base/vssrl_vx_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vv_tumu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vssub_vx_rv32-2.C | 308 +
.../g++.target/riscv/rvv/base/vssub_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vssub_vx_rv64-1.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vx_rv64-3.C | 314 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-1.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-2.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-3.C | 157 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-1.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-2.C | 160 +
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-3.C | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv32-1.C | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv32-2.C | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv32-3.C | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv64-1.C | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv-1.C | 314 +
.../g++.target/riscv/rvv/base/vssubu_vv-2.C | 314 +
.../g++.target/riscv/rvv/base/vssubu_vv-3.C | 314 +
.../g++.target/riscv/rvv/base/vssubu_vv_mu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_mu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_mu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tu-3.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tum-1.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tum-2.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tum-3.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-1.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-2.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-3.C | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-1.C | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-2.C | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-3.C | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-1.C | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-2.C | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-1.C | 308 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-2.C | 308 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-3.C | 308 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-1.C | 314 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-2.C | 314 +
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-3.C | 314 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-1.C | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-2.C | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-3.C | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-1.C | 160 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-2.C | 160 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-3.C | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-1.C | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-2.C | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-3.C | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-1.C | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-2.C | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-3.C | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-1.C | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-2.C | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-3.C | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-1.C | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-2.C | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-3.C | 160 +
.../g++.target/riscv/rvv/base/vsub_vv-1.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vv-2.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vv-3.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vv_mu-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_mu-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_mu-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tu-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tu-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tu-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tum-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tum-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tum-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tumu-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tumu-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vv_tumu-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_rv32-1.C | 572 +
.../g++.target/riscv/rvv/base/vsub_vx_rv32-2.C | 572 +
.../g++.target/riscv/rvv/base/vsub_vx_rv32-3.C | 572 +
.../g++.target/riscv/rvv/base/vsub_vx_rv64-1.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vx_rv64-2.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vx_rv64-3.C | 578 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-3.C | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-1.C | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-2.C | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-3.C | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-1.C | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-2.C | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vsuxei16-1.C | 660 +
.../g++.target/riscv/rvv/base/vsuxei16-2.C | 660 +
.../g++.target/riscv/rvv/base/vsuxei16-3.C | 660 +
.../g++.target/riscv/rvv/base/vsuxei32-1.C | 608 +
.../g++.target/riscv/rvv/base/vsuxei32-2.C | 608 +
.../g++.target/riscv/rvv/base/vsuxei32-3.C | 608 +
.../g++.target/riscv/rvv/base/vsuxei64-1.C | 518 +
.../g++.target/riscv/rvv/base/vsuxei64-2.C | 518 +
.../g++.target/riscv/rvv/base/vsuxei64-3.C | 518 +
.../g++.target/riscv/rvv/base/vsuxei8-1.C | 686 +
.../g++.target/riscv/rvv/base/vsuxei8-2.C | 686 +
.../g++.target/riscv/rvv/base/vsuxei8-3.C | 686 +
.../g++.target/riscv/rvv/base/vwadd_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwadd_wx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x-1.C | 216 +
.../g++.target/riscv/rvv/base/vwcvt_x-2.C | 216 +
.../g++.target/riscv/rvv/base/vwcvt_x-3.C | 216 +
.../g++.target/riscv/rvv/base/vwcvt_x_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x-1.C | 216 +
.../g++.target/riscv/rvv/base/vwcvtu_x-2.C | 216 +
.../g++.target/riscv/rvv/base/vwcvtu_x-3.C | 216 +
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccus_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccus_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmul_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsub_wx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wv-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wv-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx-1.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wx-2.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wx-3.C | 216 +
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vxor_vv-1.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vv-2.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vv-3.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vv_mu-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_mu-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_mu-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tu-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tu-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tu-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tum-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tum-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tum-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tumu-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tumu-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vv_tumu-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_rv32-1.C | 572 +
.../g++.target/riscv/rvv/base/vxor_vx_rv32-2.C | 572 +
.../g++.target/riscv/rvv/base/vxor_vx_rv32-3.C | 572 +
.../g++.target/riscv/rvv/base/vxor_vx_rv64-1.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vx_rv64-2.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vx_rv64-3.C | 578 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-1.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-2.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-3.C | 289 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-1.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-2.C | 292 +
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-3.C | 292 +
.../riscv/rvv/base/vxor_vx_tumu_rv32-1.C | 289 +
.../riscv/rvv/base/vxor_vx_tumu_rv32-2.C | 289 +
.../riscv/rvv/base/vxor_vx_tumu_rv32-3.C | 289 +
.../riscv/rvv/base/vxor_vx_tumu_rv64-1.C | 292 +
.../riscv/rvv/base/vxor_vx_tumu_rv64-2.C | 292 +
.../riscv/rvv/base/vxor_vx_tumu_rv64-3.C | 292 +
.../g++.target/riscv/rvv/base/vzext_vf2-1.C | 216 +
.../g++.target/riscv/rvv/base/vzext_vf2-2.C | 216 +
.../g++.target/riscv/rvv/base/vzext_vf2-3.C | 216 +
.../g++.target/riscv/rvv/base/vzext_vf2_mu-1.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_mu-2.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_mu-3.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tu-1.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tu-2.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tu-3.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tum-1.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tum-2.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tum-3.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-1.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-2.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-3.C | 111 +
.../g++.target/riscv/rvv/base/vzext_vf4-1.C | 132 +
.../g++.target/riscv/rvv/base/vzext_vf4-2.C | 132 +
.../g++.target/riscv/rvv/base/vzext_vf4-3.C | 132 +
.../g++.target/riscv/rvv/base/vzext_vf4_mu-1.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_mu-2.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_mu-3.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tu-1.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tu-2.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tu-3.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tum-1.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tum-2.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tum-3.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-1.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-2.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-3.C | 69 +
.../g++.target/riscv/rvv/base/vzext_vf8-1.C | 62 +
.../g++.target/riscv/rvv/base/vzext_vf8-2.C | 62 +
.../g++.target/riscv/rvv/base/vzext_vf8-3.C | 62 +
.../g++.target/riscv/rvv/base/vzext_vf8_mu-1.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_mu-2.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_mu-3.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tu-1.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tu-2.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tu-3.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tum-1.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tum-2.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tum-3.C | 34 +
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.../g++.target/riscv/rvv/base/vzext_vf8_tumu-2.C | 34 +
.../g++.target/riscv/rvv/base/vzext_vf8_tumu-3.C | 34 +
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.../analyzer/deref-before-check-pr108475-1.c | 51 +
.../deref-before-check-pr108475-haproxy-tcpcheck.c | 169 +
.../deref-before-check-pr109060-haproxy-cfgparse.c | 92 +
.../deref-before-check-qemu-qtest_rsp_args.c | 73 +
.../gcc.dg/analyzer/doom-d_main-IdentifyVersion.c | 272 +
.../gcc.dg/analyzer/doom-s_sound-pr108867.c | 653 +
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.../analyzer/infinite-recursion-pr108524-2.c | 113 +
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.../gcc.dg/analyzer/null-deref-pr105755.c | 193 +
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...ull-deref-pr108251-smp_fetch_ssl_fc_has_early.c | 96 +
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gcc/testsuite/gcc.dg/vect/vect-simd-clone-16.c | 89 +
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gcc/testsuite/gcc.target/aarch64/tbz_2.c | 130 +
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gcc/testsuite/gcc.target/arm/pr51534.c | 9 +-
gcc/testsuite/gcc.target/arm/pr51534s.c | 72 +
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gcc/testsuite/gcc.target/gcn/cond_fmaxnm_1.c | 33 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_1_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_2.c | 33 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_2_run.c | 31 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c | 35 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c | 35 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_5.c | 9 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_5_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_6.c | 9 +
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gcc/testsuite/gcc.target/gcn/cond_fmaxnm_7.c | 9 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_7_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_8.c | 9 +
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gcc/testsuite/gcc.target/gcn/cond_fminnm_1.c | 10 +
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gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c | 12 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_4_run.c | 5 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_5.c | 10 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_5_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_6.c | 10 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_6_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_7.c | 10 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_7_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_8.c | 10 +
gcc/testsuite/gcc.target/gcn/cond_fminnm_8_run.c | 4 +
gcc/testsuite/gcc.target/gcn/cond_shift_3.c | 37 +
gcc/testsuite/gcc.target/gcn/cond_shift_3_run.c | 27 +
gcc/testsuite/gcc.target/gcn/cond_shift_4.c | 38 +
gcc/testsuite/gcc.target/gcn/cond_shift_4_run.c | 27 +
gcc/testsuite/gcc.target/gcn/cond_shift_8.c | 35 +
gcc/testsuite/gcc.target/gcn/cond_shift_8_run.c | 28 +
gcc/testsuite/gcc.target/gcn/cond_shift_9.c | 36 +
gcc/testsuite/gcc.target/gcn/cond_shift_9_run.c | 28 +
gcc/testsuite/gcc.target/gcn/cond_smax_1.c | 57 +
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gcc/testsuite/gcc.target/gcn/cond_smin_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umax_1.c | 54 +
gcc/testsuite/gcc.target/gcn/cond_umax_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umin_1.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umin_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/simd-math-1.c | 206 +
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gcc/testsuite/gcc.target/gcn/smax_1.c | 47 +
gcc/testsuite/gcc.target/gcn/smax_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/smin_1.c | 47 +
gcc/testsuite/gcc.target/gcn/smin_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/umax_1.c | 45 +
gcc/testsuite/gcc.target/gcn/umax_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/umin_1.c | 45 +
gcc/testsuite/gcc.target/gcn/umin_1_run.c | 48 +
gcc/testsuite/gcc.target/i386/auto-init-4.c | 5 +-
gcc/testsuite/gcc.target/i386/avx2-pr108599.c | 32 +
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gcc/testsuite/gcc.target/i386/pr108724.c | 15 +
gcc/testsuite/gcc.target/i386/pr108774.c | 11 +
gcc/testsuite/gcc.target/i386/pr108831-1.c | 63 +
gcc/testsuite/gcc.target/i386/pr108831-2.c | 55 +
gcc/testsuite/gcc.target/i386/pr108832.c | 19 +
gcc/testsuite/gcc.target/i386/pr85593.c | 2 +-
gcc/testsuite/gcc.target/i386/pr90007.c | 2 +-
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gcc/testsuite/gcc.target/i386/pr98063.c | 2 +-
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gcc/testsuite/gcc.target/i386/pr99531.c | 4 +-
gcc/testsuite/gcc.target/i386/sse-23.c | 2 +-
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gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c | 10 +
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c | 9 +
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c | 10 +
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gcc/testsuite/gcc.target/mips/clo.c | 11 +
gcc/testsuite/gcc.target/mips/clz.c | 10 +
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gcc/testsuite/gcc.target/mips/mips.exp | 3 +
gcc/testsuite/gcc.target/mips/msa-ds.c | 8 +-
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.../powerpc/bfp/scalar-test-data-class-14.c | 1 +
.../powerpc/bfp/scalar-test-data-class-15.c | 1 +
.../gcc.target/powerpc/bfp/scalar-test-neg-8.c | 1 +
.../gcc.target/powerpc/bfp/vec-test-data-class-9.c | 1 +
.../powerpc/fold-vec-extract-double.p9.c | 8 +-
.../gcc.target/powerpc/p9-vec-length-epil-1.c | 2 +-
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gcc/testsuite/gcc.target/powerpc/pr101384-2.c | 2 +-
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gcc/testsuite/gcc.target/powerpc/pr108787.c | 6 +
gcc/testsuite/gcc.target/powerpc/pr108862.c | 6 +
gcc/testsuite/gcc.target/powerpc/pr96373.c | 31 +
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gcc/testsuite/gcc.target/riscv/pr108987.c | 9 +
.../riscv/rvv/base/binop_vv_constraint-1.c | 132 +
.../riscv/rvv/base/binop_vv_constraint-2.c | 15 +
.../riscv/rvv/base/binop_vv_constraint-3.c | 27 +
.../riscv/rvv/base/binop_vv_constraint-4.c | 27 +
.../riscv/rvv/base/binop_vv_constraint-5.c | 29 +
.../riscv/rvv/base/binop_vv_constraint-6.c | 27 +
.../riscv/rvv/base/binop_vv_constraint-7.c | 29 +
.../riscv/rvv/base/binop_vx_constraint-1.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-10.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-100.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-101.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-102.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-103.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-104.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-105.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-106.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-107.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-108.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-109.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-11.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-110.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-111.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-112.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-113.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-114.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-115.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-116.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-117.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-118.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-119.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-12.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-120.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-121.c | 55 +
.../riscv/rvv/base/binop_vx_constraint-122.c | 21 +
.../riscv/rvv/base/binop_vx_constraint-123.c | 15 +
.../riscv/rvv/base/binop_vx_constraint-124.c | 27 +
.../riscv/rvv/base/binop_vx_constraint-125.c | 27 +
.../riscv/rvv/base/binop_vx_constraint-126.c | 29 +
.../riscv/rvv/base/binop_vx_constraint-127.c | 27 +
.../riscv/rvv/base/binop_vx_constraint-128.c | 29 +
.../riscv/rvv/base/binop_vx_constraint-129.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-13.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-130.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-131.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-132.c | 59 +
.../riscv/rvv/base/binop_vx_constraint-133.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-134.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-135.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-136.c | 59 +
.../riscv/rvv/base/binop_vx_constraint-137.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-138.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-139.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-14.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-140.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-141.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-142.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-143.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-144.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-145.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-146.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-147.c | 19 +
.../riscv/rvv/base/binop_vx_constraint-148.c | 20 +
.../riscv/rvv/base/binop_vx_constraint-149.c | 19 +
.../riscv/rvv/base/binop_vx_constraint-15.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-150.c | 21 +
.../riscv/rvv/base/binop_vx_constraint-151.c | 20 +
.../riscv/rvv/base/binop_vx_constraint-152.c | 20 +
.../riscv/rvv/base/binop_vx_constraint-153.c | 75 +
.../riscv/rvv/base/binop_vx_constraint-154.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-155.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-156.c | 65 +
.../riscv/rvv/base/binop_vx_constraint-157.c | 133 +
.../riscv/rvv/base/binop_vx_constraint-158.c | 69 +
.../riscv/rvv/base/binop_vx_constraint-159.c | 65 +
.../riscv/rvv/base/binop_vx_constraint-16.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-160.c | 133 +
.../riscv/rvv/base/binop_vx_constraint-161.c | 76 +
.../riscv/rvv/base/binop_vx_constraint-162.c | 17 +
.../riscv/rvv/base/binop_vx_constraint-163.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-164.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-165.c | 13 +
.../riscv/rvv/base/binop_vx_constraint-166.c | 15 +
.../riscv/rvv/base/binop_vx_constraint-167.c | 143 +
.../riscv/rvv/base/binop_vx_constraint-168.c | 143 +
.../riscv/rvv/base/binop_vx_constraint-169.c | 163 +
.../riscv/rvv/base/binop_vx_constraint-17.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-170.c | 163 +
.../riscv/rvv/base/binop_vx_constraint-171.c | 75 +
.../riscv/rvv/base/binop_vx_constraint-172.c | 71 +
.../riscv/rvv/base/binop_vx_constraint-173.c | 75 +
.../riscv/rvv/base/binop_vx_constraint-174.c | 71 +
.../riscv/rvv/base/binop_vx_constraint-18.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-19.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-2.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-20.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-21.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-22.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-23.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-24.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-25.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-26.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-27.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-28.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-29.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-3.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-30.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-31.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-32.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-33.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-34.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-35.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-36.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-37.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-38.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-39.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-4.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-40.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-41.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-42.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-43.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-44.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-45.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-46.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-47.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-48.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-49.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-5.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-50.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-51.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-52.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-53.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-54.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-55.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-56.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-57.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-58.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-59.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-6.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-60.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-61.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-62.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-63.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-64.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-65.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-66.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-67.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-68.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-69.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-7.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-70.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-71.c | 16 +
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.../riscv/rvv/base/binop_vx_constraint-75.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-76.c | 16 +
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.../riscv/rvv/base/binop_vx_constraint-79.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-8.c | 160 +
.../riscv/rvv/base/binop_vx_constraint-80.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-81.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-82.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-83.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-84.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-85.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-86.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-87.c | 16 +
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.../riscv/rvv/base/binop_vx_constraint-89.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-9.c | 132 +
.../riscv/rvv/base/binop_vx_constraint-90.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-91.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-92.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-93.c | 16 +
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.../riscv/rvv/base/binop_vx_constraint-95.c | 16 +
.../riscv/rvv/base/binop_vx_constraint-96.c | 18 +
.../riscv/rvv/base/binop_vx_constraint-97.c | 123 +
.../riscv/rvv/base/binop_vx_constraint-98.c | 72 +
.../riscv/rvv/base/binop_vx_constraint-99.c | 16 +
.../gcc.target/riscv/rvv/base/merge_constraint-1.c | 204 +
.../gcc.target/riscv/rvv/base/pr108185-1.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-2.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-3.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-4.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-5.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-6.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-7.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-8.c | 77 +
.../gcc.target/riscv/rvv/base/scalar_move-1.c | 75 +
.../gcc.target/riscv/rvv/base/scalar_move-2.c | 62 +
.../gcc.target/riscv/rvv/base/scalar_move-3.c | 58 +
.../gcc.target/riscv/rvv/base/scalar_move-4.c | 54 +
.../gcc.target/riscv/rvv/base/scalar_move-5.c | 176 +
.../gcc.target/riscv/rvv/base/scalar_move-6.c | 209 +
.../gcc.target/riscv/rvv/base/scalar_move-7.c | 176 +
.../gcc.target/riscv/rvv/base/scalar_move-8.c | 201 +
.../riscv/rvv/base/shift_vx_constraint-1.c | 134 +
.../riscv/rvv/base/ternop_vv_constraint-1.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-2.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-3.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-4.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-5.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-6.c | 83 +
.../riscv/rvv/base/ternop_vx_constraint-1.c | 71 +
.../riscv/rvv/base/ternop_vx_constraint-2.c | 38 +
.../riscv/rvv/base/ternop_vx_constraint-3.c | 125 +
.../riscv/rvv/base/ternop_vx_constraint-4.c | 123 +
.../riscv/rvv/base/ternop_vx_constraint-5.c | 123 +
.../riscv/rvv/base/ternop_vx_constraint-6.c | 130 +
.../riscv/rvv/base/ternop_vx_constraint-7.c | 130 +
.../riscv/rvv/base/ternop_vx_constraint-8.c | 71 +
.../riscv/rvv/base/ternop_vx_constraint-9.c | 71 +
.../riscv/rvv/base/unop_v_constraint-1.c | 132 +
.../riscv/rvv/base/unop_v_constraint-2.c | 132 +
.../gcc.target/riscv/rvv/base/vaadd_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_tu_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vaadd_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vaadd_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vaadd_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vaadd_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vaadd_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vaadd_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vaadd_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vaadd_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vaadd_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vaadd_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vaadd_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vaadd_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vaadd_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vaaddu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vaaddu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vaaddu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vaaddu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vaaddu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vaaddu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vaaddu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vaaddu_vx_tumu_rv64-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-1.c | 27 +
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-2.c | 48 +
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-3.c | 78 +
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-4.c | 79 +
.../gcc.target/riscv/rvv/base/vadc_vvm-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vvm-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vvm-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vvm_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vvm_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vvm_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadc_vxm_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vadd_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vadd_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vadd_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vadd_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vadd_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vadd_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vadd_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vand_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vand_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vand_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vand_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vand_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vand_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vand_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vasub_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vasub_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vasub_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vasub_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vasub_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vasub_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vasub_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vasub_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vasubu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vasubu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vasubu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vasubu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vasubu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vasubu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vasubu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vasubu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vasubu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vasubu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vasubu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vasubu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vasubu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vasubu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vasubu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vasubu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vasubu_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vdiv_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vdiv_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vdiv_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vdiv_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vdivu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vdivu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vdivu_vx_tumu_rv64-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle-3.c | 345 +
.../gcc.target/riscv/rvv/base/vle-constraint-1.c | 12 +-
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-3.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-1.c | 344 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-2.c | 344 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-3.c | 344 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-3.c | 345 +
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.../gcc.target/riscv/rvv/base/vle_tum-3.c | 345 +
.../gcc.target/riscv/rvv/base/vle_tumu-1.c | 345 +
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.../gcc.target/riscv/rvv/base/vle_tumu-3.c | 345 +
.../gcc.target/riscv/rvv/base/vlm_vsm-1.c | 75 +
.../gcc.target/riscv/rvv/base/vlm_vsm-2.c | 75 +
.../gcc.target/riscv/rvv/base/vlm_vsm-3.c | 75 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_v.c | 1448 +
.../gcc.target/riscv/rvv/base/vloxei16_v-1.c | 333 +
.../gcc.target/riscv/rvv/base/vloxei16_v-2.c | 333 +
.../gcc.target/riscv/rvv/base/vloxei16_v-3.c | 333 +
.../gcc.target/riscv/rvv/base/vloxei16_v_m-1.c | 333 +
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.../gcc.target/riscv/rvv/base/vloxei16_v_tumu-1.c | 333 +
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.../gcc.target/riscv/rvv/base/vloxei16_v_tumu-3.c | 333 +
.../gcc.target/riscv/rvv/base/vloxei32_v-1.c | 307 +
.../gcc.target/riscv/rvv/base/vloxei32_v-2.c | 307 +
.../gcc.target/riscv/rvv/base/vloxei32_v-3.c | 307 +
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.../gcc.target/riscv/rvv/base/vloxei32_v_m-3.c | 307 +
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.../gcc.target/riscv/rvv/base/vloxei32_v_mu-3.c | 307 +
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.../gcc.target/riscv/rvv/base/vloxei32_v_tumu-3.c | 307 +
.../gcc.target/riscv/rvv/base/vloxei64_v-1.c | 262 +
.../gcc.target/riscv/rvv/base/vloxei64_v-2.c | 262 +
.../gcc.target/riscv/rvv/base/vloxei64_v-3.c | 262 +
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.../gcc.target/riscv/rvv/base/vloxei64_v_m-3.c | 262 +
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.../gcc.target/riscv/rvv/base/vloxei8_v-1.c | 346 +
.../gcc.target/riscv/rvv/base/vloxei8_v-2.c | 346 +
.../gcc.target/riscv/rvv/base/vloxei8_v-3.c | 346 +
.../gcc.target/riscv/rvv/base/vloxei8_v_m-1.c | 346 +
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.../gcc.target/riscv/rvv/base/vloxei8_v_tumu-3.c | 346 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-3.c | 345 +
.../riscv/rvv/base/vlse-vsse-constraint-1.c | 113 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-3.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_mu-1.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_mu-2.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_mu-3.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tu-1.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tu-2.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tu-3.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tum-1.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tum-2.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tum-3.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tumu-1.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tumu-2.c | 345 +
.../gcc.target/riscv/rvv/base/vlse_tumu-3.c | 345 +
.../gcc.target/riscv/rvv/base/vluxei16_v-1.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v-2.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v-3.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_m-1.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_m-2.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_m-3.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_mu-1.c | 333 +
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.../gcc.target/riscv/rvv/base/vluxei16_v_mu-3.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tu-1.c | 333 +
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.../gcc.target/riscv/rvv/base/vluxei16_v_tum-1.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tum-2.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tum-3.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-1.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-2.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei16_v_tumu-3.c | 333 +
.../gcc.target/riscv/rvv/base/vluxei32_v-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_m-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_m-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_m-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_mu-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tu-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tum-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-1.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-2.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-3.c | 307 +
.../gcc.target/riscv/rvv/base/vluxei64_v-1.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v-2.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v-3.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_m-1.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_m-2.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_m-3.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-1.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-2.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_mu-3.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_tu-1.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei64_v_tu-2.c | 262 +
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.../gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c | 262 +
.../gcc.target/riscv/rvv/base/vluxei8_v-1.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v-2.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v-3.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_m-1.c | 346 +
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.../gcc.target/riscv/rvv/base/vluxei8_v_m-3.c | 346 +
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.../gcc.target/riscv/rvv/base/vluxei8_v_mu-3.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-1.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-2.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_tu-3.c | 346 +
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.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-1.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-2.c | 346 +
.../gcc.target/riscv/rvv/base/vluxei8_v_tumu-3.c | 346 +
.../riscv/rvv/base/vlxei-vsxei-constraint-1.c | 121 +
.../gcc.target/riscv/rvv/base/vmacc_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmacc_vx_tu_rv64-3.c | 292 +
.../riscv/rvv/base/vmacc_vx_tum_rv32-1.c | 289 +
.../riscv/rvv/base/vmacc_vx_tum_rv32-2.c | 289 +
.../riscv/rvv/base/vmacc_vx_tum_rv32-3.c | 289 +
.../riscv/rvv/base/vmacc_vx_tum_rv64-1.c | 292 +
.../riscv/rvv/base/vmacc_vx_tum_rv64-2.c | 292 +
.../riscv/rvv/base/vmacc_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vmacc_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vmacc_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vmacc_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vmacc_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vmacc_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vmacc_vx_tumu_rv64-3.c | 292 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-1.c | 25 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-2.c | 43 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-3.c | 78 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-4.c | 79 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-5.c | 24 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-6.c | 43 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-7.c | 85 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-8.c | 86 +
.../gcc.target/riscv/rvv/base/vmadc_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vvm-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vvm-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vvm-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadc_vxm_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vxm_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vxm_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadc_vxm_rv64-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vv-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vv_tu-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vv_tumu-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_mu_rv64-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_rv64-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmadd_vx_tu_rv32-1.c | 289 +
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.../gcc.target/riscv/rvv/base/vmadd_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmadd_vx_tu_rv64-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vmadd_vx_tu_rv64-3.c | 292 +
.../riscv/rvv/base/vmadd_vx_tum_rv32-1.c | 289 +
.../riscv/rvv/base/vmadd_vx_tum_rv32-2.c | 289 +
.../riscv/rvv/base/vmadd_vx_tum_rv32-3.c | 289 +
.../riscv/rvv/base/vmadd_vx_tum_rv64-1.c | 292 +
.../riscv/rvv/base/vmadd_vx_tum_rv64-2.c | 292 +
.../riscv/rvv/base/vmadd_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vmadd_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vmadd_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vmadd_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vmadd_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vmadd_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vmadd_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmax_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_m-3.c | 160 +
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.../gcc.target/riscv/rvv/base/vmax_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_tu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmax_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_tum-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmax_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vx_mu_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmax_vx_mu_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmax_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmax_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmax_vx_tu_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmax_vx_tum_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmax_vx_tum_rv64-1.c | 160 +
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.../riscv/rvv/base/vmax_vx_tumu_rv32-1.c | 157 +
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.../riscv/rvv/base/vmax_vx_tumu_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vv-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmaxu_vv_m-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vv_tum-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vv_tumu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_m_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmaxu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_m_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_mu_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmaxu_vx_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmaxu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmaxu_vx_tu_rv32-1.c | 157 +
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.../riscv/rvv/base/vmaxu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vmaxu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vmaxu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vmaxu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vmaxu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vmaxu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vmaxu_vx_tumu_rv32-1.c | 157 +
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.../riscv/rvv/base/vmaxu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vmaxu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vmaxu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vmaxu_vx_tumu_rv64-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-1.c | 27 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-2.c | 47 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-3.c | 78 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-4.c | 79 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-1.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-2.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-3.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-4.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-5.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vvm-6.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-1.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-2.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-3.c | 69 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-4.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-5.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-6.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmerge_vxm_rv64-3.c | 292 +
.../riscv/rvv/base/vmerge_vxm_tu_rv32-1.c | 289 +
.../riscv/rvv/base/vmerge_vxm_tu_rv32-2.c | 289 +
.../riscv/rvv/base/vmerge_vxm_tu_rv32-3.c | 289 +
.../riscv/rvv/base/vmerge_vxm_tu_rv64-1.c | 292 +
.../riscv/rvv/base/vmerge_vxm_tu_rv64-2.c | 292 +
.../riscv/rvv/base/vmerge_vxm_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmin_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vmin_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vmin_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vmin_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vmin_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vmin_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vmin_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vminu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vminu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vminu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vminu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vminu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vminu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vminu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vminu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vminu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vminu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vminu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vminu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vminu_vx_tumu_rv64-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-1.c | 25 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-2.c | 42 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-3.c | 77 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-4.c | 78 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-5.c | 24 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-6.c | 42 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-7.c | 84 +
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-8.c | 84 +
.../gcc.target/riscv/rvv/base/vmsbc_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vvm-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vvm-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vvm-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsge_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmsge_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsge_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsge_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv_m-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmsgt_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgt_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmsgtu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsle_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmsleu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmsleu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmsleu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmsleu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmsleu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmsleu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsleu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmslt_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmsltu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmsltu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmsltu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmsne_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmsne_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vmul_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vmul_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vmul_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vmul_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vmul_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vmul_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmulh_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulh_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vmulh_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vmulh_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vmulh_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vmulh_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vmulh_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vmulh_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vmulh_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulh_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulh_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulh_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulh_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulh_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vv_tumu-3.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_m_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_m_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_m_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_m_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_m_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhsu_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_tu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmulhu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vv_tumu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vmulhu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vmulhu_vx_tumu_rv64-1.c | 160 +
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.../riscv/rvv/base/vmulhu_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vmv_v_v-1.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_v-2.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_v-3.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-1.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-2.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-3.c | 276 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnclip_wv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclip_wv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnclip_wv_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclip_wv_tumu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclip_wx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclip_wx_tu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wv_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wv_tum-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnclipu_wx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wx-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnclipu_wx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnclipu_wx_tu-2.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wx_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wx_tum-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vnclipu_wx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vncvt_x-1.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x-2.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x-3.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_m-1.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_m-2.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_m-3.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_mu-1.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_mu-2.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_mu-3.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_tu-1.c | 201 +
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.../gcc.target/riscv/rvv/base/vncvt_x_tu-3.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_tum-1.c | 201 +
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.../gcc.target/riscv/rvv/base/vncvt_x_tum-3.c | 201 +
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.../gcc.target/riscv/rvv/base/vncvt_x_tumu-2.c | 201 +
.../gcc.target/riscv/rvv/base/vncvt_x_tumu-3.c | 201 +
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-1.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-2.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-3.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vneg_v_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnmsac_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsac_vx_mu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsac_vx_mu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsac_vx_mu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsac_vx_mu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsac_vx_mu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsac_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsac_vx_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tu_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tum_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tum_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tum_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tum_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tum_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsub_vx_mu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsub_vx_mu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsub_vx_mu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsub_vx_mu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsub_vx_mu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsub_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tu_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tum_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tum_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tum_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tum_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tum_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vnmsub_vx_tumu_rv64-3.c | 292 +
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-1.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-2.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_mu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vnot_v_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vnot_v_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vnsra_wv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsra_wv-2.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsra_wv_m-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsra_wv_tu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsra_wx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsrl_wv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsrl_wv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vnsrl_wv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vnsrl_wx_tumu-3.c | 111 +
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-1.c | 292 +
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-2.c | 292 +
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vrem_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vrem_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vrem_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vrem_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vrem_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vrem_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vrem_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vrem_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vremu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vremu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vremu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vremu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vremu_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv64-3.c | 292 +
.../riscv/rvv/base/vrsub_vx_tum_rv32-1.c | 289 +
.../riscv/rvv/base/vrsub_vx_tum_rv32-2.c | 289 +
.../riscv/rvv/base/vrsub_vx_tum_rv32-3.c | 289 +
.../riscv/rvv/base/vrsub_vx_tum_rv64-1.c | 292 +
.../riscv/rvv/base/vrsub_vx_tum_rv64-2.c | 292 +
.../riscv/rvv/base/vrsub_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vrsub_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vrsub_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vrsub_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vrsub_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vrsub_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vrsub_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsadd_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vsadd_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vsadd_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vsadd_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vsadd_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vsadd_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vsadd_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vsadd_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vsadd_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vsadd_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vsadd_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vsadd_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vsadd_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vsaddu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vsaddu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vsaddu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vsaddu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vsaddu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vsaddu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-1.c | 27 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-2.c | 56 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-3.c | 77 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-4.c | 78 +
.../gcc.target/riscv/rvv/base/vsbc_vvm-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vvm-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vvm-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-3.c | 292 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c | 345 +
.../gcc.target/riscv/rvv/base/vse-constraint-1.c | 97 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c | 345 +
.../gcc.target/riscv/rvv/base/vsext_vf2-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf2_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vsext_vf4-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_m-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_m-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_m-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_mu-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_mu-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_mu-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tu-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tu-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tu-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tum-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tum-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tum-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tumu-1.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tumu-2.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf4_tumu-3.c | 69 +
.../gcc.target/riscv/rvv/base/vsext_vf8-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_m-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_m-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_m-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_mu-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_mu-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_mu-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tu-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tu-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tu-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tum-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tum-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tum-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tumu-1.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tumu-2.c | 34 +
.../gcc.target/riscv/rvv/base/vsext_vf8_tumu-3.c | 34 +
.../gcc.target/riscv/rvv/base/vsll_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_m-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_mu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_mu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsll_vx_tumu-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vsll_vx_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsmul_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_rv32-1.c | 157 +
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.../gcc.target/riscv/rvv/base/vsmul_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vsmul_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vsmul_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vsmul_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsoxei16_v-1.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei16_v-2.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei16_v-3.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-1.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-2.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-3.c | 333 +
.../gcc.target/riscv/rvv/base/vsoxei32_v-1.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei32_v-2.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei32_v-3.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-1.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-2.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-3.c | 307 +
.../gcc.target/riscv/rvv/base/vsoxei64_v-1.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei64_v-2.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei64_v-3.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-1.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-2.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-3.c | 262 +
.../gcc.target/riscv/rvv/base/vsoxei8_v-1.c | 346 +
.../gcc.target/riscv/rvv/base/vsoxei8_v-2.c | 346 +
.../gcc.target/riscv/rvv/base/vsoxei8_v-3.c | 346 +
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-1.c | 346 +
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-2.c | 346 +
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-3.c | 346 +
.../gcc.target/riscv/rvv/base/vsra_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv_m-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vv_m-3.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv_tu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv_tum-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vv_tumu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vx-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_m-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vx_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsra_vx_tumu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsra_vx_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsrl_vx_tumu-1.c | 160 +
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.../gcc.target/riscv/rvv/base/vsrl_vx_tumu-3.c | 160 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-3.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-1.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-2.c | 345 +
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-3.c | 345 +
.../gcc.target/riscv/rvv/base/vssra_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssra_vx_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssrl_vx_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_m-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_mu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_mu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vssub_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vssub_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vssub_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_m-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_m-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_m-3.c | 160 +
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.../gcc.target/riscv/rvv/base/vssubu_vv_mu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tumu-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tumu-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vv_tumu-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv64-3.c | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-1.c | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-2.c | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv32-3.c | 157 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-1.c | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-2.c | 160 +
.../riscv/rvv/base/vssubu_vx_mu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv32-1.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv32-2.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv32-3.c | 157 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv64-1.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv64-2.c | 160 +
.../gcc.target/riscv/rvv/base/vssubu_vx_rv64-3.c | 160 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-1.c | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-2.c | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv32-3.c | 157 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-1.c | 160 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-2.c | 160 +
.../riscv/rvv/base/vssubu_vx_tu_rv64-3.c | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-1.c | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-2.c | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv32-3.c | 157 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-1.c | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-2.c | 160 +
.../riscv/rvv/base/vssubu_vx_tum_rv64-3.c | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-1.c | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-2.c | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv32-3.c | 157 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-1.c | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-2.c | 160 +
.../riscv/rvv/base/vssubu_vx_tumu_rv64-3.c | 160 +
.../gcc.target/riscv/rvv/base/vsub_vv-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_m-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_m-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_m-3.c | 292 +
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.../gcc.target/riscv/rvv/base/vsub_vv_mu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tum-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tum-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tumu-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tumu-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-3.c | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-1.c | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-2.c | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv32-3.c | 289 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-1.c | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-2.c | 292 +
.../riscv/rvv/base/vsub_vx_tumu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vsuxei16_v-1.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei16_v-2.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei16_v-3.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-1.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-2.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-3.c | 333 +
.../gcc.target/riscv/rvv/base/vsuxei32_v-1.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei32_v-2.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei32_v-3.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-1.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-2.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-3.c | 307 +
.../gcc.target/riscv/rvv/base/vsuxei64_v-1.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei64_v-2.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei64_v-3.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-1.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-2.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-3.c | 262 +
.../gcc.target/riscv/rvv/base/vsuxei8_v-1.c | 346 +
.../gcc.target/riscv/rvv/base/vsuxei8_v-2.c | 346 +
.../gcc.target/riscv/rvv/base/vsuxei8_v-3.c | 346 +
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-1.c | 346 +
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-2.c | 346 +
.../gcc.target/riscv/rvv/base/vsuxei8_v_m-3.c | 346 +
.../gcc.target/riscv/rvv/base/vwadd_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwadd_wx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwaddu_vx_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vv-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmacc_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmacc_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmacc_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmacc_vx_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vx_m-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vx_tu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vx_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vx_tum-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmacc_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv_m-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vv_tumu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vx-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vx_mu-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vx_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccsu_vx_tumu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccsu_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_m-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccu_vv_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccu_vv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccu_vx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tu-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmulsu_vv_tum-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmulu_vv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwmulu_vv-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsub_vv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsub_vx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsub_wv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwsub_wx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vv-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_vv_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vv_m-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vx-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vx-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_vx_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vx_mu-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_vx_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv_m-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv_mu-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv_tu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_wv_tum-1.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv_tum-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wv_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_wx-1.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_wx-2.c | 111 +
.../gcc.target/riscv/rvv/base/vwsubu_wx-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wx_mu-3.c | 111 +
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.../gcc.target/riscv/rvv/base/vwsubu_wx_tumu-3.c | 111 +
.../gcc.target/riscv/rvv/base/vxor_vv-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vxor_vv-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vv_m-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vxor_vv_tu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vv_tum-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vxor_vv_tum-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vv_tumu-1.c | 292 +
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.../gcc.target/riscv/rvv/base/vxor_vv_tumu-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-3.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-1.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-2.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-3.c | 289 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-1.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-2.c | 292 +
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-3.c | 292 +
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.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c | 18 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c | 18 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c | 24 +-
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.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c | 28 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c | 14 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c | 12 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c | 2 +-
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.../riscv/rvv/vsetvl/vlmax_complex_loop-1.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_complex_loop-2.c | 10 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c | 10 +-
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.../riscv/rvv/vsetvl/vlmax_conflict-11.c | 6 +-
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.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c | 9 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c | 7 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c | 10 +-
.../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c | 2 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-1.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-10.c | 3 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-11.c | 4 +-
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.../riscv/rvv/vsetvl/vlmax_miss_default-13.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-14.c | 22 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-15.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-16.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-17.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-18.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-19.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-2.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-20.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-21.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-22.c | 4 +-
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.../riscv/rvv/vsetvl/vlmax_miss_default-24.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-25.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-26.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-27.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-28.c | 28 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-3.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-4.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-5.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-6.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-7.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-8.c | 4 +-
.../riscv/rvv/vsetvl/vlmax_miss_default-9.c |[...]
[diff truncated at 524288 bytes]
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2023-03-14 6:18 [gcc(refs/vendors/microsoft/heads/main)] Merge commit '44ea73185a84fd42e86c4c823043f6063576aac5' into merge-master-44ea73185a84fd42e86c4c8230 Eugene Rozenfeld
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