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From: Peter Bergner <bergner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org
Subject: [gcc(refs/vendors/ibm/heads/gcc-12-branch)] ibm: Merge up to top of releases/gcc-12
Date: Tue, 1 Aug 2023 03:50:50 +0000 (GMT) [thread overview]
Message-ID: <20230801035050.03E443858436@sourceware.org> (raw)
https://gcc.gnu.org/g:e57aa9c806d6494979100724481983b9d6f0cd25
commit e57aa9c806d6494979100724481983b9d6f0cd25
Merge: 2661a81173b 79ebcd30bda
Author: Peter Bergner <bergner@linux.ibm.com>
Date: Mon Jul 31 21:44:46 2023 -0500
ibm: Merge up to top of releases/gcc-12
2023-07-31 Peter Bergner <bergner@linux.ibm.com>
Merge up to releases/gcc-12 79ebcd30bda2cd00bf442a28717ec50ae0a8cd1d
Diff:
ChangeLog | 4 +
c++tools/ChangeLog | 4 +
config/ChangeLog | 4 +
contrib/ChangeLog | 4 +
contrib/header-tools/ChangeLog | 4 +
contrib/reghunt/ChangeLog | 4 +
contrib/regression/ChangeLog | 4 +
fixincludes/ChangeLog | 4 +
gcc/BASE-VER | 2 +-
gcc/ChangeLog | 1335 ++++++
gcc/ChangeLog.ibm | 4 +
gcc/DATESTAMP | 2 +-
gcc/ada/ChangeLog | 4 +
gcc/analyzer/ChangeLog | 4 +
gcc/attr-fnspec.h | 4 +-
gcc/c-family/ChangeLog | 29 +
gcc/c-family/c-attribs.cc | 28 +-
gcc/c-family/c-common.cc | 7 +-
gcc/c-family/c-cppbuiltin.cc | 1 +
gcc/c-family/c-warn.cc | 2 +
gcc/c/ChangeLog | 4 +
gcc/cgraph.h | 7 +-
gcc/common/config/i386/cpuinfo.h | 2 -
gcc/config/aarch64/aarch64-builtins.cc | 88 +-
gcc/config/aarch64/aarch64-tuning-flags.def | 3 +
gcc/config/aarch64/aarch64.cc | 37 +-
gcc/config/aarch64/aarch64.md | 24 +-
gcc/config/aarch64/arm_acle.h | 33 -
gcc/config/alpha/alpha.cc | 7 +-
gcc/config/arm/arm-builtins.cc | 2 +-
gcc/config/arm/arm.md | 2 +-
gcc/config/arm/arm_mve.h | 2148 +++++----
gcc/config/arm/constraints.md | 20 +-
gcc/config/arm/mve.md | 285 +-
gcc/config/arm/predicates.md | 14 +-
gcc/config/arm/vfp.md | 19 +-
gcc/config/avr/avr-dimode.md | 22 +-
gcc/config/avr/avr-passes.def | 20 +
gcc/config/avr/avr-protos.h | 6 +-
gcc/config/avr/avr.cc | 1075 +++--
gcc/config/avr/avr.md | 1226 ++---
gcc/config/avr/constraints.md | 5 +
gcc/config/avr/predicates.md | 5 +
gcc/config/i386/cygwin.h | 2 +-
gcc/config/i386/darwin.h | 4 +-
gcc/config/i386/gnu-user-common.h | 2 +-
gcc/config/i386/i386-features.cc | 3 +-
gcc/config/i386/i386-options.cc | 10 +-
gcc/config/i386/i386.cc | 20 +-
gcc/config/i386/i386.opt | 4 +
gcc/config/i386/mingw32.h | 2 +-
gcc/config/i386/sse.md | 101 +-
gcc/config/i386/x86-tune.def | 4 +-
gcc/config/loongarch/loongarch.md | 8 +-
gcc/config/pa/pa-protos.h | 2 +-
gcc/config/pa/pa.cc | 27 +-
gcc/config/riscv/riscv.cc | 5 +-
gcc/config/rs6000/altivec.md | 22 +-
gcc/config/rs6000/fusion.md | 27 +-
gcc/config/rs6000/genfusion.pl | 212 +-
gcc/config/rs6000/predicates.md | 51 +-
gcc/config/rs6000/rs6000-builtin.cc | 6 +-
gcc/config/rs6000/rs6000-builtins.def | 58 +-
gcc/config/rs6000/rs6000.cc | 69 +-
gcc/config/rs6000/rs6000.md | 10 +-
gcc/config/rs6000/vector.md | 11 +-
gcc/config/rs6000/vsx.md | 113 +-
gcc/config/sh/sh.md | 39 +
gcc/cp/ChangeLog | 270 ++
gcc/cp/Make-lang.in | 21 +-
gcc/cp/constexpr.cc | 40 +-
gcc/cp/coroutines.cc | 21 +-
gcc/cp/cp-gimplify.cc | 28 +-
gcc/cp/cp-tree.h | 6 +-
gcc/cp/decl.cc | 24 +-
gcc/cp/decl2.cc | 33 +-
gcc/cp/friend.cc | 21 +-
gcc/cp/init.cc | 50 +-
gcc/cp/lambda.cc | 3 +
gcc/cp/mangle.cc | 27 +-
gcc/cp/parser.cc | 13 +-
gcc/cp/pt.cc | 89 +-
gcc/cp/semantics.cc | 4 +-
gcc/cp/typeck.cc | 15 +-
gcc/cprop.cc | 13 +-
gcc/d/ChangeLog | 61 +
gcc/d/d-convert.cc | 31 +-
gcc/d/decl.cc | 50 +-
gcc/d/dmd/MERGE | 2 +-
gcc/d/dmd/VERSION | 2 +-
gcc/d/dmd/escape.d | 24 +-
gcc/d/expr.cc | 4 +
gcc/d/imports.cc | 9 +
gcc/d/intrinsics.cc | 2 +
gcc/doc/install.texi | 3 +
gcc/doc/invoke.texi | 15 +-
gcc/dwarf2out.cc | 1 +
gcc/fortran/ChangeLog | 94 +
gcc/fortran/arith.cc | 29 +-
gcc/fortran/expr.cc | 2 +-
gcc/fortran/interface.cc | 18 +-
gcc/fortran/primary.cc | 3 +-
gcc/fortran/resolve.cc | 10 +-
gcc/fortran/simplify.cc | 12 +-
gcc/fortran/symbol.cc | 7 +
gcc/fortran/trans-expr.cc | 7 +-
gcc/fwprop.cc | 16 +-
gcc/genmatch.cc | 6 +-
gcc/gimple-fold.cc | 57 +-
gcc/gimplify.cc | 7 +-
gcc/go/ChangeLog | 12 +
gcc/go/go-backend.cc | 6 +-
gcc/go/go-lang.cc | 8 +-
gcc/go/gofrontend/expressions.cc | 3 +-
gcc/go/gofrontend/gogo.cc | 31 +-
gcc/ipa-cp.cc | 18 +-
gcc/ipa-devirt.cc | 37 +-
gcc/ipa-prop.cc | 27 +-
gcc/ipa-prop.h | 32 +
gcc/ipa-pure-const.cc | 5 +-
gcc/jit/ChangeLog | 4 +
gcc/lto-wrapper.cc | 10 +
gcc/lto/ChangeLog | 4 +
gcc/match.pd | 26 +-
gcc/objc/ChangeLog | 4 +
gcc/objcp/ChangeLog | 4 +
gcc/po/ChangeLog | 4 +
gcc/predict.cc | 4 +-
gcc/rtlanal.cc | 15 +
gcc/rtlanal.h | 2 +
gcc/sanopt.cc | 6 +-
gcc/symtab.cc | 8 +-
gcc/testsuite/ChangeLog | 4934 ++++++++++++++++++++
.../c-c++-common/Wimplicit-fallthrough-39.c | 4 +-
gcc/testsuite/c-c++-common/cold-2.c | 19 +
gcc/testsuite/c-c++-common/rotate-11.c | 2 +-
gcc/testsuite/g++.dg/abi/anon6.C | 19 +
.../g++.dg/coroutines/co-await-initlist1.C | 21 +
.../g++.dg/coroutines/co-await-moveonly1.C | 63 +
gcc/testsuite/g++.dg/coroutines/pr107768.C | 26 +
gcc/testsuite/g++.dg/cpp0x/constexpr-__func__3.C | 15 +
gcc/testsuite/g++.dg/cpp0x/constexpr-pmf3.C | 13 +
gcc/testsuite/g++.dg/cpp0x/enum43.C | 11 +
gcc/testsuite/g++.dg/cpp0x/fntmpdefarg-partial1.C | 8 +
gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11.C | 14 +
gcc/testsuite/g++.dg/cpp0x/new6.C | 13 +
gcc/testsuite/g++.dg/cpp0x/noexcept79.C | 18 +
gcc/testsuite/g++.dg/cpp1y/lambda-generic-func2.C | 18 +
.../g++.dg/cpp1y/lambda-generic-local-class2.C | 13 +
gcc/testsuite/g++.dg/cpp1y/var-templ78.C | 12 +
gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C | 6 +
gcc/testsuite/g++.dg/cpp23/subscript14.C | 35 +
gcc/testsuite/g++.dg/cpp2a/concepts-new1.C | 13 +
.../g++.dg/cpp2a/concepts-placeholder12.C | 29 +
gcc/testsuite/g++.dg/cpp2a/constexpr-dtor15.C | 19 +
gcc/testsuite/g++.dg/debug/dwarf2/lineno-array1.C | 25 +
gcc/testsuite/g++.dg/ext/attr-tsafe1.C | 14 +
gcc/testsuite/g++.dg/gomp/pr106124.C | 19 +
gcc/testsuite/g++.dg/init/pr109868.C | 13 +
gcc/testsuite/g++.dg/lookup/friend24.C | 9 +
gcc/testsuite/g++.dg/lookup/name-clash11.C | 2 +-
gcc/testsuite/g++.dg/lookup/this2.C | 22 +
gcc/testsuite/g++.dg/opt/pr109434.C | 28 +
gcc/testsuite/g++.dg/template/friend78.C | 18 +
gcc/testsuite/g++.dg/tls/thread_local13-aux.cc | 35 +
gcc/testsuite/g++.dg/tls/thread_local13.C | 21 +
gcc/testsuite/g++.dg/tls/thread_local14-aux.cc | 26 +
gcc/testsuite/g++.dg/tls/thread_local14.C | 19 +
gcc/testsuite/g++.dg/torture/pr106922.C | 9 +
gcc/testsuite/g++.dg/torture/pr109724.C | 32 +
gcc/testsuite/g++.dg/tree-ssa/pr101839.C | 53 +
gcc/testsuite/g++.dg/vect/pr109573.cc | 91 +
gcc/testsuite/g++.dg/warn/Wreturn-6.C | 16 +
gcc/testsuite/g++.dg/warn/Wsequence-point-5.C | 37 +
gcc/testsuite/g++.target/aarch64/acle/acle.exp | 35 +
gcc/testsuite/g++.target/aarch64/acle/ls64.C | 10 +
gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C | 10 +
gcc/testsuite/g++.target/aarch64/pr103147-10.C | 2 +-
gcc/testsuite/g++.target/i386/pr105980.C | 8 +
gcc/testsuite/g++.target/powerpc/pr105325.C | 28 +
gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c | 26 +
gcc/testsuite/gcc.c-torture/execute/20230630-1.c | 23 +
gcc/testsuite/gcc.c-torture/execute/20230630-2.c | 29 +
gcc/testsuite/gcc.c-torture/execute/20230630-3.c | 27 +
gcc/testsuite/gcc.c-torture/execute/20230630-4.c | 33 +
gcc/testsuite/gcc.c-torture/execute/pr109778.c | 26 +
gcc/testsuite/gcc.dg/asan/pr106190.c | 15 +
gcc/testsuite/gcc.dg/ipa/pr109318.c | 20 +
gcc/testsuite/gcc.dg/lto/pr107769_0.c | 48 +
gcc/testsuite/gcc.dg/lto/pr109778_0.c | 22 +
gcc/testsuite/gcc.dg/lto/pr109778_1.c | 7 +
gcc/testsuite/gcc.dg/pr105660-1.c | 13 +
gcc/testsuite/gcc.dg/pr105660-2.c | 12 +
gcc/testsuite/gcc.dg/pr105676.c | 14 +
gcc/testsuite/gcc.dg/pr106421.c | 13 +
gcc/testsuite/gcc.dg/pr109392.c | 15 +
gcc/testsuite/gcc.dg/pr109410.c | 19 +
gcc/testsuite/gcc.dg/tls/pr78796.c | 2 +-
gcc/testsuite/gcc.dg/torture/pr108791.c | 9 +
gcc/testsuite/gcc.dg/torture/pr108910.c | 8 +
gcc/testsuite/gcc.dg/torture/pr109219.c | 21 +
gcc/testsuite/gcc.dg/torture/pr109469.c | 15 +
gcc/testsuite/gcc.dg/torture/pr109585.c | 33 +
gcc/testsuite/gcc.dg/torture/pr109609.c | 26 +
gcc/testsuite/gcc.dg/torture/pr110298.c | 20 +
gcc/testsuite/gcc.dg/vect/pr108950.c | 2 +-
gcc/testsuite/gcc.dg/vect/pr109473.c | 16 +
gcc/testsuite/gcc.dg/vect/pr109502.c | 21 +
gcc/testsuite/gcc.dg/vect/pr97428.c | 1 +
.../gcc.target/aarch64/aapcs64/aapcs64.exp | 2 +-
gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c | 10 +
gcc/testsuite/gcc.target/aarch64/acle/pr110100.c | 7 +
gcc/testsuite/gcc.target/aarch64/acle/pr110132.c | 15 +
.../gcc.target/aarch64/ampere1-no_ldp_combine.c | 11 +
gcc/testsuite/gcc.target/aarch64/auto-init-7.c | 2 +-
gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr103147-10.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr104005.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr108589.c | 15 +
gcc/testsuite/gcc.target/aarch64/pr63304_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr70120-2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr78733.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr79041-2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr94530.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr94577.c | 2 +-
.../gcc.target/aarch64/reload-valid-spoff.c | 2 +-
gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c | 2 +-
.../gcc.target/aarch64/stack-check-cfa-1.c | 2 +-
.../gcc.target/aarch64/stack-check-cfa-2.c | 2 +-
.../gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp | 7 +-
gcc/testsuite/gcc.target/aarch64/sve/pr109176.c | 12 +
gcc/testsuite/gcc.target/aarch64/sve/pr109505.c | 12 +
gcc/testsuite/gcc.target/aarch64/test_frame_17.c | 2 +-
gcc/testsuite/gcc.target/alpha/pr106966.c | 13 +
.../gcc.target/arm/acle/cde-mve-full-assembly.c | 264 +-
.../arm/mve/general/preserve_user_namespace_1.c | 6 +
gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c | 21 +-
gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c | 33 +-
.../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 -
.../intrinsics/mve_intrinsic_type_overloads-fp.c | 61 +
.../intrinsics/mve_intrinsic_type_overloads-int.c | 100 +
.../gcc.target/arm/mve/intrinsics/mve_vaddq_m.c | 48 -
.../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 -
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.../arm/mve/intrinsics/mve_vddupq_m_n_u32.c | 13 -
.../arm/mve/intrinsics/mve_vddupq_m_n_u8.c | 13 -
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.../arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c | 13 -
.../arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c | 13 -
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.../arm/mve/intrinsics/mve_vidupq_m_n_u32.c | 12 -
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.../arm/mve/intrinsics/mve_vidupq_n_u16.c | 13 -
.../arm/mve/intrinsics/mve_vidupq_n_u32.c | 12 -
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.../arm/mve/intrinsics/mve_vidupq_x_n_u32.c | 12 -
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.../arm/mve/intrinsics/mve_viwdupq_x_n_u32.c | 13 -
.../arm/mve/intrinsics/mve_viwdupq_x_n_u8.c | 13 -
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.../gcc.target/arm/mve/intrinsics/vabavq_p_u16.c | 48 +-
.../gcc.target/arm/mve/intrinsics/vabavq_p_u32.c | 48 +-
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.../gcc.target/arm/mve/intrinsics/vabavq_u16.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vabavq_u32.c | 36 +-
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.../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 24 +-
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.../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 +-
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.../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +-
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.../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 +-
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.../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 +-
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.../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 +-
.../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +-
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.../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 +-
.../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_m_s16.c | 33 +-
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.../gcc.target/arm/mve/intrinsics/vclsq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 +-
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.../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vclsq_x_s16.c | 33 +-
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.../gcc.target/arm/mve/intrinsics/vclzq_m_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 +-
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.../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vclzq_x_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 55 +-
.../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 55 +-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 55 +-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 42 +-
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.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c | 28 +-
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.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 37 +-
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.../arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 37 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 55 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 55 +-
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.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c | 37 +-
.../arm/mve/intrinsics/vcmpeqq_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 42 +-
.../arm/mve/intrinsics/vcmpeqq_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 42 +-
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.../arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 37 +-
.../arm/mve/intrinsics/vcmpgeq_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 42 +-
.../arm/mve/intrinsics/vcmpgeq_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 42 +-
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.../arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 37 +-
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.../arm/mve/intrinsics/vcmpgtq_n_f16-1.c | 12 -
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.../arm/mve/intrinsics/vcmpgtq_n_f32-1.c | 12 -
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.../gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c | 28 +-
.../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 55 +-
.../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 55 +-
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.../arm/mve/intrinsics/vcmpleq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpleq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c | 37 +-
.../arm/mve/intrinsics/vcmpleq_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 42 +-
.../arm/mve/intrinsics/vcmpleq_n_f32-1.c | 12 -
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.../arm/mve/intrinsics/vcmpltq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpltq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c | 37 +-
.../arm/mve/intrinsics/vcmpltq_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 42 +-
.../arm/mve/intrinsics/vcmpltq_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 42 +-
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.../gcc.target/arm/mve/intrinsics/vcmpltq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c | 37 +-
.../arm/mve/intrinsics/vcmpneq_m_n_f16-1.c | 12 -
.../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 55 +-
.../arm/mve/intrinsics/vcmpneq_m_n_f32-1.c | 12 -
.../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 55 +-
.../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 37 +-
.../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c | 37 +-
.../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 55 +-
.../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 55 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c | 55 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c | 37 +-
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.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c | 37 +-
.../arm/mve/intrinsics/vcmpneq_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 42 +-
.../arm/mve/intrinsics/vcmpneq_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot180_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot270_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot270_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 33 +-
.../arm/mve/intrinsics/vcmulq_rot90_f16.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot90_f32.c | 24 +-
.../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 34 +-
.../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 31 +-
.../gcc.target/arm/mve/intrinsics/vctp16q.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vctp32q.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vctp64q.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vctp8q.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 42 +-
.../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 33 +-
.../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c | 19 +-
.../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 22 +-
.../gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 17 +-
.../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 26 +-
.../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 26 +-
.../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 33 +-
.../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c | 19 +-
.../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtmq_x_u32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtnq_m_s16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtnq_m_s32_f32.c | 33 +-
.../arm/mve/intrinsics/vcvtnq_m_u16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtnq_m_u32_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c | 17 +-
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.../arm/mve/intrinsics/vcvtnq_x_s32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtnq_x_u16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtnq_x_u32_f32.c | 22 +-
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.../arm/mve/intrinsics/vcvtpq_m_s32_f32.c | 33 +-
.../arm/mve/intrinsics/vcvtpq_m_u16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtpq_m_u32_f32.c | 33 +-
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.../gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c | 19 +-
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.../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 22 +-
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.../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 22 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 30 +-
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.../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 33 +-
.../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 33 +-
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.../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 38 +-
.../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 34 +-
.../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 34 +-
.../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 33 +-
.../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 33 +-
.../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 33 +-
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.../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 17 +-
.../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 17 +-
.../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 17 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 19 +-
.../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 34 +-
.../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 38 +-
.../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 22 +-
.../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 22 +-
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.../arm/mve/intrinsics/vddupq_m_wb_u16.c | 50 +-
.../arm/mve/intrinsics/vddupq_m_wb_u32.c | 54 +-
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.../arm/mve/intrinsics/vddupq_x_wb_u16.c | 58 +-
.../arm/mve/intrinsics/vddupq_x_wb_u32.c | 58 +-
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.../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 52 +-
.../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 54 +-
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.../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 58 +-
.../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 56 +-
.../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 58 +-
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.../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 50 +-
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.../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 58 +-
.../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 54 +-
.../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 58 +-
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.../gcc.target/arm/mve/intrinsics/veorq_s8.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/veorq_u8.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 42 +-
.../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 -
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.../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 58 +-
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.../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 44 +-
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.../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 -
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.../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 -
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.../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 44 +-
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.../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 44 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c | 34 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 36 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 34 +-
.../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 24 +-
.../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 33 +-
.../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 54 +-
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 50 +-
.../arm/mve/intrinsics/vidupq_m_wb_u16.c | 54 +-
.../arm/mve/intrinsics/vidupq_m_wb_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 40 +-
.../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 40 +-
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.../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 54 +-
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.../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 50 +-
.../arm/mve/intrinsics/vidupq_x_wb_u16.c | 58 +-
.../arm/mve/intrinsics/vidupq_x_wb_u32.c | 58 +-
.../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 58 +-
.../arm/mve/intrinsics/viwdupq_m_n_u16.c | 54 +-
.../arm/mve/intrinsics/viwdupq_m_n_u32.c | 54 +-
.../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 54 +-
.../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 54 +-
.../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 54 +-
.../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 54 +-
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 40 +-
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 40 +-
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 36 +-
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.../arm/mve/intrinsics/viwdupq_x_n_u16.c | 54 +-
.../arm/mve/intrinsics/viwdupq_x_n_u32.c | 54 +-
.../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 54 +-
.../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 58 +-
.../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 58 +-
.../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 58 +-
.../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 29 +-
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.../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 29 +-
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.../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 29 +-
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.../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 38 +-
.../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 38 +-
.../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 38 +-
.../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 38 +-
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.../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 38 +-
.../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 +-
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.../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 37 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 28 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 28 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 28 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 28 +-
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.../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 28 +-
.../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 36 +-
.../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 36 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 36 +-
.../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 36 +-
.../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 36 +-
.../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 19 +-
.../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 20 +-
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.../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 20 +-
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.../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 25 +-
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.../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 25 +-
.../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 19 +-
.../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 19 +-
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.../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 24 +-
.../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 31 +-
.../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 31 +-
.../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 23 +-
.../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 23 +-
.../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 28 +-
.../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 28 +-
.../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 36 +-
.../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 36 +-
.../intrinsics/vldrdq_gather_shifted_offset_s64.c | 28 +-
.../intrinsics/vldrdq_gather_shifted_offset_u64.c | 28 +-
.../vldrdq_gather_shifted_offset_z_s64.c | 36 +-
.../vldrdq_gather_shifted_offset_z_u64.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 20 +-
.../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 28 +-
.../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 28 +-
.../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 28 +-
.../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 28 +-
.../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 28 +-
.../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 36 +-
.../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 36 +-
.../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 36 +-
.../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 36 +-
.../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 36 +-
.../intrinsics/vldrhq_gather_shifted_offset_f16.c | 28 +-
.../intrinsics/vldrhq_gather_shifted_offset_s16.c | 28 +-
.../intrinsics/vldrhq_gather_shifted_offset_s32.c | 28 +-
.../intrinsics/vldrhq_gather_shifted_offset_u16.c | 28 +-
.../intrinsics/vldrhq_gather_shifted_offset_u32.c | 28 +-
.../vldrhq_gather_shifted_offset_z_f16.c | 36 +-
.../vldrhq_gather_shifted_offset_z_s16.c | 36 +-
.../vldrhq_gather_shifted_offset_z_s32.c | 36 +-
.../vldrhq_gather_shifted_offset_z_u16.c | 36 +-
.../vldrhq_gather_shifted_offset_z_u32.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 20 +-
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.../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 25 +-
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.../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 19 +-
.../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 19 +-
.../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 19 +-
.../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 22 +-
.../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 22 +-
.../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 22 +-
.../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 28 +-
.../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 28 +-
.../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 28 +-
.../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 23 +-
.../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 23 +-
.../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 23 +-
.../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 28 +-
.../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 28 +-
.../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 28 +-
.../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 36 +-
.../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 36 +-
.../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 36 +-
.../intrinsics/vldrwq_gather_shifted_offset_f32.c | 28 +-
.../intrinsics/vldrwq_gather_shifted_offset_s32.c | 28 +-
.../intrinsics/vldrwq_gather_shifted_offset_u32.c | 28 +-
.../vldrwq_gather_shifted_offset_z_f32.c | 36 +-
.../vldrwq_gather_shifted_offset_z_s32.c | 36 +-
.../vldrwq_gather_shifted_offset_z_u32.c | 36 +-
.../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 18 +-
.../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 18 +-
.../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 49 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 49 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 49 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 37 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 33 +-
.../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 35 +-
.../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 35 +-
.../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 -
.../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 47 +-
.../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 -
.../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 35 +-
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 35 +-
.../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 47 +-
.../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 33 +-
.../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 33 +-
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.../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 35 +-
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.../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 24 +-
.../arm/mve/intrinsics/vqdmladhq_m_s16.c | 34 +-
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.../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 34 +-
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.../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 34 +-
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.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c | 24 +-
.../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 42 +-
.../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 42 +-
.../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 32 +-
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.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 32 +-
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.../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 36 +-
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.../arm/mve/intrinsics/vsetq_lane_f32-1.c | 13 -
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.../gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c | 40 +-
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.../gcc.target/arm/mve/intrinsics/vstrbq_s16.c | 32 +-
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.../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 32 +-
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.../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 40 +-
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.../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 40 +-
.../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 40 +-
.../arm/mve/intrinsics/vstrbq_scatter_offset_s16.c | 32 +-
.../arm/mve/intrinsics/vstrbq_scatter_offset_s32.c | 32 +-
.../arm/mve/intrinsics/vstrbq_scatter_offset_s8.c | 32 +-
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.../arm/mve/intrinsics/vstrbq_scatter_offset_u8.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrbq_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrbq_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 32 +-
.../arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c | 40 +-
.../arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c | 40 +-
.../arm/mve/intrinsics/vstrdq_scatter_base_s64.c | 32 +-
.../arm/mve/intrinsics/vstrdq_scatter_base_u64.c | 32 +-
.../mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c | 40 +-
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.../mve/intrinsics/vstrdq_scatter_base_wb_s64.c | 32 +-
.../mve/intrinsics/vstrdq_scatter_base_wb_u64.c | 32 +-
.../mve/intrinsics/vstrdq_scatter_offset_p_s64.c | 40 +-
.../mve/intrinsics/vstrdq_scatter_offset_p_u64.c | 40 +-
.../arm/mve/intrinsics/vstrdq_scatter_offset_s64.c | 32 +-
.../arm/mve/intrinsics/vstrdq_scatter_offset_u64.c | 32 +-
.../vstrdq_scatter_shifted_offset_p_s64.c | 40 +-
.../vstrdq_scatter_shifted_offset_p_u64.c | 40 +-
.../intrinsics/vstrdq_scatter_shifted_offset_s64.c | 32 +-
.../intrinsics/vstrdq_scatter_shifted_offset_u64.c | 32 +-
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.../gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c | 40 +-
.../gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c | 40 +-
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.../gcc.target/arm/mve/intrinsics/vstrhq_s16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrhq_s32.c | 32 +-
.../arm/mve/intrinsics/vstrhq_scatter_offset_f16.c | 32 +-
.../mve/intrinsics/vstrhq_scatter_offset_p_f16.c | 40 +-
.../mve/intrinsics/vstrhq_scatter_offset_p_s16.c | 40 +-
.../mve/intrinsics/vstrhq_scatter_offset_p_s32.c | 40 +-
.../mve/intrinsics/vstrhq_scatter_offset_p_u16.c | 40 +-
.../mve/intrinsics/vstrhq_scatter_offset_p_u32.c | 40 +-
.../arm/mve/intrinsics/vstrhq_scatter_offset_s16.c | 32 +-
.../arm/mve/intrinsics/vstrhq_scatter_offset_s32.c | 32 +-
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.../arm/mve/intrinsics/vstrhq_scatter_offset_u32.c | 32 +-
.../intrinsics/vstrhq_scatter_shifted_offset_f16.c | 32 +-
.../vstrhq_scatter_shifted_offset_p_f16.c | 40 +-
.../vstrhq_scatter_shifted_offset_p_s16.c | 40 +-
.../vstrhq_scatter_shifted_offset_p_s32.c | 40 +-
.../vstrhq_scatter_shifted_offset_p_u16.c | 40 +-
.../vstrhq_scatter_shifted_offset_p_u32.c | 40 +-
.../intrinsics/vstrhq_scatter_shifted_offset_s16.c | 32 +-
.../intrinsics/vstrhq_scatter_shifted_offset_s32.c | 32 +-
.../intrinsics/vstrhq_scatter_shifted_offset_u16.c | 32 +-
.../intrinsics/vstrhq_scatter_shifted_offset_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrhq_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrhq_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrwq_f32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c | 40 +-
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.../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 32 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 28 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 36 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 36 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 36 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 28 +-
.../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 28 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 32 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 40 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 40 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 40 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 32 +-
.../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 32 +-
.../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 32 +-
.../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 40 +-
.../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 40 +-
.../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 40 +-
.../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 32 +-
.../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 32 +-
.../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 32 +-
.../vstrwq_scatter_shifted_offset_p_f32.c | 40 +-
.../vstrwq_scatter_shifted_offset_p_s32.c | 40 +-
.../vstrwq_scatter_shifted_offset_p_u32.c | 40 +-
.../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 32 +-
.../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 24 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 34 +-
.../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 50 +-
.../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 -
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 50 +-
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gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 +-
gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c | 16 +-
gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 4 +-
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 +-
gcc/testsuite/gcc.target/arm/simd/pr101325.c | 4 +-
gcc/testsuite/gcc.target/avr/pr82931.c | 29 +
gcc/testsuite/gcc.target/avr/torture/pr105753.c | 13 +
gcc/testsuite/gcc.target/avr/torture/pr109650-1.c | 63 +
gcc/testsuite/gcc.target/avr/torture/pr109650-2.c | 79 +
gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c | 3 +-
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gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c | 3 +-
gcc/testsuite/gcc.target/i386/mvc17.c | 11 +
gcc/testsuite/gcc.target/i386/pr109276.c | 13 +
gcc/testsuite/gcc.target/i386/pr110108-2.c | 14 +
gcc/testsuite/gcc.target/i386/pr110206.c | 39 +
gcc/testsuite/gcc.target/i386/pr110309.c | 10 +
gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c | 23 +
gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c | 27 +
gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c | 27 +
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gcc/testsuite/gcc.target/powerpc/pr108699.c | 42 +
gcc/testsuite/gcc.target/powerpc/pr109069-1.c | 25 +
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libstdc++-v3/include/std/variant | 4 +-
libstdc++-v3/include/std/version | 1 +
libstdc++-v3/python/libstdcxx/v6/printers.py | 31 +-
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libstdc++-v3/testsuite/20_util/from_chars/4.cc | 3 +-
.../testsuite/20_util/pair/astuple/get-2.cc | 68 +
.../testsuite/20_util/scoped_allocator/108952.cc | 23 +
.../20_util/shared_ptr/atomic/atomic_shared_ptr.cc | 9 +
.../testsuite/20_util/to_chars/long_double.cc | 4 +
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libstdc++-v3/testsuite/20_util/variant/lwg3585.cc | 16 +
.../22_locale/ctype/is/string/89728_neg.cc | 1 +
.../testsuite/23_containers/map/erasure.cc | 13 +
.../testsuite/23_containers/set/erasure.cc | 13 +
.../23_containers/unordered_map/erasure.cc | 13 +
.../23_containers/unordered_set/erasure.cc | 13 +
.../24_iterators/move_iterator/p2520r0.cc | 37 +
.../subtract_with_carry_engine/cons/lwg3809.cc | 26 +
.../27_io/filesystem/path/construct/95048.cc | 6 +
.../testsuite/28_regex/sub_match/lwg3204.cc | 38 +
.../testsuite/30_threads/jthread/jthread.cc | 2 +-
.../30_threads/stop_token/stop_source/109339.cc | 10 +
.../filesystem/path/construct/95048.cc | 6 +
libstdc++-v3/testsuite/experimental/map/erasure.cc | 13 +
libstdc++-v3/testsuite/experimental/set/erasure.cc | 13 +
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.../testsuite/experimental/simd/tests/frexp.cc | 6 +
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.../simd/tests/ldexp_scalbn_scalbln_modf.cc | 4 +-
.../testsuite/experimental/simd/tests/logarithm.cc | 4 +-
.../experimental/simd/tests/operator_cvt.cc | 30 +-
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.../experimental/simd/tests/trunc_ceil_floor.cc | 2 +
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.../testsuite/std/ranges/iota/iota_view.cc | 10 +
.../testsuite/std/ranges/iota/lwg3292_neg.cc | 1 +
.../testsuite/std/ranges/iota/max_size_type.cc | 12 +-
libstdc++-v3/testsuite/std/ranges/istream_view.cc | 12 +
libstdc++-v3/testsuite/std/ranges/single_view.cc | 13 +
libvtv/ChangeLog | 4 +
lto-plugin/ChangeLog | 4 +
maintainer-scripts/ChangeLog | 4 +
zlib/ChangeLog | 4 +
2992 files changed, 88583 insertions(+), 15498 deletions(-)
diff --cc gcc/ChangeLog.ibm
index 26448a8a631,00000000000..74f5173a88c
mode 100644,000000..100644
--- a/gcc/ChangeLog.ibm
+++ b/gcc/ChangeLog.ibm
@@@ -1,27 -1,0 +1,31 @@@
++2023-07-31 Peter Bergner <bergner@linux.ibm.com>
++
++ Merge up to releases/gcc-12 79ebcd30bda2cd00bf442a28717ec50ae0a8cd1d
++
+2023-04-11 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 908d9c7e6ed4be95d39b7b01056dda365f379947
+
+2023-03-27 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 4f41c4ff250709219a7c3eba27a62f8a4689412b
+
+2022-11-04 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 33561e870dc48966e8c7ede46e95032279a15423
+
+2022-10-17 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 fe7d74313736b8e1c30812bc49419f419bdf1c53
+
+2022-09-16 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 05cfd7b0677502d06a50ea6ff05d4445e194e3b9
+
+2022-08-19 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to releases/gcc-12 2d29d7b240d9ca87cbee5d90c846694125d293af
+
+2022-06-15 Peter Bergner <bergner@linux.ibm.com>
+
+ Create ibm/gcc-12-branch which follows the releases/gcc-12 branch.
next reply other threads:[~2023-08-01 3:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-01 3:50 Peter Bergner [this message]
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2024-01-26 19:42 Peter Bergner
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2023-04-11 20:52 Peter Bergner
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2022-10-17 22:58 Peter Bergner
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