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* [gcc r14-3311] Daily bump.
@ 2023-08-18  0:17 GCC Administrator
  0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2023-08-18  0:17 UTC (permalink / raw)
  To: gcc-cvs, libstdc++-cvs

https://gcc.gnu.org/g:1eb2433ff9e85008a289db03ff7eb802d51c42a8

commit r14-3311-g1eb2433ff9e85008a289db03ff7eb802d51c42a8
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Fri Aug 18 00:16:52 2023 +0000

    Daily bump.

Diff:
---
 fixincludes/ChangeLog   |   7 +
 gcc/ChangeLog           | 340 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/c-family/ChangeLog  |   5 +
 gcc/c/ChangeLog         |   6 +
 gcc/testsuite/ChangeLog | 190 +++++++++++++++++++++++++++
 libgomp/ChangeLog       |   6 +
 libstdc++-v3/ChangeLog  | 227 ++++++++++++++++++++++++++++++++
 8 files changed, 782 insertions(+), 1 deletion(-)

diff --git a/fixincludes/ChangeLog b/fixincludes/ChangeLog
index d8cdf117da55..5b49d8764053 100644
--- a/fixincludes/ChangeLog
+++ b/fixincludes/ChangeLog
@@ -1,3 +1,10 @@
+2023-08-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard
+	variant.
+	* fixincl.x: Regenerate.
+	* tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test.
+
 2023-08-07  Nick Alcock  <nick.alcock@oracle.com>
 
 	* configure: Regenerate.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3368d4e95747..44a6dc5e9691 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,343 @@
+2023-08-17  Andrew MacLeod  <amacleod@redhat.com>
+
+	PR tree-optimization/111009
+	* range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
+
+2023-08-17  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	* lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
+	slots_num initialization from here ...
+	(lra_spill): ... to here before the 1st call of
+	assign_stack_slot_num_and_sort_pseudos.  Add the 2nd call after
+	fp->sp elimination.
+
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	PR c/106537
+	* doc/invoke.texi (Option Summary): Mention
+	-Wcompare-distinct-pointer-types under `Warning Options'.
+	(Warning Options): Document -Wcompare-distinct-pointer-types.
+
+2023-08-17  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
+
+	* recog.cc (memory_address_addr_space_p): Mark possibly unused
+	argument as unused.
+
+2023-08-17  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/111039
+	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
+	SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+
+2023-08-17  Alex Coplan  <alex.coplan@arm.com>
+
+	* doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
+
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	PR target/111046
+	* config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
+	`naked' function attribute.
+	(bpf_warn_func_return): New function.
+	(TARGET_WARN_FUNC_RETURN): Define.
+	(bpf_expand_prologue): Add preventive comment.
+	(bpf_expand_epilogue): Likewise.
+	* doc/extend.texi (BPF Function Attributes): Document the `naked'
+	function attribute.
+
+2023-08-17  Richard Biener  <rguenther@suse.de>
+
+	* tree-vect-slp.cc (vect_slp_check_for_roots): Use
+	!needs_fold_left_reduction_p to decide whether we can
+	handle the reduction with association.
+	(vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
+	reductions perform all arithmetic in an unsigned type.
+
+2023-08-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
+	output.
+	* configure: Regenerate.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(widen_freducop): Add frm_opt_type template arg.
+	(vfwredosum_frm_obj): New declaration.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfwredosum_frm): New intrinsic function def.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(vfredosum_frm_obj): New declaration.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfredosum_frm): New intrinsic function def.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(class freducop): Add frm_op_type template arg.
+	(vfredusum_frm_obj): New declaration.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfredusum_frm): New intrinsic function def.
+	* config/riscv/riscv-vector-builtins-shapes.cc
+	(struct reduc_alu_frm_def): New class for frm shape.
+	(SHAPE): New declaration.
+	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(class vfncvt_f): Add frm_op_type template arg.
+	(vfncvt_f_frm_obj): New declaration.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfncvt_f_frm): New intrinsic function def.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(vfncvt_xu_frm_obj): New declaration.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfncvt_xu_frm): New intrinsic function def.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.cc
+	(class vfncvt_x): Add frm_op_type template arg.
+	(BASE): New declaration.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def
+	(vfncvt_x_frm): New intrinsic function def.
+	* config/riscv/riscv-vector-builtins-shapes.cc
+	(struct narrow_alu_frm_def): New shape function for frm.
+	(SHAPE): New declaration.
+	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/avx512vldqintrin.h: Remove target attribute.
+	* config/i386/i386-builtin.def (BDESC):
+	Add OPTION_MASK_ISA2_AVX10_1.
+	* config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
+	(VFH_AVX512VLDQ_AVX10_1): Ditto.
+	(VF1_AVX512VLDQ_AVX10_1): Ditto.
+	(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
+	Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
+	(vec_pack<floatprefix>_float_<mode>): Change iterator to
+	VI8_AVX512VLDQ_AVX10_1. Remove target check.
+	(vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
+	VF1_AVX512VLDQ_AVX10_1. Remove target check.
+	(vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
+	(VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
+	(avx512vl_vextractf128<mode>): Change iterator to
+	VI48F_256_DQVL_AVX10_1. Remove target check.
+	(vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
+	(vec_extract_hi_<mode>): Ditto.
+	(avx512vl_vinsert<mode>): Ditto.
+	(vec_set_lo_<mode><mask_name>): Ditto.
+	(vec_set_hi_<mode><mask_name>): Ditto.
+	(avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
+	iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
+	(avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
+	iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
+	* config/i386/subst.md (mask_avx512dq_condition): Add
+	TARGET_AVX10_1.
+	(mask_scalar_merge): Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/avx512vldqintrin.h: Remove target attribute.
+	* config/i386/i386-builtin.def (BDESC):
+	Add OPTION_MASK_ISA2_AVX10_1.
+	* config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
+	* config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
+	(VI48_AVX512VLDQ_AVX10_1): Ditto.
+	(VF2_AVX512VL): Remove.
+	(VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
+	Add TARGET_AVX10_1.
+	(*<code><mode>3<mask_name>): Change isa attribute to
+	avx10_1_or_avx512dq. Add TARGET_AVX10_1.
+	(<code><mode>3): Add TARGET_AVX10_1. Change isa attr
+	to avx10_1_or_avx512vl.
+	(<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
+	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
+	(<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
+	Add TARGET_AVX10_1.
+	(<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
+	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
+	(<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
+	Add TARGET_AVX10_1.
+	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
+	Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
+	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
+	Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
+	(float<floatunssuffix>v4div4sf2<mask_name>):
+	Add TARGET_AVX10_1.
+	(avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
+	(*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
+	(float<floatunssuffix>v2div2sf2): Ditto.
+	(float<floatunssuffix>v2div2sf2_mask): Ditto.
+	(*float<floatunssuffix>v2div2sf2_mask): Ditto.
+	(*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
+	(<avx512>_cvt<ssemodesuffix>2mask<mode>):
+	Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
+	(<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
+	(*<avx512>_cvtmask2<ssemodesuffix><mode>):
+	Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
+	Change when constraint is enabled.
+
+2023-08-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/111037
+	* config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
+	(second_sew_less_than_first_sew_p): Fix bug.
+	(first_sew_less_than_second_sew_p): Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/avx512vldqintrin.h: Remove target attribute.
+	* config/i386/i386-builtin.def (BDESC):
+	Add OPTION_MASK_ISA2_AVX10_1.
+	* config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
+	* config/i386/i386-expand.cc
+	(ix86_check_builtin_isa_match): Ditto.
+	(ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
+	* config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
+	and avx10_1_or_avx512vl.
+	* config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
+	(VF1_128_256VLDQ_AVX10_1): Ditto.
+	(VI8_AVX512VLDQ_AVX10_1): Ditto.
+	(<sse>_andnot<mode>3<mask_name>):
+	Add TARGET_AVX10_1 and change isa attr from avx512dq to
+	avx10_1_or_avx512dq.
+	(*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
+	avx512vl to avx10_1_or_avx512vl.
+	(fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
+	Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
+	(fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
+	Ditto.
+	(ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
+	Ditto.
+	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
+	Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
+	(avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
+	Add TARGET_AVX10_1.
+	(fix<fixunssuffix>_truncv2sfv2di2): Ditto.
+	(cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
+	Remove target check.
+	(avx512dq_mul<mode>3<mask_name>): Ditto.
+	(*avx512dq_mul<mode>3<mask_name>): Ditto.
+	(VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
+	(<mask_codefor>avx512dq_broadcast<mode><mask_name>):
+	Remove target check.
+	(VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
+	(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
+	Remove target check.
+	* config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
+	(mask_avx512vl_condition): Ditto.
+	(mask): Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* common/config/i386/i386-common.cc
+	(ix86_check_avx10_vector_width): New function to check isa_flags
+	to emit a warning when there is a conflict in AVX10 options for
+	vector width.
+	(ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
+	* config/i386/driver-i386.cc (host_detect_local_cpu):
+	Do not append -mno-avx10-max-512bit for -march=native.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* common/config/i386/i386-common.cc
+	(ix86_check_avx10): New function to check isa_flags and
+	isa_flags_explicit to emit warning when AVX10 is enabled
+	by "-m" option.
+	(ix86_check_avx512):  New function to check isa_flags and
+	isa_flags_explicit to emit warning when AVX512 is enabled
+	by "-m" option.
+	(ix86_handle_option): Do not change the flags when warning
+	is emitted.
+	* config/i386/driver-i386.cc (host_detect_local_cpu):
+	Do not append -mno-avx10.1 for -march=native.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* common/config/i386/cpuinfo.h (get_available_features):
+	Add avx10_set and version and detect avx10.1.
+	(cpu_indicator_init): Handle avx10.1-512.
+	* common/config/i386/i386-common.cc
+	(OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
+	(OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
+	(OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
+	(OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
+	(OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
+	(ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
+	-mavx10.1-512.
+	* common/config/i386/i386-cpuinfo.h (enum processor_features):
+	Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
+	FEATURE_AVX10_512BIT.
+	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
+	AVX10_512BIT, AVX10_1 and AVX10_1_512.
+	* config/i386/constraints.md (Yk): Add AVX10_1.
+	(Yv): Ditto.
+	(k): Ditto.
+	* config/i386/cpuid.h (bit_AVX10): New.
+	(bit_AVX10_256): Ditto.
+	(bit_AVX10_512): Ditto.
+	* config/i386/i386-c.cc (ix86_target_macros_internal):
+	Define AVX10_512BIT and AVX10_1.
+	* config/i386/i386-isa.def
+	(AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
+	(AVX10_1): Add DEF_PTA(AVX10_1).
+	* config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
+	(ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
+	and avx10.1-512.
+	(ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
+	FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
+	(ix86_valid_target_attribute_inner_p): Handle AVX10_1.
+	* config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
+	(ix86_conditional_register_usage): Ditto.
+	(ix86_hard_regno_mode_ok): Ditto.
+	(ix86_rtx_costs): Ditto.
+	* config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
+	* config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
+	-mavx10.1-512.
+	* doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
+	* doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
+	* doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
+	and avx10.1-512.
+
+2023-08-17  Sergei Trofimovich  <siarheit@google.com>
+
+	* flag-types.h (vrp_mode): Remove unused.
+
+2023-08-17  Yanzhang Wang  <yanzhang.wang@intel.com>
+
+	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
+	CONSTM1_RTX.
+
+2023-08-17  Andrew Pinski  <apinski@marvell.com>
+
+	* internal-fn.def (COND_NOT): New internal function.
+	* match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
+	to the lists.
+	(`vec (a ? -1 : 0) ^ b`): New pattern to convert
+	into conditional not.
+	* optabs.def (cond_one_cmpl): New optab.
+	(cond_len_one_cmpl): Likewise.
+
 2023-08-16  Surya Kumari Jangala  <jskumari@linux.ibm.com>
 
 	PR rtl-optimization/110254
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index e984337d2ed3..6f490d5c1518 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230817
+20230818
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 844ff490da91..d2dc3e80d642 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,8 @@
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	PR c/106537
+	* c.opt (Wcompare-distinct-pointer-types): New option.
+
 2023-08-14  Jason Merrill  <jason@redhat.com>
 
 	* c-cppbuiltin.cc (c_cpp_builtins): Adjust __cpp_concepts.
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index a8d49599ac0e..5a09cee07dcf 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	PR c/106537
+	* c-typeck.cc (build_binary_op): Warning on comparing distinct
+	pointer types only when -Wcompare-distinct-pointer-types.
+
 2023-08-15  Chung-Lin Tang  <cltang@codesourcery.com>
 	    Thomas Schwinge  <thomas@codesourcery.com>
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2b3008a47e70..7c901bdce059 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,193 @@
+2023-08-17  Andrew MacLeod  <amacleod@redhat.com>
+
+	PR tree-optimization/111009
+	* gcc.dg/pr111009.c: New.
+
+2023-08-17  Patrick O'Neill  <patrick@rivosinc.com>
+	    Charlie Jenkins  <charlie@rivosinc.com>
+
+	* gcc.target/riscv/zbb-rol-ror-08.c: New test.
+	* gcc.target/riscv/zbb-rol-ror-09.c: New test.
+
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	PR c/106537
+	* gcc.c-torture/compile/pr106537-1.c: New test.
+	* gcc.c-torture/compile/pr106537-2.c: Likewise.
+	* gcc.c-torture/compile/pr106537-3.c: Likewise.
+
+2023-08-17  Tsukasa OI  <research_trasio@irq.a4lg.com>
+
+	* gcc.target/riscv/zvkn.c: Deduplicate #error messages.
+	* gcc.target/riscv/zvkn-1.c: Ditto.
+	* gcc.target/riscv/zvknc.c: Ditto.
+	* gcc.target/riscv/zvknc-1.c: Ditto.
+	* gcc.target/riscv/zvknc-2.c: Ditto.
+	* gcc.target/riscv/zvkng.c: Ditto.
+	* gcc.target/riscv/zvkng-1.c: Ditto.
+	* gcc.target/riscv/zvkng-2.c: Ditto.
+	* gcc.target/riscv/zvks.c: Ditto.
+	* gcc.target/riscv/zvks-1.c: Ditto.
+	* gcc.target/riscv/zvksc.c: Ditto.
+	* gcc.target/riscv/zvksc-1.c: Ditto.
+	* gcc.target/riscv/zvksc-2.c: Ditto.
+	* gcc.target/riscv/zvksg.c: Ditto.
+	* gcc.target/riscv/zvksg-1.c: Ditto.
+	* gcc.target/riscv/zvksg-2.c: Ditto.
+
+2023-08-17  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/111039
+	* gcc.dg/pr111039.c: New testcase.
+
+2023-08-17  Lehua Ding  <lehua.ding@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/partial/slp-1.c: Fix.
+	* gcc.target/riscv/rvv/autovec/partial/slp-16.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-17.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-18.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-19.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-6.c: Ditto.
+
+2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* gcc.target/bpf/naked-1.c: New test.
+
+2023-08-17  Richard Biener  <rguenther@suse.de>
+
+	* gcc.target/i386/vect-reduc-2.c: New testcase.
+
+2023-08-17  benjamin priour  <vultkayn@gcc.gnu.org>
+
+	* g++.dg/analyzer/fanalyzer-show-events-in-system-headers.C:
+	Remove dg-line var declare_a.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-wredosum.c: New test.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-redosum.c: New test.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-redusum.c: New test.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-ncvt-f.c: New test.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-ncvt-xu.c: New test.
+
+2023-08-17  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/float-point-ncvt-x.c: New test.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx10_1-vextractf64x2-1.c: New test.
+	* gcc.target/i386/avx10_1-vextracti64x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vfpclasspd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vfpclassps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vinsertf64x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vinserti64x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vrangepd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vrangeps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vreducepd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vreduceps-1.c: Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx10_1-abs-copysign-1.c: New test.
+	* gcc.target/i386/avx10_1-vandpd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vandps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtps2qq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtps2uqq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtqq2pd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtqq2ps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtuqq2pd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtuqq2ps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vorpd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vorps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vpmovd2m-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vpmovm2d-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vpmovm2q-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vpmovq2m-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vxorpd-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vxorps-1.c: Ditto.
+
+2023-08-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/111037
+	* gcc.target/riscv/rvv/base/pr111037-1.c: New test.
+	* gcc.target/riscv/rvv/base/pr111037-2.c: New test.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx10_1-vandnpd-1.c: New test.
+	* gcc.target/i386/avx10_1-vandnps-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vbroadcastf32x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vbroadcastf64x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vbroadcasti32x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vbroadcasti64x2-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtpd2qq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvtpd2uqq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvttpd2qq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvttpd2uqq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvttps2qq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vcvttps2uqq-1.c: Ditto.
+	* gcc.target/i386/avx10_1-vpmullq-1.c: Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add -mavx10.1.
+	* gcc.target/i386/avx-2.c: Ditto.
+	* gcc.target/i386/sse-26.c: Skip AVX512VLDQ intrin file.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx10_1-15.c: New test.
+	* gcc.target/i386/avx10_1-16.c: Ditto.
+	* gcc.target/i386/avx10_1-17.c: Ditto.
+	* gcc.target/i386/avx10_1-18.c: Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/avx10_1-11.c: New test.
+	* gcc.target/i386/avx10_1-12.c: Ditto.
+	* gcc.target/i386/avx10_1-13.c: Ditto.
+	* gcc.target/i386/avx10_1-14.c: Ditto.
+
+2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* g++.target/i386/mv33.C: New test.
+	* gcc.target/i386/avx10_1-1.c: Ditto.
+	* gcc.target/i386/avx10_1-2.c: Ditto.
+	* gcc.target/i386/avx10_1-3.c: Ditto.
+	* gcc.target/i386/avx10_1-4.c: Ditto.
+	* gcc.target/i386/avx10_1-5.c: Ditto.
+	* gcc.target/i386/avx10_1-6.c: Ditto.
+	* gcc.target/i386/avx10_1-7.c: Ditto.
+	* gcc.target/i386/avx10_1-8.c: Ditto.
+	* gcc.target/i386/avx10_1-9.c: Ditto.
+	* gcc.target/i386/avx10_1-10.c: Ditto.
+
+2023-08-17  Yanzhang Wang  <yanzhang.wang@intel.com>
+
+	* gcc.target/riscv/rvv/base/simplify-vrsub.c: New test.
+
+2023-08-17  Andrew Pinski  <apinski@marvell.com>
+
+	PR target/110986
+	* gcc.target/aarch64/sve/cond_unary_9.c: New test.
+
 2023-08-16  Robin Dapp  <rdapp@ventanamicro.com>
 
 	* gcc.target/riscv/rvv/autovec/widen/vec-avg-run.c: New test.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index db7e720ad59e..4e5b5527f5e9 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,9 @@
+2023-08-17  Tobias Burnus  <tobias@codesourcery.com>
+
+	PR libgomp/111024
+	* allocator.c (gomp_init_libnuma): Call numa_available; if
+	not available or not returning 0, disable libnuma usage.
+
 2023-08-07  Nick Alcock  <nick.alcock@oracle.com>
 
 	* configure: Regenerate.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index c9c3ceed0ae7..476dfddfc3fc 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,230 @@
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	Revert:
+	2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* config/locale/generic/c_locale.cc (__convert_to_v): Reuse
+	double overload for long double if possible.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* src/c++20/tzdb.cc (tzdata_file, leaps_file): Change type to
+	std::string_view.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* config/locale/generic/c_locale.cc (__convert_to_v): Reuse
+	double overload for long double if possible.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* src/c++98/localename.cc (is_C_locale): New function.
+	(locale::locale(const char*)): Use is_C_locale.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/110945
+	* include/bits/basic_string.h (basic_string::assign(Iter, Iter)):
+	Dispatch to _M_replace or move assignment from a temporary,
+	based on the iterator type.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/format (formatter): Add partial specializations
+	for extended floating-point types.
+	* testsuite/std/format/functions/format.cc: Move test_float128()
+	to ...
+	* testsuite/std/format/formatter/ext_float.cc: New test.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/c++config (__gnu_cxx::__bfloat16_t): Define
+	whenever __BFLT16_DIG__ is defined, not only for C++23.
+	* include/std/limits (numeric_limits<bfloat16_t>): Likewise.
+	(numeric_limits<_Float16>, numeric_limits<_Float32>)
+	(numeric_limits<_Float64>): Likewise for other extended
+	floating-point types.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/experimental/internet (address_v4::to_string): Remove
+	unused parameter name.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* libsupc++/compare (__cmp_cat::__unseq): Make ctor consteval.
+	* testsuite/18_support/comparisons/categories/zero_neg.cc: Prune
+	excess errors caused by invalid consteval calls.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/chrono_io.h (__units_suffix_misc): Remove.
+	(__units_suffix): Return a known suffix as string view, do not
+	write unknown suffixes to a buffer.
+	(__fmt_units_suffix): New function that formats the suffix using
+	std::format_to.
+	(operator<<, __chrono_formatter::_M_q): Use __fmt_units_suffix.
+	(__chrono_formatter::_M_Z): Correct lifetime of wstring.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/format [_GLIBCXX_USE_WCHAR_T]: Guard all wide
+	string formatters with this macro.
+	(__formatter_int::_M_format_int, __formatter_fp::format)
+	(formatter<const void*, C>::format): Use __to_wstring_numeric
+	instead of std::ctype::widen.
+	(__formatter_fp::_M_localize): Use hardcoded wchar_t values
+	instead of std::ctype::widen.
+	* testsuite/std/format/functions/format.cc: Add more checks for
+	wstring formatting of arithmetic types.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/basic_string.h (to_string(floating-point-type)):
+	Implement using std::to_chars for C++26.
+	* include/bits/version.def (__cpp_lib_to_string): Define.
+	* include/bits/version.h: Regenerate.
+	* testsuite/21_strings/basic_string/numeric_conversions/char/dr1261.cc:
+	Adjust expected result in C++26 mode.
+	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string.cc:
+	Likewise.
+	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/dr1261.cc:
+	Likewise.
+	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/to_wstring.cc:
+	Likewise.
+	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string_float.cc:
+	New test.
+	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/to_wstring_float.cc:
+	New test.
+	* testsuite/21_strings/basic_string/numeric_conversions/version.cc:
+	New test.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/basic_string.h (to_string(integral-type)): Use
+	resize_and_overwrite when available.
+	(__to_wstring_numeric): New helper functions.
+	(to_wstring): Use std::to_string then __to_wstring_numeric.
+	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string_int.cc:
+	Remove check for no excess capacity.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/basic_string.h (__resize_and_overwrite): New
+	function.
+	* include/bits/basic_string.tcc (__resize_and_overwrite): New
+	function.
+	(resize_and_overwrite): Simplify by using reserve instead of
+	growing the string manually. Adjust for C++11 compatibility.
+	* include/bits/cow_string.h (resize_and_overwrite): New
+	function.
+	(__resize_and_overwrite): New function.
+	* include/bits/version.def (__cpp_lib_string_resize_and_overwrite):
+	Do not depend on cxx11abi.
+	* include/bits/version.h: Regenerate.
+	* include/std/format (__formatter_fp::_S_resize_and_overwrite):
+	Remove.
+	(__formatter_fp::format, __formatter_fp::_M_localize): Use
+	__resize_and_overwrite instead of _S_resize_and_overwrite.
+	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
+	Adjust for C++11 compatibility when included by ...
+	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite_ext.cc:
+	New test.
+
+2023-08-17  Patrick Palka  <ppalka@redhat.com>
+
+	* include/bits/regex.h (regex_iterator::iterator_concept):
+	Define for C++20 as per P2770R0.
+	(regex_token_iterator::iterator_concept): Likewise.
+	* include/std/ranges (__detail::__as_lvalue): Define.
+	(join_view::_Iterator): Befriend join_view.
+	(join_view::_Iterator::_M_satisfy): Use _M_get_outer
+	instead of _M_outer.
+	(join_view::_Iterator::_M_get_outer): Define.
+	(join_view::_Iterator::_Iterator): Split constructor taking
+	_Parent argument into two as per P2770R0.  Remove constraint on
+	default constructor.
+	(join_view::_Iterator::_M_outer): Make this data member present
+	only when the underlying range is forward.
+	(join_view::_Iterator::operator++): Use _M_get_outer instead of
+	_M_outer.
+	(join_view::_Iterator::operator--): Use __as_lvalue helper.
+	(join_view::_Iterator::operator==): Adjust constraints as per
+	P2770R0.
+	(join_view::_Sentinel::__equal): Use _M_get_outer instead of
+	_M_outer.
+	(join_view::_M_outer): New data member when the underlying range
+	is non-forward.
+	(join_view::begin): Adjust definition as per P2770R0.
+	(join_view::end): Likewise.
+	(join_with_view::_M_outer_it): New data member when the
+	underlying range is non-forward.
+	(join_with_view::begin): Adjust definition as per P2770R0.
+	(join_with_view::end): Likewise.
+	(join_with_view::_Iterator::_M_outer_it): Make this data member
+	present only when the underlying range is forward.
+	(join_with_view::_Iterator::_M_get_outer): Define.
+	(join_with_view::_Iterator::_Iterator): Split constructor
+	taking _Parent argument into two as per P2770R0.  Remove
+	constraint on default constructor.
+	(join_with_view::_Iterator::_M_update_inner): Adjust definition
+	as per P2770R0.
+	(join_with_view::_Iterator::_M_get_inner): Likewise.
+	(join_with_view::_Iterator::_M_satisfy): Adjust calls to
+	_M_get_inner.  Use _M_get_outer instead of _M_outer_it.
+	(join_with_view::_Iterator::operator==): Adjust constraints
+	as per P2770R0.
+	(join_with_view::_Sentinel::operator==): Use _M_get_outer
+	instead of _M_outer_it.
+	* testsuite/std/ranges/adaptors/p2770r0.cc: New test.
+
+2023-08-17  Patrick Palka  <ppalka@redhat.com>
+
+	PR libstdc++/108827
+	* include/std/ranges (__adaptor::_RangeAdaptorClosure):
+	Convert into a CRTP class template.  Move hidden operator|
+	friends into namespace scope and adjust their constraints.
+	(__closure::__is_range_adaptor_closure_fn): Define.
+	(__closure::__is_range_adaptor_closure): Define.
+	(__adaptor::_Partial): Adjust use of _RangeAdaptorClosure.
+	(__adaptor::_Pipe): Likewise.
+	(views::_All): Likewise.
+	(views::_Join): Likewise.
+	(views::_Common): Likewise.
+	(views::_Reverse): Likewise.
+	(views::_Elements): Likewise.
+	(views::_Adjacent): Likewise.
+	(views::_AsRvalue): Likewise.
+	(views::_Enumerate): Likewise.
+	(views::_AsConst): Likewise.
+	* testsuite/std/ranges/adaptors/all.cc: Reinstate assertion
+	expecting that adding empty range adaptor closure objects to a
+	pipeline doesn't increase the size of a pipeline.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/format (__format::_Pres_type): Add _Pres_F.
+	(__formatter_fp::parse): Use _Pres_F for 'F'.
+	(__formatter_fp::format): Set __upper for _Pres_F.
+	* testsuite/std/format/functions/format.cc: Check formatting of
+	infinity and NaN for each presentation type.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/Makefile.in: Regenerate.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* testsuite/24_iterators/move_iterator/p2520r0.cc: Add no_pch.
+	* testsuite/std/format/functions/format.cc: Likewise.
+	* testsuite/std/format/functions/format_c++23.cc: Likewise.
+
+2023-08-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	* testsuite/lib/dg-options.exp (add_options_for_no_pch): Remove
+	any "-include bits/stdc++.h" from options and add the macro to
+	the existing options instead of replacing them.
+
 2023-08-16  Jonathan Wakely  <jwakely@redhat.com>
 
 	* include/bits/basic_string.tcc (resize_and_overwrite): Invoke

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