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From: Corinna Vinschen <corinna@sourceware.org>
To: newlib-cvs@sourceware.org
Subject: [newlib-cygwin] AArch32: Fix the build for M class semihosting
Date: Mon, 11 Feb 2019 11:50:00 -0000	[thread overview]
Message-ID: <20190211115003.42020.qmail@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;h=1ba66fe8fa94b2148c12beae9948b0cdf6bf1ffa

commit 1ba66fe8fa94b2148c12beae9948b0cdf6bf1ffa
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Fri Feb 8 17:13:24 2019 +0000

    AArch32: Fix the build for M class semihosting
    
    The M class cores don't support Semihosting v2 mixed mode, but we were
    accidentally using the new immediates for it.  My last patch changed the
    immediates which broke the build because doing a full multi-lib build
    including M architectures now results in an assembler error instead of
    silently doing the wrong thing.
    
    This fixes the issue by changing the defines around such that According
    to the specs any M class build uses the normal semihosting instructions.
    
    Regtested on arm-none-eabi and no issues, using a build with m class
    multilibs too.

Diff:
---
 libgloss/arm/swi.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/libgloss/arm/swi.h b/libgloss/arm/swi.h
index 8f50ee7..267d164 100644
--- a/libgloss/arm/swi.h
+++ b/libgloss/arm/swi.h
@@ -30,7 +30,9 @@
 
 
 /* Now the SWI numbers and reason codes for RDI (Angel) monitors.  */
-#if defined (SEMIHOST_V2) && defined (SEMIHOST_V2_MIXED_MODE)
+#if defined (SEMIHOST_V2) \
+    && defined (SEMIHOST_V2_MIXED_MODE) \
+    && !defined (THUMB_VXM)
   #define AngelSWI_ARM			0xE10F0070 /* HLT #0xF000 A32.  */
   #ifdef __thumb__
     #define AngelSWI			0xBABC /* HLT #0x3c T32.  */


                 reply	other threads:[~2019-02-11 11:50 UTC|newest]

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