[newlib-cygwin/main] arc: libc: Record r58/r59 in long-jump's buffer

[newlib-cygwin/main] arc: libc: Record r58/r59 in long-jump's buffer

[Jeff Johnston]

https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;h=3f7e8eef09fe8d8db2b6e801c2072df2b2099aae

commit 3f7e8eef09fe8d8db2b6e801c2072df2b2099aae
Author: Shahab Vahedi <shahab@synopsys.com>
Date:   Tue May 21 10:56:47 2024 +0100

    arc: libc: Record r58/r59 in long-jump's buffer
    
    The "longjmp" expects the "setjmp" to save the r58/r59 registers,
    if there is any. With this change they are saved accordingly.
    
    Checked for regression with running GCC's DejaGnu tests:
    
        $ runtest execute.exp=pr56982.c dg-torture.exp=pr48542.c
    
    Signed-off-by: Shahab Vahedi <shahab@synopsys.com>

Diff:
---
 newlib/libc/include/machine/setjmp.h |  2 +-
 newlib/libc/machine/arc/setjmp.S     | 24 ++++++++++++++++++------
 2 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/newlib/libc/include/machine/setjmp.h b/newlib/libc/include/machine/setjmp.h
index e3534e18d..515e84c6d 100644
--- a/newlib/libc/include/machine/setjmp.h
+++ b/newlib/libc/include/machine/setjmp.h
@@ -281,7 +281,7 @@ _BEGIN_STD_C
 #endif
 
 #ifdef __arc__
-#define _JBLEN 25 /* r13-r30,blink,lp_count,lp_start,lp_end,mlo,mhi,status32 */
+#define _JBLEN 25 /* r13-r30,blink,lp_count,lp_start,lp_end,status32,r58,r59 */
 #endif
 
 #ifdef __MMIX__
diff --git a/newlib/libc/machine/arc/setjmp.S b/newlib/libc/machine/arc/setjmp.S
index bd6acdcc4..c00dbe92c 100644
--- a/newlib/libc/machine/arc/setjmp.S
+++ b/newlib/libc/machine/arc/setjmp.S
@@ -56,8 +56,8 @@ ABIlps	= ABIlpc + 4
 ABIlpe	= ABIlps + 4
 
 ABIflg	= ABIlpe + 4
-ABImlo	= ABIflg + 4
-ABImhi	= ABImlo + 4
+ABIr58	= ABIflg + 4
+ABIr59	= ABIr58 + 4
 
 	.text
 	.align 4
@@ -93,12 +93,19 @@ setjmp:
 #if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__))
 ; Till the configure changes are decided, and implemented, the code working on
 ; mlo/mhi and using mul64 should be disabled.
-; 	st	mlo, [r0, ABImlo]
-; 	st	mhi, [r0, ABImhi]
+; 	st	mlo, [r0, ABIr58]
+; 	st	mhi, [r0, ABIr59]
 	lr	r2, [status32]
 	st	r2, [r0, ABIflg]
 #endif
 
+; If "MPY_OPTION > 6 or FPU_FMA_OPTION" in an ARCHS target, then there
+; is accumulator support in the processor.
+#if (defined (__ARCHS__) && (defined (__ARC_FPU_DP_FMA__) || defined (__ARC_FPU_SP_FMA__) ||  defined (__ARC_MPY_DMPY__) ||  defined (__ARC_DSP__)))
+	st	r58, [r0, ABIr58]
+	st	r59, [r0, ABIr59]
+#endif
+
 	j.d	[blink]
 	mov	r0,0
 .Lfe1:
@@ -144,8 +151,8 @@ longjmp:
 	sr	r3, [lp_end]
 
 #if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__))
-	ld	r2, [r0, ABImlo]
-	ld	r3, [r0, ABImhi]
+	ld	r2, [r0, ABIr58]
+	ld	r3, [r0, ABIr59]
 ; We do not support restoring of mulhi and mlo registers, yet.
 
 ;	mulu64	0,r2,1			; restores mlo
@@ -155,6 +162,11 @@ longjmp:
 	flag	r2			; restore "status32" register
 #endif
 
+#if (defined (__ARCHS__) && (defined (__ARC_FPU_DP_FMA__) || defined (__ARC_FPU_SP_FMA__) ||  defined (__ARC_MPY_DMPY__) ||  defined (__ARC_DSP__)))
+	ld	r58, [r0, ABIr58]
+	ld	r59, [r0, ABIr59]
+#endif
+
 	mov.f	r1, r1			; to avoid return 0 from longjmp
 	mov.eq	r1, 1
 	j.d	[blink]