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From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: Keith Packard <keithp@keithp.com>,
	Joel Sherrill <joel.sherrill@gmail.com>
Cc: "newlib@sourceware.org" <newlib@sourceware.org>
Subject: Re: AArch64 ILP32 strcmp bug
Date: Thu, 26 Nov 2020 19:02:45 +0000	[thread overview]
Message-ID: <875238d8-613c-2d8e-6498-df1ead351b99@foss.arm.com> (raw)
In-Reply-To: <87pn40vu44.fsf@keithp.com>

On 26/11/2020 18:41, Keith Packard wrote:
> Joel Sherrill via Newlib <newlib@sourceware.org> writes:
> 
>> In the meantime, would you think a patch to disable the optimized
>> method when ilp32 is appropriate for newlib? There is still the risk of
>> other methods having bugs. The alternative I see is to completely
>> PREFER_SIZE_OVER_SPEED for aarch64 and disable all of the
>> aarch64 assembly which seems worse.
> 
> There's also setjmp/longjmp, which are only available in assembly form.
> 
> Here's a completely untested patch (I'm afraid I don't have an ilp32
> aarch64 compiler available today) which may help with that:
> 
> diff --git a/newlib/libc/machine/aarch64/setjmp.S b/newlib/libc/machine/aarch64/setjmp.S
> index 0856145bf..df94eebd1 100644
> --- a/newlib/libc/machine/aarch64/setjmp.S
> +++ b/newlib/libc/machine/aarch64/setjmp.S
> @@ -45,6 +45,9 @@
>  	.global	setjmp
>  	.type	setjmp, %function
>  setjmp:
> +#ifndef __LP64__
> +	mov	w0, w0
> +#endif
>  	mov	x16, sp
>  #define REG_PAIR(REG1, REG2, OFFS)	stp REG1, REG2, [x0, OFFS]
>  #define REG_ONE(REG1, OFFS)		str REG1, [x0, OFFS]
> @@ -60,6 +63,10 @@ setjmp:
>  	.global	longjmp
>  	.type	longjmp, %function
>  longjmp:
> +#ifndef __LP64__
> +	mov	w0, w0
> +#endif
> +	
>  #define REG_PAIR(REG1, REG2, OFFS)	ldp REG1, REG2, [x0, OFFS]
>  #define REG_ONE(REG1, OFFS)		ldr REG1, [x0, OFFS]
>  	GPR_LAYOUT
> 

AFAICT gcc doesn't define __LP64__, so I don't think this will work;
it's also backwards - you shouldn't assume that because __LP64__ isn't
defined that we have a 32-bit pointer.  GCC does, however, define
__ILP32__ when building for that ABI.

The right way to do this is to create a new header file,
machine/aarch64/machine/asm.h, which contains a gas macro called, lets
say `ptr_param', that takes the *number* of register argument and is
then conditionally defined to either nothing or an assembly statement
that narrows the register with that number.  In the main function code
you can then write simply

	ptr_param 0

and avoid all conditional assembly in the main source files.

R.

  reply	other threads:[~2020-11-26 19:02 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-20 13:52 Kinsey Moore
2020-11-25 11:28 ` Richard Earnshaw
2020-11-25 14:11   ` Joel Sherrill
2020-11-26 18:41     ` Keith Packard
2020-11-26 19:02       ` Richard Earnshaw [this message]
2020-11-27  5:35         ` Keith Packard
2020-11-25 17:31   ` Kinsey Moore
2020-11-26 17:46     ` Richard Earnshaw

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