From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: Srinath Parvathaneni <srinath.parvathaneni@arm.com>,
newlib@sourceware.org
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH v3][Newlib] arm: Restrict processor mode change when in hypervisor mode.
Date: Fri, 3 Mar 2023 13:35:04 +0000 [thread overview]
Message-ID: <ea66814c-40f5-e545-73aa-3adfcd21a426@foss.arm.com> (raw)
In-Reply-To: <82d6ffe6-8198-f2d6-8f8f-eb86172db5a5@arm.com>
Pushed (with tweaks to the commit message).
R.
On 03/03/2023 13:12, Srinath Parvathaneni wrote:
> Hi All,
>
> In _stack_init function of crt0.S file, when the current mode is not
> user mode,
> all the processor modes are parsed and the corresponding stack limit are
> set for
> these modes for all A-profile and R-profile CPU's. But if a CPU
> implements EL2
> as its highest exception level, then the core (or a model of it) will
> start in that
> mode. For example, with Cortex-R52 the processor starts by default is
> hypervisor
> mode (EL2), changing to any other mode using CPSR will result in an illegal
> instruction as per Arm-arm.
> This patch prevent the change of Hypervisor mode to any other EL1 modes in
> _stack_init function in crt0.S files and does not set the stack limit
> for those
> EL1 modes.
>
> Regression tested on arm-none-eabi target for newlib and newlib-nano and
> found
> no regressions.
>
> Ok for newlib master?
>
> Regards,
> Srinath.
>
> libgloss/ChangeLog:
>
> 2023-03-03 Srinath Parvathaneni<srinath.parvathaneni@arm.com>
>
> * arm/crt0.S (_stack_init): Add check for hypervisor mode.
>
> newlib/ChangeLog:
>
> 2023-03-03 Srinath Parvathaneni<srinath.parvathaneni@arm.com>
>
> * libc/sys/arm/crt0.S (_stack_init): Add check for hypervisor
> mode.
prev parent reply other threads:[~2023-03-03 13:35 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-03 13:12 Srinath Parvathaneni
2023-03-03 13:35 ` Richard Earnshaw [this message]
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