* [patch] Additional insn support for ARM7T
@ 2002-08-29 3:24 Robert Cragie
2002-09-03 4:29 ` Robert Cragie
2002-09-07 7:58 ` Frank Ch. Eigler
0 siblings, 2 replies; 3+ messages in thread
From: Robert Cragie @ 2002-08-29 3:24 UTC (permalink / raw)
To: sid, cgen
[-- Attachment #1: Type: text/plain, Size: 22567 bytes --]
Whilst trying to get eCos to run on SID, I realised it was failing due to a
LDMIA instruction not being emulated in the CPU simulator. Here is a patch
to complete the combinations of LDM/STM instructions which are missing in
CGEN for the ARM7. I have a feeling that it could be implemented more
efficiently, but I am somewhat a newbie to Scheme, and also to contributing
patches in the GNU manner, so please bear with me.
I have run the testsuite by doing the following:
cd build/sid/component/testsuite
make check
This failed, so I ran it manually:
runtest --tool sidcomp --srcdir ../../../../src/sid/component/testsuite
'sidcomp.sum' is attached.
Note that there are failures in the CPU monkey tests, but these also occur
using the original build. I have also verified it by successfully running a
program similar to the eCos 'twothreads' example.
To fully update SID, the following needs to be done:
cd build/sid/component/cgen-cpu/arm7t
make cgen-all
cd ../../../
make all install
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
[src/cgen/cpu]
2002-08-29 Robert Cragie <rcc@jennic.com>
* arm7.cpu (ldm*-sw-action): New pmacros to support LDM insns
* arm7.cpu (ldm*-sw-action-r15): New pmacros to support LDM insns
* arm7.cpu (ldm*-sw): New LDM insn macros (PUSWL = xxSwL)
* arm7.cpu (ldm*-sw-wb): New LDM insn macros (PUSWL = xxSWL)
* arm7.cpu (stm*-sw-action): New pmacros to support STM insns
* arm7.cpu (stm*-sw): New STM insn macros (PUSWL = xxSwl)
* arm7.cpu (stm*-sw-wb): New STM insn macros (PUSWL = xxSWl)
Index: cgen/cpu/arm7.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/arm7.cpu,v
retrieving revision 1.1
diff -u -p -r1.1 arm7.cpu
--- cgen/cpu/arm7.cpu 5 Jul 2001 12:45:47 -0000 1.1
+++ cgen/cpu/arm7.cpu 29 Aug 2002 10:10:46 -0000
@@ -1453,6 +1453,21 @@
(set addr (sub addr 4)))
)
+(define-pmacro (ldmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (sub addr 4)))
+)
+
+(define-pmacro (ldmda-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (sub addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+)
+
(dnai ldmda "Load multiple registers (postindex, decrement)"
()
"FIXME"
@@ -1479,6 +1494,32 @@
)
)
+(dnai ldmda-sw "Load multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ )
+)
+
(dnai ldmda-wb "Load multiple registers (postindex, decrement, writeback)"
()
"FIXME"
@@ -1505,6 +1546,32 @@
(set rn addr))
)
+(dnai ldmda-sw-wb "Load multiple registers (postindex, decrement, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ (set rn addr))
+)
+
(define-pmacro (ldmib-action bit-num)
(sequence ()
(set addr (add addr 4))
@@ -1517,6 +1584,21 @@
(set pc (mem WI addr)))
)
+(define-pmacro (ldmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+)
+
+(define-pmacro (ldmib-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (add addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+)
+
(dnai ldmib "Load multiple register (preindex, increment)"
()
"FIXME"
@@ -1542,6 +1624,31 @@
(multi-action 15 ldmib-action-r15))
)
+(dnai ldmib-sw "Load multiple register (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15))
+)
+
(dnai ldmib-wb "Load multiple registers (preindex, increment, writeback)"
()
"FIXME"
@@ -1568,6 +1675,32 @@
(set rn addr))
)
+(dnai ldmib-sw-wb "Load multiple registers (preindex, increment, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15)
+ (set rn addr))
+)
+
(define-pmacro (ldmia-action bit-num)
(sequence ()
(set (reg WI h-gr bit-num) (mem WI addr))
@@ -1580,6 +1713,21 @@
(set addr (add addr 4)))
)
+(define-pmacro (ldmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (add addr 4)))
+)
+
+(define-pmacro (ldmia-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (add addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+)
+
(dnai ldmia "Load multiple registers (postindex, increment)"
()
"FIXME"
@@ -1605,6 +1753,31 @@
(multi-action 15 ldmia-action-r15))
)
+(dnai ldmia-sw "Load multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15))
+)
+
(dnai ldmia-wb "Load multiple registers (postindex, increment, writeback)"
()
"FIXME"
@@ -1631,6 +1804,32 @@
(set rn addr))
)
+(dnai ldmia-sw-wb "Load multiple registers (postindex, increment, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15)
+ (set rn addr))
+)
+
(define-pmacro (ldmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
@@ -1643,6 +1842,21 @@
(set pc (mem WI addr)))
)
+(define-pmacro (ldmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+)
+
+(define-pmacro (ldmdb-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (sub addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+)
+
(dnai ldmdb "Load multiple registers (preindex, decrement)"
()
"ldm$cond .."
@@ -1668,6 +1882,31 @@
(multi-action 0 ldmdb-action))
)
+(dnai ldmdb-sw "Load multiple registers (preindex, decrement, switch)"
+ ()
+ "ldm$cond .."
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action))
+)
+
(dnai ldmdb-wb "Load multiple registers (preindex, decrement, writeback)"
()
"FIXME"
@@ -1694,12 +1933,46 @@
(set rn addr))
)
+(dnai ldmdb-sw-wb "Load multiple registers (preindex, decrement, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action)
+ (set rn addr))
+)
+
(define-pmacro (stmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+(define-pmacro (stmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+)
+
(define-pmacro (stmdb-action-r15 ignore)
(sequence ()
(set addr (sub addr 4))
@@ -1731,6 +2004,31 @@
(multi-action 0 stmdb-action))
)
+(dnai stmdb-sw "Store multiple registers (preindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action))
+)
+
(dnai stmdb-wb "Store multiple registers (preindex, decrement, writeback)"
()
"FIXME"
@@ -1757,12 +2055,46 @@
(set rn addr))
)
+(dnai stmdb-sw-wb "Store multiple registers (preindex, decrement, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action)
+ (set rn addr))
+)
+
(define-pmacro (stmib-action bit-num)
(sequence ()
(set addr (add addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+(define-pmacro (stmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+)
+
(define-pmacro (stmib-action-r15 ignore)
(sequence ()
(set addr (add addr 4))
@@ -1794,6 +2126,31 @@
(multi-action 15 stmib-action-r15))
)
+(dnai stmib-sw "Store multiple registers (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15))
+)
+
(dnai stmib-wb "Store multiple registers (preindex, increment, writeback)"
()
"FIXME"
@@ -1820,12 +2177,46 @@
(set rn addr))
)
+(dnai stmib-sw-wb "Store multiple registers (preindex, increment, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15)
+ (set rn addr))
+)
+
(define-pmacro (stmia-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
(set addr (add addr 4)))
)
+(define-pmacro (stmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (add addr 4)))
+)
+
(define-pmacro (stmia-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
@@ -1857,6 +2248,31 @@
(multi-action 15 stmia-action-r15))
)
+(dnai stmia-sw "Store multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15))
+)
+
(dnai stmia-wb "Store multiple registers (postindex, increment, writeback)"
()
"FIXME"
@@ -1883,12 +2299,46 @@
(set rn addr))
)
+(dnai stmia-sw-wb "Store multiple registers (postindex, increment, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15)
+ (set rn addr))
+)
+
(define-pmacro (stmda-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
(set addr (sub addr 4)))
)
+(define-pmacro (stmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (sub addr 4)))
+)
+
(define-pmacro (stmda-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
@@ -1920,6 +2370,31 @@
(multi-action 0 stmda-action))
)
+(dnai stmda-sw "Store multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action))
+)
+
(dnai stmda-wb "Store multiple registers (postindex, decrement, writeback)"
()
"FIXME"
@@ -1946,6 +2421,31 @@
(set rn addr))
)
+(dnai stmda-sw-wb "Store multiple registers (postindex, decrement, switch,
writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action)
+ (set rn addr))
+)
\f
; Coprocessor instructions.
; Currently not implemented, so omit these, such that we take the
[-- Attachment #2: sidcomp.sum --]
[-- Type: application/octet-stream, Size: 108801 bytes --]
Test Run By rcc on Wed Aug 28 16:02:51 2002
Native configuration is i686-pc-linux-gnu
=== sidcomp tests ===
Schedule of variations:
unix
Running target unix
Running ../../../../src/sid/component/testsuite/sidcomp.audio/aumonkey.exp ...
PASS: monkey test sid-io-audio (30s iterations)
PASS: monkey test hw-audio-sid (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.audio/linuscodec.exp ...
UNTESTED: arm7 linuscodec.c (,,-O2 -DSIDCODEC=0xE0000000 -mbig-endian,--cpu=arm --sidcodec=0xE0000000) - compile failed
Running ../../../../src/sid/component/testsuite/sidcomp.audio/linusraw.exp ...
PASS: sid configuration
PASS: sid startup
PASS: load Linus sound sample from ../../../../src/sid/component/testsuite/sidcomp.audio/linusraw.bin
PASS: set configuration
FAIL: assert tx
PASS: play Linus sound sample
PASS: poll until tx buf drained
FAIL: deassert tx
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.bsp/armbsp.exp ...
UNTESTED: arm7 test-insn.c (,,-g -O2 -mlittle-endian,--cpu=arm --engine=scache) - compile failed
UNTESTED: arm7 test-memory.c (,,-g -O2 -mlittle-endian,--cpu=arm --engine=scache) - compile failed
UNTESTED: arm7 test-insn.c (,,-g -O2 -mbig-endian,--cpu=arm --engine=scache) - compile failed
UNTESTED: arm7 test-memory.c (,,-g -O2 -mbig-endian,--cpu=arm --engine=scache) - compile failed
UNTESTED: arm7 test-insn.c (,,-g -O2 -mlittle-endian,--cpu=arm --engine=pbb) - compile failed
UNTESTED: arm7 test-memory.c (,,-g -O2 -mlittle-endian,--cpu=arm --engine=pbb) - compile failed
UNTESTED: arm7 test-insn.c (,,-g -O2 -mbig-endian,--cpu=arm --engine=pbb) - compile failed
UNTESTED: arm7 test-memory.c (,,-g -O2 -mbig-endian,--cpu=arm --engine=pbb) - compile failed
UNTESTED: arm7t test-insn.c (,,-g -O2 -mlittle-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=scache) - compile failed
UNTESTED: arm7t test-memory.c (,,-g -O2 -mlittle-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=scache) - compile failed
UNTESTED: arm7t test-insn.c (,,-g -O2 -mbig-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=scache) - compile failed
UNTESTED: arm7t test-memory.c (,,-g -O2 -mbig-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=scache) - compile failed
UNTESTED: arm7t test-insn.c (,,-g -O2 -mlittle-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=pbb) - compile failed
UNTESTED: arm7t test-memory.c (,,-g -O2 -mlittle-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=pbb) - compile failed
UNTESTED: arm7t test-insn.c (,,-g -O2 -mbig-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=pbb) - compile failed
UNTESTED: arm7t test-memory.c (,,-g -O2 -mbig-endian -mthumb -mthumb-interwork,--cpu=thumb --engine=pbb) - compile failed
Running ../../../../src/sid/component/testsuite/sidcomp.bsp/dhrystone.exp ...
UNTESTED: arm7 dhry21.c (,,-g -O2 -DSID=0xE0000000 -mbig-endian,--cpu=arm --sidrtc=0xE0000000) - compile failed
UNTESTED: arm7 dhry21.c (,,-g -O2 -DSID=0xE0000000 -mlittle-endian,--cpu=arm --sidrtc=0xE0000000) - compile failed
UNTESTED: arm7t dhry21.c (,,-g -O2 -DSID=0xE0000000 -mbig-endian -mthumb -mthumb-interwork,--cpu=thumb --sidrtc=0xE0000000) - compile failed
UNTESTED: arm7t dhry21.c (,,-g -O2 -DSID=0xE0000000 -mlittle-endian -mthumb -mthumb-interwork,--cpu=thumb --sidrtc=0xE0000000) - compile failed
Running ../../../../src/sid/component/testsuite/sidcomp.bsp/m32rbsp.exp ...
UNTESTED: m32r test-insn.c (,,-g -O2,--cpu=m32r) - compile failed
UNTESTED: m32r test-memory.c (,,-g -O2,--cpu=m32r) - compile failed
Running ../../../../src/sid/component/testsuite/sidcomp.cache/cache.exp ...
PASS: sid configuration
PASS: sid startup
PASS: all pins are present
PASS: all attributes are present
PASS: upstream bus is present
PASS: downstream accessor is present
PASS: read-accesses initialised to 0
PASS: write-accesses initialised to 0
PASS: misaligned-reads initialised to 0
PASS: misaligned-writes initialised to 0
PASS: flushes initialised to 0
PASS: replacements initialised to 0
PASS: read-hit-rate is initialised to 0%
PASS: write-hit-rate is initialised to 0%
PASS: associativity is set for hw-cache-basic
PASS: cache-size is set for hw-cache-basic
PASS: line-size is set for hw-cache-basic
PASS: write-through? is set for hw-cache-basic
PASS: write-allocate? is set for hw-cache-basic
PASS: collect-statistics? is set for hw-cache-basic
PASS: report-heading is set for hw-cache-basic
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read a byte from 0x100 (miss)
PASS: read-accesses attribute has been incremented
PASS: read a byte from 0x100 (hit)
PASS: read-accesses attribute has been incremented
PASS: read another byte on the same line as 0x100 (hit)
PASS: read-accesses attribute has been incremented
PASS: read from 0x4100 which hashes to the same line (miss)
PASS: read-accesses attribute has been incremented
PASS: replacements attribute has been incremented
PASS: flushes attribute is invariant
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/cachedocs.exp ...
PASS: Documentation file (txt) for hw-cache-basic exists
PASS: Documentation file (xml) for hw-cache-basic exists
PASS: Documentation file seems to document hw-cache-basic
Running ../../../../src/sid/component/testsuite/sidcomp.cache/cachemonkey.exp ...
PASS: monkey test hw-cache-2way/256kb/16/fifo (30s iterations)
PASS: monkey test hw-cache-basic (30s iterations)
PASS: monkey test hw-cache-4way/8kb/64/lru (30s iterations)
PASS: monkey test hw-cache-full/64kb/32/random (30s iterations)
PASS: monkey test hw-cache-direct/16kb/128 (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.cache/coherency.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: cache coherency
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/fifo.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read byte from 0x100 (miss)
PASS: read byte from 0x4100 (miss)
PASS: read byte from 0x8100 (miss)
PASS: read byte from 0xc100 (miss)
PASS: read byte again from 0x100 (hit)
PASS: read byte again from 0x4100 (hit)
PASS: read byte again from 0x8100 (hit)
PASS: read byte again from 0xc100 (hit)
PASS: read byte from 0x10100 (miss)
PASS: line for 0x8100 is still in the cache (hit)
PASS: line for 0x100 has been removed from the cache (miss)
PASS: line for 0x8100 is still in the cache (hit)
PASS: read byte from 0x14100 (miss)
PASS: line for 0x8100 has been removed from the cache (miss)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/flush.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read a byte from 0x100 (miss)
PASS: write a byte to 0x100 (hit)
PASS: flush dirty line (miss)
PASS: flush clean line (hit)
PASS: read a line (miss)
PASS: make a line dirty (hit)
PASS: displacing a dirty line causes bus activity (miss)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/lock.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read a byte from 0x100 (miss)
PASS: read another byte from 0x100 (hit)
PASS: lock 0x100
PASS: double lock
PASS: read a byte from 0x100 (hit)
PASS: read a byte from 0x4100 (miss)
PASS: read another byte from 0x4100 (miss)
PASS: read a byte from 0x100 (hit)
PASS: unlock 0x100
PASS: double unlock
PASS: read a byte from 0x4100 (miss)
PASS: read another byte from 0x4100 (hit)
PASS: replacements stat equals 2
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/lru.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read byte from 0x100 (miss)
PASS: read byte from 0x4100 (miss)
PASS: read byte from 0x8100 (miss)
PASS: read byte from 0xc100 (miss)
PASS: read byte again from 0x100 (hit)
PASS: read byte again from 0x4100 (hit)
PASS: read byte again from 0x8100 (hit)
PASS: read byte again from 0xc100 (hit)
PASS: read byte from 0x10100 (miss)
PASS: read byte from 0x8100 (hit)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/misaligned.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: misaligned read from 0x101 (miss)
PASS: read-accesses attribute has been incremented
PASS: misaligned-reads attribute has been incremented
PASS: write-accesses attribute is invariant
PASS: misaligned-writes attribute is invariant
PASS: misaligned write to 0x105 (miss)
PASS: write-accesses attribute has been incremented
PASS: misaligned-writes attribute has been incremented
PASS: read-accesses attribute is invariant
PASS: misaligned-reads attribute is invariant
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/prefetch.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: connect test bus to cache
PASS: read a byte from 0x100 (hit)
PASS: read a byte from 0x4100 (miss)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/random.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read byte from 0x100 (miss)
PASS: read byte from 0x4100 (miss)
PASS: read byte from 0x8100 (miss)
PASS: read byte from 0xc100 (miss)
PASS: read byte again from 0x100 (hit)
PASS: read byte again from 0x4100 (hit)
PASS: read byte again from 0x8100 (hit)
PASS: read byte again from 0xc100 (hit)
PASS: read byte from 0x10100 (miss)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/refill.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read from 0x100 (miss)
PASS: read from 0x1000 (use miss latency)
PASS: read from 0x100 (miss)
PASS: read from 0x1000 (use refill latency)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/utils.exp ...
Running ../../../../src/sid/component/testsuite/sidcomp.cache/writealloc.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: write byte to 0x100 (miss)
PASS: read byte from 0x100 (hit)
PASS: another write to 0x100 (hit)
PASS: another read from 0x100 (hit)
PASS: write byte to 0x500 (miss)
PASS: read byte from 0x500 (miss)
PASS: read byte from 0x500 again (hit)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cache/writethru.exp ...
PASS: sid startup
PASS: acquire upstream bus handle
PASS: generate test bus for downstream
PASS: connect test bus to cache
PASS: read byte from 0x100 (miss)
PASS: read byte from 0x100 (hit)
PASS: write byte to 0x100 (miss)
PASS: read byte back from 0x100 (hit)
PASS: read byte from 0x500 (miss)
PASS: read byte from 0x500 (hit)
PASS: write byte to 0x500 (hit)
PASS: read byte back from 0x500 (hit)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.cfgroot/badconf.exp ...
PASS: handle bad configuration file (CBinvaComp.badconf)
PASS: handle bad configuration file (CBinvaName.badconf)
PASS: handle bad configuration file (CPinvaComp.badconf)
PASS: handle bad configuration file (CPinvaPin.badconf)
PASS: handle bad configuration file (comment.badconf)
PASS: handle bad configuration file (cr100925.badconf)
PASS: handle bad configuration file (cr100931.badconf)
PASS: handle bad configuration file (cr100942.badconf)
PASS: handle bad configuration file (dupName.badconf)
PASS: handle bad configuration file (dupRel.badconf)
PASS: handle bad configuration file (empty.badconf)
PASS: handle bad configuration file (extMiss.badconf)
PASS: handle bad configuration file (illegCh.badconf)
PASS: handle bad configuration file (invaComp.badconf)
PASS: handle bad configuration file (invaName.badconf)
PASS: handle bad configuration file (invaRel.badconf)
PASS: handle bad configuration file (libErr.badconf)
PASS: handle bad configuration file (multiCB.badconf)
PASS: handle bad configuration file (multiCP.badconf)
PASS: handle bad configuration file (multiDso.badconf)
PASS: handle bad configuration file (multiSet.badconf)
PASS: handle bad configuration file (setInvAtt.badconf)
PASS: handle bad configuration file (setInvAttV.badconf)
PASS: handle bad configuration file (setInvComp.badconf)
PASS: handle bad configuration file (symErr.badconf)
PASS: handle bad configuration file (unknown.badconf)
PASS: handle bad configuration file (wrongOrd.badconf)
PASS: handle bad configuration file (wrongOrd1.badconf)
PASS: handle bad configuration file (wrongOrd2.badconf)
PASS: handle bad configuration file (wrongOrd3.badconf)
Running ../../../../src/sid/component/testsuite/sidcomp.cfgroot/cfgrootdocs.exp ...
PASS: Documentation file (txt) for sid-control-cfgroot exists
PASS: Documentation file (xml) for sid-control-cfgroot exists
PASS: Documentation file seems to document sid-control-cfgroot
Running ../../../../src/sid/component/testsuite/sidcomp.cgen-cpu/cpudocs.exp ...
PASS: Documentation file (txt) for hw-cpu-arm7t exists
FAIL: Documentation file (xml) for hw-cpu-arm7t is missing
FAIL: Documentation file does not seem to document hw-cpu-arm7t
PASS: Documentation file (txt) for hw-cpu-m32r/d exists
FAIL: Documentation file (xml) for hw-cpu-m32r/d is missing
FAIL: Documentation file does not seem to document hw-cpu-m32r/d
Running ../../../../src/sid/component/testsuite/sidcomp.cgen-cpu/cpumonkey.exp ...
NOTE: Testing hw-cpu-arm7t until Wed Aug 28 16:09:54 BST 2002
WARNING: monkey test hw-cpu-arm7t - state restore failed
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve pc
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve gdb-register-pc
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve trace-filename
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r10
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r11_fiq
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r12
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r14_abt
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r15
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve cpsr
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve cpsr-flags
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve spsr_abt
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r6
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r14
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r4
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r1
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve spsr_und
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r14_und
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r7
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r13_fiq
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve spsr_svc
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve spsr_irq
WARNING: monkey test hw-cpu-arm7t - state restore did not preserve r11
UNRESOLVED: monkey test hw-cpu-arm7t (3m iterations)
WARNING: monkey test hw-cpu-m32r/d - state restore failed
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r0
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r10
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r14
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve pc
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve gdb-register-pc
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve trace-filename
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r1
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r4
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r7
WARNING: monkey test hw-cpu-m32r/d - state restore did not preserve r12
UNRESOLVED: monkey test hw-cpu-m32r/d (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.cgen-cpu.arm7t/armconf.exp ...
FAIL: arm7tdmi armfiq.cs (-EL,-EL,,) #0
FAIL: arm7tdmi armirq.cs (-EL,-EL,,) #0
FAIL: arm7tdmi armfiq.cs (-EB,-EB,,) #0
FAIL: arm7tdmi armirq.cs (-EB,-EB,,) #0
Running ../../../../src/sid/component/testsuite/sidcomp.cgen-cpu.arm7t/armmisc.exp ...
PASS: arm7tdmi armhello.ms (-EL,-EL,,--cpu=arm --engine=scache) #0
PASS: arm7tdmi armimemfault.ms (-EL,-EL,,--cpu=arm --engine=scache) #0
FAIL: arm7tdmi arminvinsn.ms (-EL,-EL,,--cpu=arm --engine=scache) #0
PASS: arm7tdmi armmemfault.ms (-EL,-EL,,--cpu=arm --engine=scache) #0
PASS: arm7tdmi armhello.ms (-EB,-EB,,--cpu=arm --engine=scache) #0
PASS: arm7tdmi armimemfault.ms (-EB,-EB,,--cpu=arm --engine=scache) #0
FAIL: arm7tdmi arminvinsn.ms (-EB,-EB,,--cpu=arm --engine=scache) #0
PASS: arm7tdmi armmemfault.ms (-EB,-EB,,--cpu=arm --engine=scache) #0
Running ../../../../src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/xstormy16-allinsn.exp ...
UNTESTED: xstormy16 adcgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 adcgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 adcgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 adcimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 addgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 addgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 addgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 addimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 andgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 andgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 andimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 asrgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 asrgrimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bcc.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bccgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bccgrimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bccimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bngrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bngrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bnhmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bnlmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bpgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bpgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bphmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 bplmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 callfimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 callgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 callrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 callrimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 cbwgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 clr1grgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 clr1grimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 clr1hmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 clr1lmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 decgrimm2.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 div.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 icallfimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 icallgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 icallrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 incgrimm2.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 jmp.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 jmpf.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 maskgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 maskgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgri.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgrii.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgriipostinc.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgriipredec.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgripostinc.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrgripredec.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgrigr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgriigr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgriipostincgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgriipredecgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgripostincgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movgripredecgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movhgrmem.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movhighgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movlgrmem.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movlmemgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movlmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 movlowgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 mul.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 notgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 orgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 orgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 orimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 pushpop.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 revgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 rlcgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 rlcgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 rrcgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 rrcgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 sbcgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 sbcgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 sbcgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 sbcgrimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 set1grgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 set1grimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 set1hmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 set1lmemimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 shlgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 shlgrimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 shrgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 shrgrimm.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 subgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 subgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 subgrimm4.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 subimm8.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 swap.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 xorgrgr.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 xorgrimm16.cgs (,,,--cpu=xstormy16) - assembly failed
UNTESTED: xstormy16 xorimm8.cgs (,,,--cpu=xstormy16) - assembly failed
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/consdocs.exp ...
PASS: Documentation file (txt) for sid-io-stdio exists
PASS: Documentation file (xml) for sid-io-stdio exists
PASS: Documentation file seems to document sid-io-stdio
PASS: Documentation file (txt) for sid-io-socket-server exists
PASS: Documentation file (xml) for sid-io-socket-server exists
PASS: Documentation file seems to document sid-io-socket-server
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/consmonkey.exp ...
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/socketinv.exp ...
PASS: sid configuration
PASS: sid start
PASS: find pin that does not exist
PASS: connect to a pin that does not exist
PASS: check connected pins on a pin that does not exist
PASS: check disconnecting pin on a pin that does not exist
PASS: find bus that does not exist
PASS: connect to an accessor that does not exist
PASS: check connected bus on a bus that does not exist
PASS: set relationships that does not exist
PASS: set relationships to relate to a non existing component
PASS: query relationships that does not exist
PASS: set non existing attribute to -1
PASS: set attribute tx-count to -1
PASS: set attribute tx-count to 127.0.0.0:xxx
PASS: set attribute tx-count to true
PASS: set attribute tx-count to 0.0e0
PASS: set attribute rx-count to -1
PASS: set attribute rx-count to 127.0.0.0:xxx
PASS: set attribute rx-count to true
PASS: set attribute rx-count to 0.0e0
PASS: set attribute poll-count to -1
PASS: set attribute poll-count to 127.0.0.0:xxx
PASS: set attribute poll-count to true
PASS: set attribute poll-count to 0.0e0
PASS: set attribute max-poll-interval to -1
PASS: set attribute max-poll-interval to 127.0.0.0:xxx
PASS: set attribute max-poll-interval to true
PASS: set attribute max-poll-interval to 0.0e0
PASS: set attribute poll-interval to -1
PASS: set attribute poll-interval to 127.0.0.0:xxx
PASS: set attribute poll-interval to true
PASS: set attribute poll-interval to 0.0e0
PASS: set attribute server? to -1
PASS: set attribute server? to 127.0.0.0:xxx
PASS: set attribute server? to 123e5
PASS: set attribute server? to string
PASS: set attribute verbose? to -1
PASS: set attribute verbose? to 127.0.0.0:xxx
PASS: set attribute verbose? to 123e5
PASS: set attribute verbose? to string
PASS: set attribute trace-traffic? to -1
PASS: set attribute trace-traffic? to 127.0.0.0:xxx
PASS: set attribute trace-traffic? to 123e5
PASS: set attribute trace-traffic? to string
PASS: set attribute buffer-while-disconnected? to -1
PASS: set attribute buffer-while-disconnected? to 127.0.0.0:xxx
PASS: set attribute buffer-while-disconnected? to 123e5
PASS: set attribute buffer-while-disconnected? to string
PASS: set attribute connected? to -1
PASS: set attribute connected? to 127.0.0.0:xxx
PASS: set attribute connected? to 123e5
PASS: set attribute connected? to string
PASS: set attribute sockaddr-local to -1
PASS: set attribute sockaddr-local to 127.0.0.0:xxx
PASS: set attribute sockaddr-local to 123e5
PASS: set attribute sockaddr-local to string
PASS: set attribute sockaddr-local to on
PASS: set attribute sockaddr-local to a.b.c.d:e
PASS: set attribute sockaddr-peer to -1
PASS: set attribute sockaddr-peer to 127.0.0.0:xxx
PASS: set attribute sockaddr-peer to 123e5
PASS: set attribute sockaddr-peer to string
PASS: set attribute sockaddr-peer to on
PASS: set attribute sockaddr-peer to a.b.c.d:e
PASS: set attribute init to 127.0.0.0:111
PASS: set attribute init to 123e5
PASS: set attribute init to string
PASS: set attribute init to on
PASS: set attribute fini to 127.0.0.0:111
PASS: set attribute fini to 123e5
PASS: set attribute fini to string
PASS: set attribute fini to on
PASS: set attribute tx to 127.0.0.0:111
PASS: set attribute tx to 123e5
PASS: set attribute tx to string
PASS: set attribute tx to on
PASS: set attribute rx to 127.0.0.0:111
PASS: set attribute rx to 123e5
PASS: set attribute rx to string
PASS: set attribute rx to on
PASS: set attribute tx-count to 123
PASS: set attribute tx-count to 1.1
PASS: set attribute tx-count to 127.0.0.1:123
PASS: set attribute tx-count to yes
PASS: set attribute tx-buffer to 123
PASS: set attribute tx-buffer to 1.1
PASS: set attribute tx-buffer to 127.0.0.1:123
PASS: set attribute tx-buffer to yes
PASS: set attribute rx-count to 123
PASS: set attribute rx-count to 1.1
PASS: set attribute rx-count to 127.0.0.1:123
PASS: set attribute rx-count to yes
PASS: set attribute poll-count to 123
PASS: set attribute poll-count to 1.1
PASS: set attribute poll-count to 127.0.0.1:123
PASS: set attribute poll-count to yes
PASS: set attribute avg-tx-buffer-size to 123
PASS: set attribute avg-tx-buffer-size to 1.1
PASS: set attribute avg-tx-buffer-size to 127.0.0.1:123
PASS: set attribute avg-tx-buffer-size to yes
PASS: set attribute sockaddr-peer to 123
PASS: set attribute sockaddr-peer to 1.1
PASS: set attribute sockaddr-peer to 127.0.0.1:123
PASS: set attribute sockaddr-peer to yes
PASS: set attribute connected? to 123
PASS: set attribute connected? to 1.1
PASS: set attribute connected? to 127.0.0.1:123
PASS: set attribute connected? to yes
PASS: try driving fini pin before driving init pin
PASS: try driving fini pin before driving init pin
PASS: try driving tx pin with -1 when there is no connection
PASS: try driving tx pin with 0 when there is no connection
PASS: try driving tx pin with 255 when there is no connection
PASS: try driving tx pin with 256 when there is no connection
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/socketval.exp ...
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/stdio.exp ...
PASS: sid configuration
PASS: sid start
PASS: attribute list
PASS: get stdin pin
PASS: get stdout pin
PASS: get poll pin
PASS: Save state
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/stdioinv.exp ...
PASS: sid configuration
PASS: sid start
PASS: find pin that does not exist
PASS: connect to a pin that does not exist
PASS: check connected pins on a pin that does not exist
PASS: check disconnecting pin on a pin that does not exist
PASS: find bus that does not exist
PASS: connect to an accessor that does not exist
PASS: check connected bus on a bus that does not exist
PASS: set relationships that does not exist
PASS: set relationships to relate to a non existing component
PASS: query relationships that does not exist
PASS: set non existing attribute to -1
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.consoles/stdioval.exp ...
PASS: sid configuration
PASS: sid start
PASS: check attribute list
PASS: check attribute pin list
PASS: check attribute register list
PASS: check attribute setting list
PASS: check attribute watchable list
PASS: check pin names
PASS: check bus names
PASS: check accessor names
PASS: check relationship names
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.gloss/angel.exp ...
PASS: sid configuration
PASS: sid startup
PASS: attribute list
PASS: basic attributes present
PASS: set command line
PASS: validate command line
PASS: set heap base
PASS: validate heap base
PASS: set heap limit
PASS: validate heap limit
PASS: set stack base
PASS: validate stack base
PASS: set stack limit
PASS: validate stack limit
PASS: set verbose on
PASS: validate verbose on
PASS: set verbose off
PASS: validate verbose off
PASS: get trap pin
PASS: get trap-code pin
PASS: get fault pin
PASS: get fault-code pin
PASS: get process-signal pin
PASS: test presence of CPU component
PASS: set CPU endianness
PASS: set CPU endianness more
PASS: get memory bus
PASS: open syscall (stdin)
PASS: open syscall (stdout)
PASS: open syscall (mode r)
PASS: open syscall (mode r, missing file)
PASS: open syscall (mode rb)
PASS: open syscall (mode rb, missing file)
PASS: open syscall (mode r+)
PASS: open syscall (mode r+, missing file)
PASS: open syscall (mode r+b)
PASS: open syscall (mode r+b, missing file)
PASS: open syscall (mode w)
PASS: open syscall (mode w, missing file)
PASS: open syscall (mode wb)
PASS: open syscall (mode wb, missing file)
PASS: open syscall (mode w+)
PASS: open syscall (mode w+, missing file)
PASS: open syscall (mode w+b)
PASS: open syscall (mode w+b, missing file)
PASS: open syscall (mode a)
PASS: open syscall (mode a)
PASS: open syscall (mode ab)
PASS: open syscall (mode ab)
PASS: open syscall (mode a+)
PASS: open syscall (mode a+)
PASS: open syscall (mode a+b)
PASS: open syscall (mode a+b)
PASS: open syscall (invalid mode)
PASS: open syscall (for dummy file)
PASS: open syscall (for dummy file)
PASS: close syscall (file on the host)
PASS: close syscall (bad file descriptor)
PASS: writec syscall
PASS: write0 syscall
PASS: write syscall
PASS: readc syscall
PASS: read syscall
PASS: iserror syscall (negative status word)
PASS: iserror syscall (zero status word)
PASS: iserror syscall (positive status word)
PASS: istty syscall (for interactive files)
PASS: istty syscall (for interactive files)
PASS: istty syscall (for non-interactive files)
PASS: istty syscall (bad file descriptor)
PASS: seek syscall
PASS: seek syscall (bad file descriptor)
PASS: flen syscall
PASS: flen syscall (bad file descriptor)
PASS: tmpnam syscall
PASS: remove syscall
PASS: remove syscall (non-existent file)
PASS: rename syscall
PASS: rename syscall (non-existent file)
PASS: clock syscall
PASS: time syscall
PASS: system syscall
PASS: errno syscall
PASS: get-cmdline syscall
PASS: heapinfo syscall
PASS: report exception (exit)
PASS: report exception (abort)
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/attribbank.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check initial attribute list
PASS: set testing attributes
PASS: check testing attribute list
PASS: retrieve testing attributes
PASS: overwrite a few testing attributes
PASS: check testing attribute list after overwrite
PASS: retrieve testing attributes after overwrite
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/attribinval.exp ...
PASS: sid configuration
PASS: sid startup
PASS: find pin that does not exist
PASS: connect to a pin that does not exist
PASS: check connected pins on a pin that does not exist
PASS: check disconnecting pin on a pin that does not exist
PASS: find bus that does not exist
PASS: connect to an accessor that does not exist
PASS: check connected bus on a bus that does not exist
PASS: set relationships that does not exist
PASS: query relationships that does not exist
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/attribval.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check setting attribute list
PASS: check pin attribute list
PASS: check register attribute list
PASS: check register watchable list
PASS: query pin names
PASS: query bus names
PASS: query accessor names
PASS: query relationships names
PASS: set weird attribute names
PASS: check testing attribute list
PASS: retrieve testing attributes
PASS: set 1000 attributes
PASS: check attributes after setting
PASS: adding another 1000 attributes
PASS: check attributes after setting
PASS: check values for unknown attributes
PASS: check some attribute list after trying to get unknown attribute values
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/gluedocs.exp ...
PASS: Documentation file (txt) for hw-glue-sequence exists
PASS: Documentation file (xml) for hw-glue-sequence exists
PASS: Documentation file seems to document hw-glue-sequence
PASS: Documentation file (txt) for hw-glue-probe-bus exists
PASS: Documentation file (xml) for hw-glue-probe-bus exists
PASS: Documentation file seems to document hw-glue-probe-bus
PASS: Documentation file (txt) for hw-glue-bus-mux exists
PASS: Documentation file (xml) for hw-glue-bus-mux exists
PASS: Documentation file seems to document hw-glue-bus-mux
PASS: Documentation file (txt) for sw-glue-attribbank exists
PASS: Documentation file (xml) for sw-glue-attribbank exists
PASS: Documentation file seems to document sw-glue-attribbank
Running ../../../../src/sid/component/testsuite/sidcomp.glue/gluemonkey.exp ...
PASS: monkey test hw-glue-sequence (30s iterations)
PASS: monkey test sw-glue-attribbank (30s iterations)
PASS: monkey test hw-glue-bus-mux (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.glue/seqinval.exp ...
PASS: sid configuration
PASS: sid startup
PASS: attribute list with incorrect category names
PASS: query incorrect attributes name
PASS: set num-outputs to 1*2
PASS: set num-outputs to -1
PASS: set num-outputs to aa
PASS: set num-outputs 1.0123
PASS: set num-outputs true
PASS: set attributes values to non existing attribute
PASS: find pin that does not exist
PASS: connect pin that does not exist
PASS: disconnect pin that does not exist
PASS: check connected pins that does not exist
PASS: connect accessor that does not exist
PASS: find bus that does not exist
PASS: find connected bus that does not exist
PASS: connect accessor to a bus that does not exist
PASS: set relationships that does not exist
PASS: set relationships to relate to a non existing component
PASS: query relationships that does not exist
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/sequence.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check attribute list
PASS: get input pin
PASS: set outputs=0
PASS: attempt setting bad output
PASS: set outputs=10
PASS: set 10 output pins
PASS: drive with value
PASS: shrink output list
PASS: drive after shrinking
PASS: get state snapshot
PASS: restore state snapshot
PASS: prepare for infinite recursion detection test
PASS: infinite recursion detection
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/sequence1.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check default num-outputs is 1
PASS: check pin names
PASS: loop through output pins
PASS: num-outputs cannot be changed
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/sequence2.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check default num-outputs is 2
PASS: check pin names
PASS: loop through output pins
PASS: num-outputs cannot be changed
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/sequence8.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check default num-outputs is 8
PASS: check pin names
PASS: loop through output pins
PASS: num-outputs cannot be changed
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/seqvalid.exp ...
PASS: sid configuration
PASS: sid startup
PASS: check attribute list
PASS: check bus names
PASS: check setting attribute list
PASS: check pin attribute list
PASS: check register attribute list
PASS: check register watchable list
PASS: check accessor names
PASS: check relationships names
PASS: check pin names
PASS: get input pin
PASS: erroneously connect input pin
PASS: erroneously check connected input pin
PASS: erroneously disconnect input pin
PASS: check default num-outputs
PASS: set outputs=0
PASS: check num-outputs=0
PASS: attempt setting bad output
PASS: set outputs=10
PASS: check num-outputs=10
PASS: check pin names for num-outputs=10
PASS: set 10 output pins
PASS: drive with value
PASS: check connected pins
PASS: shrink output list
PASS: drive after shrinking
PASS: disconnect pins
PASS: check connected pins after disconnect pins
PASS: check num-outputs attribute is 200
PASS: set num-outputs too high
PASS: set num-outputs before state snapshot - A
PASS: set num-outputs before state snapshot - B
PASS: get state snapshot
PASS: set num-outputs to 5 after save state
PASS: check num-outputs=5 after save state
PASS: restore state snapshot
PASS: check num-outputs=17 after restore state
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.glue/traffic.exp ...
PASS: sid configuration
PASS: sid startup
PASS: intense attribute traffic
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.ide/diskio.exp ...
PASS: sid configuration
PASS: sid startup
PASS: get buses
PASS: configure drive 0
FAIL: read identification for drive 0 - wait 06 0x08 0x08 - unmapped 0
FAIL: read identification for drive 0
FAIL: read identification for nonexistent drive 1 - wait 06 0x01 0x01 - unmapped 0
FAIL: read identification for nonexistent drive 1
FAIL: write first sector of drive 0 - wait 06 0x08 0x08 - unmapped 0
FAIL: write first sector of drive 0 - wait 06 0x01 0x00 - unmapped 0
FAIL: write first sector of drive 0
FAIL: write second sector of drive 0 using shorts - wait 06 0x08 0x08 - unmapped 0
FAIL: write second sector of drive 0 using shorts - wait 06 0x01 0x00 - unmapped 0
FAIL: write second sector of drive 0 using shorts
PASS: configure drive 1
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x08 0x08 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x01 0x00 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x08 0x08 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x01 0x00 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x08 0x08 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x01 0x00 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x08 0x08 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1 - wait 06 0x01 0x00 - unmapped 0
FAIL: copy CHS sectors 0,1 on drive 0 TO LBA sectors 1,0 on drive 1
PASS: shut down ide drive models
PASS: check contents of diskio.drive1
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.ide/idebase.exp ...
PASS: sid configuration
PASS: sid startup
PASS: save state snapshot
PASS: restore state snapshot
PASS: compare new state snapshot
PASS: set toughie state parameters
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.ide/idedocs.exp ...
PASS: Documentation file (txt) for hw-disk-ide exists
PASS: Documentation file (xml) for hw-disk-ide exists
PASS: Documentation file seems to document hw-disk-ide
Running ../../../../src/sid/component/testsuite/sidcomp.ide/idetrigger.exp ...
PASS: sid configuration
PASS: sid startup
PASS: fetch attribute categories
PASS: prepare watch signalling pins
PASS: obsolete watch pin syntax
PASS: watch an ordinary passive r/w attribute for changes
PASS: stop watching it
PASS: watch an ordinary passive r/w register for mask/value match
PASS: stop watching that too
PASS: watch same register with several separate triggerpoints
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.interrupt/arm-interrupt.exp ...
PASS: sid configuration
PASS: sid start
PASS: establish a triggerpoint for watchable state variable: interrupt
PASS: establish a triggerpoint for watchable state variable: fast-interrupt
PASS: establish a triggerpoint for watchable state variable: irq-raw-status
PASS: establish a triggerpoint for watchable state variable: irq-enable-register
PASS: establish a triggerpoint for watchable state variable: fiq-raw-status
PASS: establish a triggerpoint for watchable state variable: fiq-enable-register
PASS: attribute list
PASS: get fast-irq pin
PASS: get irq pin
PASS: get reset pin
PASS: get fast interrupt source pin
PASS: get interrupt-source-0 pin
PASS: get interrupt-source-1 pin
PASS: get interrupt-source-2 pin
PASS: get interrupt-source-3 pin
PASS: get interrupt-source-4 pin
PASS: get interrupt-source-5 pin
PASS: get interrupt-source-6 pin
PASS: get interrupt-source-7 pin
PASS: get interrupt-source-8 pin
PASS: get interrupt-source-9 pin
PASS: get interrupt-source-10 pin
PASS: get interrupt-source-11 pin
PASS: get interrupt-source-12 pin
PASS: get interrupt-source-13 pin
PASS: get interrupt-source-14 pin
PASS: get interrupt-source-15 pin
PASS: get interrupt-source-16 pin
PASS: get interrupt-source-17 pin
PASS: get interrupt-source-18 pin
PASS: get interrupt-source-19 pin
PASS: get interrupt-source-20 pin
PASS: get interrupt-source-21 pin
PASS: get interrupt-source-22 pin
PASS: get interrupt-source-23 pin
PASS: get interrupt-source-24 pin
PASS: get interrupt-source-25 pin
PASS: get interrupt-source-26 pin
PASS: get interrupt-source-27 pin
PASS: get interrupt-source-28 pin
PASS: get interrupt-source-29 pin
PASS: get interrupt-source-30 pin
PASS: get interrupt-source-31 pin
PASS: get irq-register bus
PASS: get fiq-register bus
PASS: writing to reserved irq-register (offset 0x0)
PASS: writing to reserved irq-register (offset 0x1)
PASS: writing to reserved fiq-register (offset 0x0)
PASS: writing to reserved fiq-register (offset 0x4)
PASS: reading from reserved irq-register (offset 0xC)
PASS: reading from reserved irq-register (offset 0x10)
PASS: reading from reserved fiq-register (offset 0x10C)
PASS: Save state
PASS: disable all interrupt lines
PASS: validate all interrupt lines are disabled
PASS: initialise set of enabled interrupt lines
PASS: validate set of enabled interrupt lines
PASS: disable all interrupt lines
PASS: validate all interrupt lines are disabled
PASS: initialise set of enabled interrupt lines
PASS: validate set of enabled interrupt lines
PASS: disable all interrupt lines
PASS: validate all interrupt lines are disabled
PASS: initialise set of enabled interrupt lines
PASS: validate set of enabled interrupt lines
PASS: disable all interrupt lines
PASS: validate all interrupt lines are disabled
PASS: initialise set of enabled interrupt lines
PASS: validate set of enabled interrupt lines
PASS: disable all interrupt lines
PASS: validate all interrupt lines are disabled
PASS: initialise set of enabled interrupt lines
PASS: validate set of enabled interrupt lines
PASS: Repeat Save state
PASS: Restore State
PASS: disable all interrupt lines
PASS: enable interrupt line 0
PASS: disable all interrupt lines
PASS: enable interrupt line 1
PASS: disable all interrupt lines
PASS: enable interrupt line 2
PASS: disable all interrupt lines
PASS: enable interrupt line 3
PASS: disable all interrupt lines
PASS: enable interrupt line 4
PASS: disable all interrupt lines
PASS: enable interrupt line 5
PASS: disable all interrupt lines
PASS: enable interrupt line 6
PASS: disable all interrupt lines
PASS: enable interrupt line 7
PASS: disable all interrupt lines
PASS: enable interrupt line 8
PASS: disable all interrupt lines
PASS: enable interrupt line 9
PASS: disable all interrupt lines
PASS: enable interrupt line 10
PASS: disable all interrupt lines
PASS: enable interrupt line 11
PASS: disable all interrupt lines
PASS: enable interrupt line 12
PASS: disable all interrupt lines
PASS: enable interrupt line 13
PASS: disable all interrupt lines
PASS: enable interrupt line 14
PASS: disable all interrupt lines
PASS: enable interrupt line 15
PASS: disable all interrupt lines
PASS: enable interrupt line 16
PASS: disable all interrupt lines
PASS: enable interrupt line 17
PASS: disable all interrupt lines
PASS: enable interrupt line 18
PASS: disable all interrupt lines
PASS: enable interrupt line 19
PASS: disable all interrupt lines
PASS: enable interrupt line 20
PASS: disable all interrupt lines
PASS: enable interrupt line 21
PASS: disable all interrupt lines
PASS: enable interrupt line 22
PASS: disable all interrupt lines
PASS: enable interrupt line 23
PASS: disable all interrupt lines
PASS: enable interrupt line 24
PASS: disable all interrupt lines
PASS: enable interrupt line 25
PASS: disable all interrupt lines
PASS: enable interrupt line 26
PASS: disable all interrupt lines
PASS: enable interrupt line 27
PASS: disable all interrupt lines
PASS: enable interrupt line 28
PASS: disable all interrupt lines
PASS: enable interrupt line 29
PASS: disable all interrupt lines
PASS: enable interrupt line 30
PASS: disable all interrupt lines
PASS: enable interrupt line 31
PASS: interrupt masking
PASS: disable fast interrupt
PASS: validate fast interrupt disabled
PASS: enable fast interrupt
PASS: validate fast interrupt is enabled
PASS: fast interrupt
PASS: disable all interrupt lines
PASS: enable interrupt line 1 only
PASS: programmed interrupt
PASS: interrupt triggerpoint fired 69 times
PASS: fast-interrupt triggerpoint fired 3 times
PASS: irq-raw-status triggerpoint fired 2049 times
PASS: irq-enable-register triggerpoint fired 73 times
PASS: fiq-raw-status triggerpoint fired twice
PASS: fiq-enable-register triggerpoint fired once
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.interrupt/cma222-interrupt.exp ...
PASS: sid configuration
PASS: sid start
PASS: establish a triggerpoint for watchable state variable: interrupt
PASS: establish a triggerpoint for watchable state variable: irq-raw-status
PASS: establish a triggerpoint for watchable state variable: irq-enable-register
PASS: attribute list
PASS: get irq pin
PASS: get interrupt-source-0 pin
PASS: get interrupt-source-1 pin
PASS: get interrupt-source-2 pin
PASS: get interrupt-source-3 pin
PASS: get interrupt-source-4 pin
PASS: get interrupt-source-5 pin
PASS: get interrupt-source-6 pin
PASS: get interrupt-source-7 pin
PASS: get irq-register bus
PASS: disable all interrupt lines
PASS: enable interrupt line 0
PASS: validate interrupt 0 is still enabled
PASS: validate interrupt 0 is still enabled
PASS: masking interrupt from interrupt 3 when enabling interrupt 0 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 0 only
PASS: disable all interrupt lines
PASS: enable interrupt line 1
PASS: masking interrupt from interrupt 0 when enabling interrupt 1 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 1 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 1 only
PASS: disable all interrupt lines
PASS: enable interrupt line 2
PASS: masking interrupt from interrupt 0 when enabling interrupt 2 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 2 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 2 only
PASS: disable all interrupt lines
PASS: enable interrupt line 3
PASS: masking interrupt from interrupt 0 when enabling interrupt 3 only
PASS: validate interrupt 3 is still enabled
PASS: validate interrupt 3 is still enabled
PASS: masking interrupt from interrupt 4 when enabling interrupt 3 only
PASS: disable all interrupt lines
PASS: enable interrupt line 4
PASS: masking interrupt from interrupt 0 when enabling interrupt 4 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 4 only
PASS: validate interrupt 4 is still enabled
PASS: validate interrupt 4 is still enabled
PASS: disable all interrupt lines
PASS: enable interrupt line 5
PASS: masking interrupt from interrupt 0 when enabling interrupt 5 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 5 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 5 only
PASS: disable all interrupt lines
PASS: enable interrupt line 6
PASS: masking interrupt from interrupt 0 when enabling interrupt 6 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 6 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 6 only
PASS: disable all interrupt lines
PASS: enable interrupt line 7
PASS: masking interrupt from interrupt 0 when enabling interrupt 7 only
PASS: masking interrupt from interrupt 3 when enabling interrupt 7 only
PASS: masking interrupt from interrupt 4 when enabling interrupt 7 only
PASS: interrupt masking
PASS: interrupt triggerpoint fired 17 times
PASS: irq-raw-status triggerpoint fired 128 times
PASS: irq-enable-register triggerpoint fired 15 times
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.interrupt/interruptdocs.exp ...
PASS: Documentation file (txt) for hw-interrupt-arm/ref exists
PASS: Documentation file (xml) for hw-interrupt-arm/ref exists
PASS: Documentation file seems to document hw-interrupt-arm/ref
PASS: Documentation file (txt) for hw-interrupt-cogent/cma222 exists
PASS: Documentation file (xml) for hw-interrupt-cogent/cma222 exists
PASS: Documentation file seems to document hw-interrupt-cogent/cma222
Running ../../../../src/sid/component/testsuite/sidcomp.interrupt/interruptmonkey.exp ...
PASS: monkey test hw-interrupt-arm/ref (30s iterations)
PASS: monkey test hw-interrupt-cogent/cma222 (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.lcd/lcd1inv.exp ...
PASS: sid configuration
PASS: sid startup
PASS: set width to 10000000000000000
PASS: set width to 10000000000000000
PASS: set width to xyz
PASS: set width to xyz
PASS: set width to FALSE
PASS: set width to FALSE
PASS: set width to 1.234e-10
PASS: set width to 1.234e-10
PASS: set width to -1
PASS: set height to -1
PASS: set width to 0
PASS: set height to 0
PASS: query incorrect attributes name
PASS: set attributes values to non existing attribute
PASS: find pin that does not exist
PASS: connect pin that does not exist
PASS: disconnect pin that does not exist
PASS: check connected pins that does not exist
PASS: connect accessor that does not exist
PASS: find bus that does not exist
PASS: find connected bus that does not exist
PASS: set relationships that does not exist
PASS: query relationships that does not exist
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.lcd/lcd1val.exp ...
PASS: sid configuration
PASS: sid startup
PASS: initialise
PASS: check attribute list
PASS: check pin attribute list
PASS: check register attribute list
PASS: check watchable attribute list
PASS: check setting attribute list
PASS: check default value for width
PASS: check default value for height
PASS: get FR pin
PASS: drive FR pin with 0
PASS: drive FR pin with 1
PASS: get row-col pin
PASS: drive row-col pin with 0
PASS: drive row-col pin with 1
PASS: drive row-col pin with 2
PASS: drive row-col pin with 3
PASS: drive row-col pin with 4
PASS: drive row-col pin with 5
PASS: drive row-col pin with 6
PASS: drive row-col pin with 7
PASS: drive row-col pin with 8
PASS: drive row-col pin with 9
PASS: Save state
PASS: Change the width setting to 100
PASS: Check the width setting
PASS: Change the height setting to 12
PASS: Check the height setting
PASS: Restore previous state
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.lcd/lcdbase.exp ...
PASS: sid configuration
PASS: sid startup
PASS: acquire bus
PASS: Save state
PASS: get display row-col pin
PASS: correct AC value after DR write
PASS: correct AC value after 2nd DR write
PASS: DR read
PASS: AC read
PASS: draw Cygnus logo
PASS: Restore state
PASS: get display row-col pin
PASS: correct AC value after DR write
PASS: correct AC value after 2nd DR write
PASS: DR read
PASS: AC read
PASS: draw Cygnus logo
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.lcd/lcdmonkey.exp ...
PASS: monkey test hw-lcd-hd44780u-a00 (30s iterations)
PASS: monkey test hw-lcd-hd44780u-a02 (30s iterations)
WARNING: monkey test hw-lcd-t6963c-0201 - state restore failed
WARNING: monkey test hw-lcd-t6963c-0201 - state restore did not preserve row-col
WARNING: monkey test hw-lcd-t6963c-0201 - state restore did not preserve GA
WARNING: monkey test hw-lcd-t6963c-0201 - state restore did not preserve refresh-period-msec
WARNING: monkey test hw-lcd-t6963c-0201 - state restore did not preserve FR
UNRESOLVED: monkey test hw-lcd-t6963c-0201 (30s iterations)
WARNING: monkey test hw-lcd-t6963c-0101 - state restore failed
WARNING: monkey test hw-lcd-t6963c-0101 - state restore did not preserve GA
WARNING: monkey test hw-lcd-t6963c-0101 - state restore did not preserve row-col
WARNING: monkey test hw-lcd-t6963c-0101 - state restore did not preserve FR
WARNING: monkey test hw-lcd-t6963c-0101 - state restore did not preserve refresh-period-msec
UNRESOLVED: monkey test hw-lcd-t6963c-0101 (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.loader/loader.exp ...
PASS: sid configuration
PASS: sid startup
PASS: attribute list
PASS: set file = x32.x
PASS: load x32.x
PASS: set file = x64.x
PASS: load x64.x
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.mapper/basicmapper.exp ...
PASS: sid configuration
PASS: sid startup
PASS: all attributes are present
PASS: access-port bus is present
PASS: acquire mapper bus handle
PASS: no known accessors at startup
PASS: generate test bus #1
PASS: generate test bus #2
PASS: generate test bus #3
PASS: generate test bus #4
PASS: connect test bus #1 to the mapper
PASS: prior accessor is now registered
PASS: connect an accessor with an invalid name: abc
PASS: connect an accessor with an invalid name: [foo]
PASS: connect an accessor with an invalid name: [bar
PASS: connect an accessor with an invalid name: [0,abc]
PASS: connect an accessor with an invalid name: [zog]
PASS: connect an accessor with an invalid name: [0-foo]
PASS: connect an accessor with an invalid name: [0--foo]
PASS: connect an accessor with an invalid name: [0x100-0x200,3,1]
PASS: connect an accessor with an invalid name: [0x100-0x200,1,3]
PASS: connect an accessor with an invalid name: [0x100]{a}
PASS: connect an accessor with an invalid name: [1-2]{}
PASS: only one accessor is still registered
PASS: connect test bus #2 to the mapper
PASS: connect test bus #3 to the mapper
PASS: connect test bus #4 to the mapper
PASS: four accessors are now registered
PASS: detect & reject overlapping address ranges
PASS: disconnect existing accessors--to start afresh
PASS: establish many 1-byte wide accessors for testing
PASS: establish many 2-byte wide accessors for testing
PASS: establish many 4-byte wide accessors for testing
PASS: establish many 8-byte wide accessors for testing
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 1
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 2
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 4
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 8
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 16
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 32
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 64
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 128
PASS: simple walk along bus (aligned 1-byte reads/writes) with stride 256
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 2
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 4
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 8
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 16
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 32
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 64
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 128
PASS: simple walk along bus (aligned 2-byte reads/writes) with stride 256
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 4
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 8
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 16
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 32
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 64
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 128
PASS: simple walk along bus (aligned 4-byte reads/writes) with stride 256
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 8
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 16
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 32
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 64
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 128
PASS: simple walk along bus (aligned 8-byte reads/writes) with stride 256
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 1 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 1 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 1 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 1 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 2 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 2 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 2 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 2 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 4 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 4 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 4 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 4 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 8 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 8 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 8 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 8 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 16 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 16 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 16 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 16 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 32 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 32 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 32 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 32 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 64 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 64 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 64 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 64 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 128 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 128 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 128 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 128 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 256 width 1
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 256 width 1
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 256 width 1
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 256 width 1
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 2 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 2 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 2 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 2 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 4 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 4 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 4 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 4 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 8 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 8 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 8 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 8 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 16 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 16 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 16 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 16 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 32 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 32 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 32 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 32 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 64 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 64 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 64 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 64 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 128 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 128 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 128 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 128 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 256 width 2
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 256 width 2
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 256 width 2
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 256 width 2
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 4 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 4 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 4 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 4 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 8 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 8 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 8 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 8 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 16 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 16 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 16 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 16 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 32 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 32 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 32 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 32 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 64 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 64 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 64 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 64 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 128 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 128 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 128 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 128 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 256 width 4
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 256 width 4
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 256 width 4
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 256 width 4
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 8 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 8 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 8 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 8 width 8
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 16 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 16 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 16 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 16 width 8
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 32 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 32 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 32 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 32 width 8
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 64 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 64 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 64 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 64 width 8
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 128 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 128 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 128 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 128 width 8
PASS: width-adjusted walk along bus (1-byte reads/writes) with stride 256 width 8
PASS: width-adjusted walk along bus (2-byte reads/writes) with stride 256 width 8
PASS: width-adjusted walk along bus (4-byte reads/writes) with stride 256 width 8
PASS: width-adjusted walk along bus (8-byte reads/writes) with stride 256 width 8
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.mapper/busif.exp ...
UNTESTED: busif component not available for static tests
Running ../../../../src/sid/component/testsuite/sidcomp.mapper/mapperdocs.exp ...
PASS: Documentation file (txt) for hw-mapper-basic exists
PASS: Documentation file (xml) for hw-mapper-basic exists
PASS: Documentation file seems to document hw-mapper-basic
Running ../../../../src/sid/component/testsuite/sidcomp.mapper/mappermonkey.exp ...
PASS: monkey test hw-mapper-basic (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.memory/am29.exp ...
PASS: sid configuration
PASS: sid start
PASS: attribute list
PASS: read-write-port bus is present
PASS: set an invalid sector size of 0 bytes
PASS: set an invalid sector size of 123456789 bytes
PASS: set and validate sector size of 16 bytes
PASS: set and validate sector size of 32 bytes
PASS: set and validate sector size of 128 bytes
PASS: set and validate sector size of 256 bytes
PASS: set and validate sector size of 512 bytes
PASS: set and validate sector size of 1024 bytes
PASS: validate memory is fully erased from the factory
PASS: initial mode is READ (0)
PASS: enter autoselect mode
PASS: return to read mode
PASS: invalid unlock1 sequence sends device to read mode
PASS: invalid unlock2 sequence sends device to read mode
PASS: issue reset command
PASS: read manufacturer code without entering autoselect mode
PASS: read device id code without entering autoselect mode
PASS: read manufacturer code
PASS: read device id code for a typical flash (id=0x4F)
PASS: read sector protect verify status for each sector address
PASS: return to read mode
PASS: set size to 512 bytes
PASS: validate size is 512 bytes
PASS: test for memory leaks
PASS: set memory size to 8192 bytes
PASS: set sector size to 256 bytes
PASS: chip erase sets all ones
PASS: write a single byte
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: write lots of bytes across sector boundaries
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: validate freshly written bytes
PASS: enter unlock bypass mode
PASS: reset from unlock bypass mode to read mode
PASS: a zero cannot be reset to a one in any location
PASS: sector erase
PASS: read memory image from a file
PASS: verify read memory image
PASS: save state
PASS: restore state
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/at29.exp ...
PASS: sid configuration
PASS: sid start
PASS: attribute list
PASS: read-write-port bus is present
PASS: set size to 512 bytes
PASS: validate size is 512 bytes
PASS: test for memory leaks
PASS: set memory size to 8192 bytes
PASS: set an invalid sector size of 0 bytes
PASS: set an invalid sector size of 8193 bytes
PASS: set and validate sector size of 16 bytes
PASS: set and validate sector size of 32 bytes
PASS: set and validate sector size of 128 bytes
PASS: set and validate sector size of 256 bytes
PASS: set and validate sector size of 512 bytes
PASS: set and validate sector size of 1024 bytes
PASS: set sector size to 256 bytes
PASS: validate sector size is 256 bytes
PASS: read memory image from a file
PASS: verify read memory image
PASS: unpermitted write to address 0x0 has no effect
PASS: unpermitted write to address 0x100 has no effect
PASS: unpermitted write to address 0x1E0 has no effect
PASS: unpermitted write to address 0x20F has no effect
PASS: unpermitted write to address 0x222 has no effect
PASS: unpermitted write to address 0x29A has no effect
PASS: unpermitted write to address 0x4BC has no effect
PASS: unpermitted write to address 0x551 has no effect
PASS: unpermitted write to address 0x555 has no effect
PASS: unpermitted write to address 0x6B0 has no effect
PASS: unpermitted write to address 0x1010 has no effect
PASS: unpermitted write to address 0x10FF has no effect
PASS: writing magic bytes to disable software data protection
PASS: validate the first sector
PASS: illegitimately program the second sector
PASS: validate the second sector -- writes should have no effect
PASS: writing magic bytes to disable software data protection (2)
PASS: validate the third sector
PASS: read manufacturer code without issuing id command
PASS: writing magic bytes to enter identification mode
PASS: read manufacturer code
PASS: read device id code for a low-voltage flash (id=0x3B)
PASS: return to normal operating mode
PASS: check for normal operating mode
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/at29inv.exp ...
PASS: sid configuration
PASS: sid start
PASS: try to set size-max
PASS: set size to 10000000000000000
PASS: set size to size-max+1
PASS: set size to -1
PASS: set size to abcdefghijklmn
PASS: set size to FALSE
PASS: set size to 1.234e-10
PASS: set size to 0
PASS: set sector-size to -1
PASS: set sector-size to 0
PASS: set sector-size to 10000000000000000
PASS: set sector-size to xyz
PASS: set sector-size to FALSE
PASS: set sector-size to 1.234e-10
PASS: set device-code to 0x100
PASS: set device-code to -1
PASS: set device-code to 10000000000000000
PASS: set device-code to xyz
PASS: set device-code to FALSE
PASS: set device-code to 1.234e-10
PASS: set sector-size bigger than size
PASS: drive image-load with unset image-file attribute
PASS: drive image-store with unset image-file attribute
PASS: attribute list with incorrect category names
PASS: query incorrect attributes name
PASS: set attributes values to non existing attribute
PASS: find pin that does not exist
PASS: connect pin that does not exist
PASS: disconnect pin that does not exist
PASS: check connected pins that does not exist
PASS: connect read-write-port as a accessor
PASS: check connected read-write-port bus
PASS: connect accessor that does not exist
PASS: find bus that does not exist
PASS: find connected bus that does not exist
PASS: set relationships that does not exist
PASS: query relationships that does not exist
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/at29val.exp ...
PASS: sid configuration
PASS: sid start
PASS: check setting attribute list
PASS: check pin attribute list
PASS: check register attribute list
PASS: check watchable attribute list
PASS: check pin names
PASS: check bus names
PASS: check accessor names
PASS: check relationships
PASS: check default device-code is 0x5B
PASS: check default manufacturer-code is 0x1F
PASS: check default size is 524288
PASS: check default sector-size is 512
PASS: try to set manufacturer-code to 0x2F
PASS: check size-max
PASS: set size to size-max
PASS: set size to size-max-1
PASS: set sector-size to 1
PASS: set sector-size to 0
PASS: set device-code to 0x01
PASS: set device-code to 0x00
PASS: read memory image from a file that contains more bytes than the size
PASS: verify after image-load
PASS: read memory image from a file that contains less bytes than the size
PASS: verify after image-load II
PASS: set memory before image-store
PASS: drive image-store
PASS: reset memory after image-store
PASS: load the stored image and verify values
PASS: find image-store pin
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/at29xx.exp ...
PASS: at29c256 :sid configuration
PASS: at29c256 :sid start
PASS: at29c256 :validate size is 32*1024 bytes
PASS: at29c256 :validate sector-size is 64
PASS: at29c256 :validate device-code is 0xDC
PASS: at29c256 :sid stop
PASS: at29lv256 :sid configuration
PASS: at29lv256 :sid start
PASS: at29lv256 :validate size is 32*1024 bytes
PASS: at29lv256 :validate sector-size is 64
PASS: at29lv256 :validate device-code is 0xBC
PASS: at29lv256 :sid stop
PASS: at29c257 :sid configuration
PASS: at29c257 :sid start
PASS: at29c257 :validate size is 32*1024 bytes
PASS: at29c257 :validate sector-size is 64
PASS: at29c257 :validate device-code is 0xDC
PASS: at29c257 :sid stop
PASS: at29c512 :sid configuration
PASS: at29c512 :sid start
PASS: at29c512 :validate size is 64*1024 bytes
PASS: at29c512 :validate sector-size is 128
PASS: at29c512 :validate device-code is 0x5D
PASS: at29c512 :sid stop
PASS: at29lv512 :sid configuration
PASS: at29lv512 :sid start
PASS: at29lv512 :validate size is 64*1024 bytes
PASS: at29lv512 :validate sector-size is 128
PASS: at29lv512 :validate device-code is 0x3D
PASS: at29lv512 :sid stop
PASS: at29c010a :sid configuration
PASS: at29c010a :sid start
PASS: at29c010a :validate size is 128*1024 bytes
PASS: at29c010a :validate sector-size is 128
PASS: at29c010a :validate device-code is 0xD5
PASS: at29c010a :sid stop
PASS: at29lv010a :sid configuration
PASS: at29lv010a :sid start
PASS: at29lv010a :validate size is 128*1024 bytes
PASS: at29lv010a :validate sector-size is 128
PASS: at29lv010a :validate device-code is 0x35
PASS: at29lv010a :sid stop
PASS: at29bv010a :sid configuration
PASS: at29bv010a :sid start
PASS: at29bv010a :validate size is 128*1024 bytes
PASS: at29bv010a :validate sector-size is 128
PASS: at29bv010a :validate device-code is 0x35
PASS: at29bv010a :sid stop
PASS: at29c020 :sid configuration
PASS: at29c020 :sid start
PASS: at29c020 :validate size is 256*1024 bytes
PASS: at29c020 :validate sector-size is 256
PASS: at29c020 :validate device-code is 0xDA
PASS: at29c020 :sid stop
PASS: at29lv020 :sid configuration
PASS: at29lv020 :sid start
PASS: at29lv020 :validate size is 256*1024 bytes
PASS: at29lv020 :validate sector-size is 256
PASS: at29lv020 :validate device-code is 0xBA
PASS: at29lv020 :sid stop
PASS: at29bv020 :sid configuration
PASS: at29bv020 :sid start
PASS: at29bv020 :validate size is 256*1024 bytes
PASS: at29bv020 :validate sector-size is 256
PASS: at29bv020 :validate device-code is 0xBA
PASS: at29bv020 :sid stop
PASS: at29c040a :sid configuration
PASS: at29c040a :sid start
PASS: at29c040a :validate size is 512*1024 bytes
PASS: at29c040a :validate sector-size is 512
PASS: at29c040a :validate device-code is 0x5B
PASS: at29c040a :sid stop
PASS: at29lv040 :sid configuration
PASS: at29lv040 :sid start
PASS: at29lv040 :validate size is 512*1024 bytes
PASS: at29lv040 :validate sector-size is 512
PASS: at29lv040 :validate device-code is 0x3B
PASS: at29lv040 :sid stop
PASS: at29bv040 :sid configuration
PASS: at29bv040 :sid start
PASS: at29bv040 :validate size is 512*1024 bytes
PASS: at29bv040 :validate sector-size is 512
PASS: at29bv040 :validate device-code is 0x3B
PASS: at29bv040 :sid stop
PASS: at29c040a :sid configuration
PASS: at29c040a :sid start
PASS: at29c040a :validate size is 512*1024 bytes
PASS: at29c040a :validate sector-size is 256
PASS: at29c040a :validate device-code is 0xA4
PASS: at29c040a :sid stop
PASS: at29lv040a :sid configuration
PASS: at29lv040a :sid start
PASS: at29lv040a :validate size is 512*1024 bytes
PASS: at29lv040a :validate sector-size is 256
PASS: at29lv040a :validate device-code is 0xC4
PASS: at29lv040a :sid stop
PASS: at29bv040a :sid configuration
PASS: at29bv040a :sid start
PASS: at29bv040a :validate size is 512*1024 bytes
PASS: at29bv040a :validate sector-size is 256
PASS: at29bv040a :validate device-code is 0xC4
PASS: at29bv040a :sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/genericmemory.exp ...
PASS: sid configuration
PASS: sid startup
PASS: attribute list
PASS: set size = 512
PASS: get buses
PASS: fill memory with junk bytes
PASS: read junk from memory via read-only port
PASS: get memory state dump
PASS: reset memory size
PASS: spot check clear memory
FAIL: set memory state dump
PASS: check memory size after restore
FAIL: reread junk from memory after restore - mismatch @ 3 - 192 vs 0
FAIL: reread junk from memory after restore
PASS: test for memory leaks
PASS: resize memory for file test
PASS: read memory image from a file
PASS: verify read memory image
PASS: make a big memory buffer
PASS: fill it sparsely
PASS: take sparse (RLE) snapshot
PASS: clear memory
FAIL: reload sparse (RLE) snapshot
PASS: load junk snapshot
FAIL: save & restore large memory snapshot - ok bad_value
PASS: reset memory size to 8192
PASS: map memory image from a file
PASS: verify mmap memory image via read
PASS: modify mmap memory image
PASS: write out memory image
PASS: check written memory image
PASS: msync memory
PASS: check msync'd memory image
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.memory/memdocs.exp ...
PASS: Documentation file (txt) for hw-memory-ram/rom-basic exists
PASS: Documentation file (xml) for hw-memory-ram/rom-basic exists
PASS: Documentation file seems to document hw-memory-ram/rom-basic
PASS: Documentation file (txt) for hw-memory-flash-at29 exists
PASS: Documentation file (xml) for hw-memory-flash-at29 exists
PASS: Documentation file seems to document hw-memory-flash-at29
PASS: Documentation file (txt) for hw-memory-flash-am29 exists
PASS: Documentation file (xml) for hw-memory-flash-am29 exists
PASS: Documentation file seems to document hw-memory-flash-am29
Running ../../../../src/sid/component/testsuite/sidcomp.memory/memmonkey.exp ...
WARNING: monkey test hw-memory-ram/rom-basic - state restore failed
WARNING: monkey test hw-memory-ram/rom-basic - state restore did not preserve image-mmap
WARNING: monkey test hw-memory-ram/rom-basic - state restore did not preserve image-msync
UNRESOLVED: monkey test hw-memory-ram/rom-basic (30s iterations)
WARNING: monkey test hw-memory-flash-at29 - state restore failed
WARNING: monkey test hw-memory-flash-at29 - state restore did not preserve image-mmap
WARNING: monkey test hw-memory-flash-at29 - state restore did not preserve image-msync
UNRESOLVED: monkey test hw-memory-flash-at29 (30s iterations)
WARNING: monkey test hw-memory-flash-am29 - state restore failed
WARNING: monkey test hw-memory-flash-am29 - state restore did not preserve image-mmap
FAIL: monkey test hw-memory-flash-am29 - timeout after {sid::component::attribute_value sid-component#2 state-snapshot}
UNRESOLVED: monkey test hw-memory-flash-am29 - timeout before {sid::component::find_pin sid-component#2 image-msync}
UNRESOLVED: monkey test hw-memory-flash-am29 - timeout before {sid::component::find_bus sid-component#2 read-write-port}
UNRESOLVED: monkey test hw-memory-flash-am29 - timeout before {sid::bus::read_h4_l2 {} 9963304}
FAIL: monkey test hw-memory-flash-am29 (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.mmu/arm-remap.exp ...
PASS: sid configuration
PASS: sid startup
PASS: establish a triggerpoint for watchable state variable: remapping?
PASS: set bus accessor
PASS: basic attributes present
PASS: take snapshot of startup state
PASS: remapping? attribute is yes at initialisation
PASS: switch to normal map for startup
PASS: remapping? is now set to no
PASS: switch back to reset map for continuation of these tests
PASS: remapping? is now set to yes
PASS: num-relocations is initially zero
PASS: configure for two (2) relocations
PASS: validate num-relocations is two (2)
PASS: falling back to only one relocation gives bad_value
PASS: newly generated attributes are present
PASS: no extraneous attributes have been generated
PASS: validate 0- attributes are all initialized
PASS: validate 1- attributes are all initialized
PASS: set 0- attributes
PASS: set 1- attributes
PASS: validate 0- attributes are set correctly
PASS: validate 1- attributes are set correctly
PASS: register bus is present
PASS: access-port bus is present
PASS: reset pin is present
PASS: halt! pin is present
PASS: connect accessor to a dummy bus
PASS: remap around the mapped region
PASS: take another state snapshot
PASS: reserved register write_h4_l4 (0x10)
PASS: reserved register read_h4_l4 (0x0x0)
PASS: reserved register read_h4_l4 (0x0x20)
PASS: reserved register read_h4_l4 (0x0x34)
PASS: reset status set register write (unused)
PASS: read identification register
PASS: write to pause register causes halt! pin to be driven high
PASS: reset status register is clear at power-up
PASS: reset status register is set after a reset
PASS: reset status clear register write
PASS: clear reset mode memory map
PASS: bus handle is invariant after switching to the normal map
PASS: remapping? attribute is not in normal mode
PASS: remap through the normal mapping
PASS: restore initial state
PASS: remapping? triggerpoint fired three times
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.mmu/mmudocs.exp ...
PASS: Documentation file (txt) for hw-remap/pause-arm/ref exists
PASS: Documentation file (xml) for hw-remap/pause-arm/ref exists
PASS: Documentation file seems to document hw-remap/pause-arm/ref
Running ../../../../src/sid/component/testsuite/sidcomp.mmu/mmumonkey.exp ...
PASS: monkey test hw-remap/pause-arm/ref (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.parport/parmonkey.exp ...
PASS: monkey test hw-parport-ps/2 (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.parport/parport.exp ...
PASS: sid configuration
PASS: sid startup
PASS: acquire bus
PASS: Reading default PR reg. val 0
PASS: Reading default SR reg val 0x07
PASS: Reading default COM reg val 0xE0
PASS: Presence data pin 0
PASS: Presence data pin 1
PASS: Presence data pin 2
PASS: Presence data pin 3
PASS: Presence data pin 4
PASS: Presence data pin 5
PASS: Presence data pin 6
PASS: Presence data pin 7
PASS: Presence data pin 7
PASS: reading PR register 0xFF
PASS: op data pin 0 val
PASS: op data pin 1 val
PASS: op data pin 2 val
PASS: op data pin 3 val
PASS: op data pin 4 val
PASS: op data pin 5 val
PASS: op data pin 6 val
PASS: op data pin 7 val
PASS: op data pin 7 val
PASS: reading PR register 0xAB
PASS: op data pin 0 val
PASS: op data pin 1 val
PASS: op data pin 2 val
PASS: op data pin 3 val
PASS: op data pin 4 val
PASS: op data pin 5 val
PASS: op data pin 6 val
PASS: op data pin 7 val
PASS: op data pin 7 val
PASS: reading PR register 0x00
PASS: op data pin 0 val
PASS: op data pin 1 val
PASS: op data pin 2 val
PASS: op data pin 3 val
PASS: op data pin 4 val
PASS: op data pin 5 val
PASS: op data pin 6 val
PASS: op data pin 7 val
PASS: connected strobe pin
PASS: connected autofdxt pin
PASS: connected slctin pin
PASS: connected init pin
PASS: connected init pin
PASS: reading COM register expect 255
PASS: expected COM value 255
PASS: Control op pin 0
PASS: Control op pin 1
PASS: Control op pin 3
PASS: Control op pin 2
PASS: Control op pin 2
PASS: reading COM register expect 230
PASS: expected COM value 230
PASS: Control op pin 0
PASS: Control op pin 1
PASS: Control op pin 3
PASS: Control op pin 2
PASS: Control op pin 2
PASS: reading COM register expect 224
PASS: expected COM value 224
PASS: Control op pin 0
PASS: Control op pin 1
PASS: Control op pin 3
PASS: Control op pin 2
PASS: get Error pin
PASS: get SLCT pin
PASS: get PE pin
PASS: get ACK pin
PASS: get Busy pin
PASS: Inspect SR reg expect val 0xF8
PASS: Inspect SR reg expect val 0xF8
PASS: Inspect SR reg expect val 0xC0
PASS: Inspect SR reg expect val 0xC0
PASS: Inspect SR reg expect val 0x00
PASS: Inspect SR reg expect val 0x00
PASS: Inspect SR reg expect val 0x00
PASS: Inspect SR reg expect val 0x00
PASS: Save state
PASS: Read mode check write to PR register
PASS: Expecting read PR value 0x00
PASS: op_dp(0) should be 0
PASS: op_dp(1) should be 0
PASS: op_dp(2) should be 0
PASS: op_dp(3) should be 0
PASS: op_dp(4) should be 0
PASS: op_dp(5) should be 0
PASS: op_dp(6) should be 0
PASS: op_dp(7) should be 0
PASS: Read mode PR register
PASS: Read mode PR reg value 0xFF
PASS: Read mode PR register
PASS: Read mode PR reg value 0x33
PASS: Read mode PR register
PASS: Read mode PR reg value 0x00
PASS: biden attribute value
PASS: set biden to 0
PASS: Read mode PR register iosel
PASS: Read mode iosel PR reg value 0xAB
PASS: Read mode PR register iosel
PASS: Read mode iosel PR reg value 0x66
PASS: Read mode PR register iosel
PASS: Read mode iosel PR reg value 0x00
PASS: write iosel register with value 0xAA Read Mode
PASS: Read mode iosel0xAA PR register
PASS: Read mode iosel0xAA PR reg value 0xCC
PASS: Read mode iosel0xAA PR register
PASS: Read mode iosel0xAA PR reg value 0x44
PASS: Read mode iosel0xAA PR register
PASS: Read mode iosel0xAA PR reg value 0x00
PASS: Read mode iosel0xAA PR register
PASS: Read mode iosel0xAA PR reg value 0xAA
PASS: Save state
PASS: states are different
PASS: states are different
PASS: writing PR register 0xEE iosel 0x55
PASS: reading PR register iosel 0x55
PASS: op data pin 0 val iosel0x55
PASS: op data pin 1 val iosel0x55
PASS: op data pin 2 val iosel0x55
PASS: op data pin 3 val iosel0x55
PASS: op data pin 4 val iosel0x55
PASS: op data pin 5 val iosel0x55
PASS: op data pin 6 val iosel0x55
PASS: op data pin 7 val iosel0x55
PASS: writing PR register 0xAA iosel 0x55
PASS: reading PR register iosel 0x55
PASS: op data pin 0 val iosel0x55
PASS: op data pin 1 val iosel0x55
PASS: op data pin 2 val iosel0x55
PASS: op data pin 3 val iosel0x55
PASS: op data pin 4 val iosel0x55
PASS: op data pin 5 val iosel0x55
PASS: op data pin 6 val iosel0x55
PASS: op data pin 7 val iosel0x55
PASS: writing PR register 0x00 iosel 0x55
PASS: reading PR register iosel 0x55
PASS: op data pin 0 val iosel0x55
PASS: op data pin 1 val iosel0x55
PASS: op data pin 2 val iosel0x55
PASS: op data pin 3 val iosel0x55
PASS: op data pin 4 val iosel0x55
PASS: op data pin 5 val iosel0x55
PASS: op data pin 6 val iosel0x55
PASS: op data pin 7 val iosel0x55
PASS: restore state
PASS: test random regs after restore
PASS: test random regs after restore
PASS: test random regs after restore
PASS: test random regs after restore
PASS: get intsel attr
PASS: set intsel val to 0
PASS: set CON register bit 4 to 1
PASS: read COM value expected 0xF0
PASS: read COM value expected 0xF0
PASS: reading intp pin
PASS: reading SR to see ack & bit 2
PASS: reading SR to see ack & bit 2
PASS: reading intp pin
PASS: reading SR to see ack & bit 2
PASS: reading SR to see ack & bit 2
PASS: reading intp pin
PASS: reading SR to see ack & bit 2
PASS: reading SR to see ack & bit 2
PASS: set intsel value 1
PASS: reading SR intsel 1
PASS: reading SR intsel 1
PASS: ack high intsel 1
PASS: ack high intsel 1
PASS: interrupt raised
PASS: intp pin should remain 1
PASS: intp pin should remain 1
PASS: intp pin should remain 1
PASS: clearing interrupt
PASS: clearing interrupt
PASS: clearing interrupt bit 2 should be 1
PASS: clearing interrupt bit 2 should be 1
PASS: Again raised interrupt
PASS: disabling interrupt bit 5
PASS: disabling interrupt bit 5
PASS: setting intsel back to 0
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.parport/parportdocs.exp ...
PASS: Documentation file (txt) for hw-parport-ps/2 exists
PASS: Documentation file (xml) for hw-parport-ps/2 exists
PASS: Documentation file seems to document hw-parport-ps/2
Running ../../../../src/sid/component/testsuite/sidcomp.profiling/profilingdocs.exp ...
PASS: Documentation file (txt) for sw-profile-gprof exists
PASS: Documentation file (xml) for sw-profile-gprof exists
PASS: Documentation file seems to document sw-profile-gprof
Running ../../../../src/sid/component/testsuite/sidcomp.profiling/runprof.exp ...
UNTESTED: arm7tdmi test-prof.c (,,-mlittle-endian,--cpu=arm --gprof --insn-count=2037) - compile failed
FAIL: profiling created gmon.out
Running ../../../../src/sid/component/testsuite/sidcomp.rtc/ds1642.exp ...
PASS: sid configuration
PASS: sid start
PASS: read-write-port bus is present
PASS: clock pin is present
PASS: all attributes are present
PASS: reported time since epoch is sensible
PASS: establish a triggerpoint for watchable state variable: epoch-time
PASS: establish a triggerpoint for watchable state variable: oscillating
PASS: establish a triggerpoint for watchable state variable: write-mode
PASS: save state
PASS: time is incremented by an advancing clock
PASS: read year attribute
PASS: read month attribute
PASS: read date attribute
PASS: read day-of-week attribute
PASS: read hour attribute
PASS: read minute attribute
PASS: read second attribute
PASS: fill regular non-volatile memory with test bytes
PASS: validate memory was written correctly
PASS: out by one address is caught unmapped
PASS: battery is not flat
PASS: read mode does not alter epoch time
PASS: write mode does not alter epoch time
PASS: read year register
PASS: read month register
PASS: read date register
PASS: read day register
PASS: read hour register
PASS: read minutes register
PASS: read seconds register
PASS: read bit stops the clock
PASS: write bit stops the clock
PASS: disconnect the oscillator
PASS: read year register with oscillator disconnected
PASS: read month register with oscillator disconnected
PASS: read date register with oscillator disconnected
PASS: read day register with oscillator disconnected
PASS: read hour register with oscillator disconnected
PASS: read minutes register with oscillator disconnected
PASS: read seconds register with oscillator disconnected
PASS: reconnect the oscillator
PASS: reconnecting the oscillator works
PASS: modify the year register
PASS: modify the month register
PASS: modify the date register
PASS: modify the day register with an invalid value
PASS: modify the day register
PASS: modify the hour register
PASS: modify the minute register
PASS: modify the second register
PASS: store data in free bits at 0x7FE
PASS: store data in free bits at 0x7FD
PASS: store data in free bits at 0x7FC
PASS: store data in free bits at 0x7FB
PASS: store data in free bits at 0x7FA
PASS: epoch-time triggerpoint fired 16 times
PASS: oscillating triggerpoint fired twice
PASS: write-mode triggerpoint fired 37 times
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.rtc/ds1742.exp ...
PASS: sid configuration
PASS: sid start
PASS: read-write-port bus is present
PASS: clock pin is present
PASS: all attributes are present
PASS: reported time since epoch is sensible
PASS: establish a triggerpoint for watchable state variable: epoch-time
PASS: establish a triggerpoint for watchable state variable: oscillating
PASS: establish a triggerpoint for watchable state variable: write-mode
PASS: save state
PASS: time is incremented by an advancing clock
PASS: read century attribute
PASS: read year attribute
PASS: read month attribute
PASS: read date attribute
PASS: read day-of-week attribute
PASS: read hour attribute
PASS: read minute attribute
PASS: read second attribute
PASS: fill regular non-volatile memory with test bytes
PASS: validate memory was written correctly
PASS: out by one address is caught unmapped
PASS: battery is not flat
PASS: read mode does not alter epoch time
PASS: write mode does not alter epoch time
PASS: read year register
PASS: read month register
PASS: read date register
PASS: read day register
PASS: read hour register
PASS: read minutes register
PASS: read seconds register
PASS: read bit stops the clock
PASS: write bit stops the clock
PASS: disconnect the oscillator
PASS: read year register with oscillator disconnected
PASS: read month register with oscillator disconnected
PASS: read date register with oscillator disconnected
PASS: read day register with oscillator disconnected
PASS: read hour register with oscillator disconnected
PASS: read minutes register with oscillator disconnected
PASS: read seconds register with oscillator disconnected
PASS: reconnect the oscillator
PASS: reconnecting the oscillator works
PASS: modify the year register
PASS: modify the month register
PASS: modify the date register
PASS: modify the day register with an invalid value
PASS: modify the day register
PASS: modify the hour register
PASS: modify the minute register
PASS: modify the second register
PASS: modify the century register
PASS: Restore state
PASS: time is incremented by an advancing clock
PASS: read century attribute
PASS: read year attribute
PASS: read month attribute
PASS: read date attribute
PASS: read day-of-week attribute
PASS: read hour attribute
PASS: read minute attribute
PASS: read second attribute
PASS: fill regular non-volatile memory with test bytes
PASS: validate memory was written correctly
PASS: out by one address is caught unmapped
PASS: battery is not flat
PASS: read mode does not alter epoch time
PASS: write mode does not alter epoch time
PASS: read year register
PASS: read month register
PASS: read date register
PASS: read day register
PASS: read hour register
PASS: read minutes register
PASS: read seconds register
PASS: read bit stops the clock
PASS: write bit stops the clock
PASS: disconnect the oscillator
PASS: read year register with oscillator disconnected
PASS: read month register with oscillator disconnected
PASS: read date register with oscillator disconnected
PASS: read day register with oscillator disconnected
PASS: read hour register with oscillator disconnected
PASS: read minutes register with oscillator disconnected
PASS: read seconds register with oscillator disconnected
PASS: reconnect the oscillator
PASS: reconnecting the oscillator works
PASS: modify the year register
PASS: modify the month register
PASS: modify the date register
PASS: modify the day register with an invalid value
PASS: modify the day register
PASS: modify the hour register
PASS: modify the minute register
PASS: modify the second register
PASS: modify the century register
PASS: store data in free bits at 0x7FE
PASS: store data in free bits at 0x7FD
PASS: store data in free bits at 0x7FC
PASS: store data in free bits at 0x7FB
PASS: store data in free bits at 0x7FA
PASS: epoch-time triggerpoint fired 16 times
PASS: oscillating triggerpoint fired twice
PASS: write-mode triggerpoint fired 37 times
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.rtc/rtcdocs.exp ...
PASS: Documentation file (txt) for hw-rtc-ds1642 exists
PASS: Documentation file (xml) for hw-rtc-ds1642 exists
PASS: Documentation file seems to document hw-rtc-ds1642
PASS: Documentation file (txt) for hw-rtc-ds1742 exists
PASS: Documentation file (xml) for hw-rtc-ds1742 exists
PASS: Documentation file seems to document hw-rtc-ds1742
PASS: Documentation file (txt) for hw-rtc-sid exists
PASS: Documentation file (xml) for hw-rtc-sid exists
PASS: Documentation file seems to document hw-rtc-sid
PASS: Documentation file (txt) for hw-visual-clock exists
PASS: Documentation file (xml) for hw-visual-clock exists
PASS: Documentation file seems to document hw-visual-clock
Running ../../../../src/sid/component/testsuite/sidcomp.rtc/rtcmonkey.exp ...
PASS: monkey test hw-rtc-ds1642 (30s iterations)
PASS: monkey test hw-rtc-ds1742 (30s iterations)
PASS: monkey test hw-rtc-sid (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.sched/schedbase.exp ...
PASS: sid configuration
PASS: sid startup
PASS: attribute list
PASS: check num-clients=0
PASS: set num-clients=2
PASS: attribute list proper after growth
PASS: reset num-clients=1
PASS: set out-of-range num-clients
PASS: check num-clients=1
PASS: attribute list proper after shrinkage
PASS: one-shot event
PASS: multiple interleaved regular subscriptions
PASS: multiple interleaved regular subscriptions with scaling
PASS: save state snapshot
PASS: cancel some regular events; exercise yielding
PASS: cancel last regular event
PASS: save state snapshot before restore
PASS: restore state snapshot
PASS: save state snapshot after restore
PASS: compare original and post-restore state snapshots
PASS: cancel some regular events (after restore)
PASS: cancel last regular event (after restore)
PASS: invalid scales
PASS: tolerate teeny scales
PASS: try save/restore with num_clients=10
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.sched/scheddocs.exp ...
PASS: Documentation file (txt) for sid-sched-host exists
PASS: Documentation file (xml) for sid-sched-host exists
PASS: Documentation file seems to document sid-sched-host
PASS: Documentation file (txt) for sid-sched-host-accurate exists
PASS: Documentation file (xml) for sid-sched-host-accurate exists
PASS: Documentation file seems to document sid-sched-host-accurate
PASS: Documentation file (txt) for sid-sched-sim exists
PASS: Documentation file (xml) for sid-sched-sim exists
PASS: Documentation file seems to document sid-sched-sim
Running ../../../../src/sid/component/testsuite/sidcomp.sched/schedhost.exp ...
PASS: sid configuration
PASS: sid startup
PASS: host time regular events
PASS: idle-mode host time regular events
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.sched/schedhost2.exp ...
PASS: sid configuration
PASS: sid startup
PASS: host time regular events
PASS: idle-mode host time regular events
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.sched/schedmonkey.exp ...
PASS: monkey test sid-sched-sim (30s iterations)
PASS: monkey test sid-sched-host-accurate (30s iterations)
PASS: monkey test sid-sched-host (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.timers/timerbase.exp ...
PASS: sid configuration
PASS: sid startup
PASS: establish a triggerpoint for watchable state variable: enabled
PASS: establish a triggerpoint for watchable state variable: mode
PASS: establish a triggerpoint for watchable state variable: prescale
PASS: establish a triggerpoint for watchable state variable: load-value
PASS: establish a triggerpoint for watchable state variable: counter
PASS: attribute list
PASS: reserved register write_h4_l4 (0x04)
PASS: reserved register read_h4_l4 (0x04)
PASS: reserved register write_h4_l4 (0x10)
PASS: reserved register read_h4_l4 (0x010)
PASS: set / retrieve a load value (byte)
PASS: save state
PASS: set / retrieve a load value (half-word)
PASS: Re save state
PASS: restore state
PASS: Re Re save state
PASS: set / retrieve a load value (word)
PASS: retrieve timer value (word)
PASS: clear interrupts
PASS: get control word
PASS: turn timer on
PASS: tick presence of clock pin
PASS: tick timer for almost 0x0C steps = 0xBF ticks
PASS: tick timer for final tick
PASS: clear interrupt
PASS: enabled triggerpoint fired twice
PASS: mode triggerpoint fired twice
PASS: prescale triggerpoint fired twice
PASS: load-value triggerpoint fired four times
PASS: counter triggerpoint fired 16 times
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.timers/timerdocs.exp ...
PASS: Documentation file (txt) for hw-timer-arm/ref-nosched exists
FAIL: Documentation file (xml) for hw-timer-arm/ref-nosched is missing
FAIL: Documentation file does not seem to document hw-timer-arm/ref-nosched
PASS: Documentation file (txt) for hw-timer-arm/ref-sched exists
FAIL: Documentation file (xml) for hw-timer-arm/ref-sched is missing
FAIL: Documentation file does not seem to document hw-timer-arm/ref-sched
Running ../../../../src/sid/component/testsuite/sidcomp.timers/timermonkey.exp ...
PASS: monkey test hw-timer-arm/ref-nosched (30s iterations)
PASS: monkey test hw-timer-arm/ref-sched (30s iterations)
Running ../../../../src/sid/component/testsuite/sidcomp.timers/timersched.exp ...
PASS: sid configuration w/ scheduler
PASS: sid startup
PASS: test presence of scheduler component
PASS: attribute list
PASS: reserved register write_h4_l4 (0x04)
PASS: reserved register read_h4_l4 (0x04)
PASS: reserved register write_h4_l4 (0x10)
PASS: reserved register read_h4_l4 (0x010)
PASS: set / retrieve a load value (byte)
PASS: set / retrieve a load value (half-word)
PASS: set / retrieve a load value (word)
PASS: retrieve timer value (word)
PASS: clear interrupts
PASS: get control word
PASS: turn timer on
PASS: tick presence of scheduler clock pin
PASS: tick timer for almost 0x0C steps = 0xB scheduler ticks
PASS: tick timer for final tick
PASS: clear interrupt
PASS: sid stop
Running ../../../../src/sid/component/testsuite/sidcomp.uart/uartdocs.exp ...
PASS: Documentation file (txt) for hw-uart-ns16550 exists
PASS: Documentation file (xml) for hw-uart-ns16550 exists
PASS: Documentation file seems to document hw-uart-ns16550
=== sidcomp Summary ===
# of expected passes 2017
# of unexpected failures 43
# of unresolved testcases 9
# of untested testcases 119
sidcomp test 0.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [patch] Additional insn support for ARM7T
2002-08-29 3:24 [patch] Additional insn support for ARM7T Robert Cragie
@ 2002-09-03 4:29 ` Robert Cragie
2002-09-07 7:58 ` Frank Ch. Eigler
1 sibling, 0 replies; 3+ messages in thread
From: Robert Cragie @ 2002-09-03 4:29 UTC (permalink / raw)
To: sid, cgen
[-- Attachment #1: Type: text/plain, Size: 1202 bytes --]
I had trouble extracting the patch from the mail. Here is it is an an
attachment. To apply:
cd <sid-home>/src/cgen/cpu
patch -p0 < arm7.cpu.patch
cd <sid-home>/build/sid/component/cgen-cpu/arm7t
make cgen-all
cd ../../../
make all install
where <sid-home> is your SID home directory.
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
> -----Original Message-----
> From: sid-owner@sources.redhat.com
> [mailto:sid-owner@sources.redhat.com]On Behalf Of Robert Cragie
> Sent: 29 August 2002 11:24
> To: sid@sources.redhat.com; cgen@sources.redhat.com
> Subject: [patch] Additional insn support for ARM7T
>
>
> Whilst trying to get eCos to run on SID, I realised it was
> failing due to a
> LDMIA instruction not being emulated in the CPU simulator. Here is a patch
> to complete the combinations of LDM/STM instructions which are missing in
> CGEN for the ARM7. I have a feeling that it could be implemented more
> efficiently, but I am somewhat a newbie to Scheme, and also to
> contributing
> patches in the GNU manner, so please bear with me.
[snip]
[-- Attachment #2: arm7.cpu.patch --]
[-- Type: application/octet-stream, Size: 22793 bytes --]
Index: arm7.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/arm7.cpu,v
retrieving revision 1.1
diff -c -p -r1.1 arm7.cpu
*** arm7.cpu 5 Jul 2001 12:45:47 -0000 1.1
--- arm7.cpu 3 Sep 2002 11:13:39 -0000
***************
*** 1453,1458 ****
--- 1453,1473 ----
(set addr (sub addr 4)))
)
+ (define-pmacro (ldmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (sub addr 4)))
+ )
+
+ (define-pmacro (ldmda-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (sub addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmda "Load multiple registers (postindex, decrement)"
()
"FIXME"
***************
*** 1479,1484 ****
--- 1494,1525 ----
)
)
+ (dnai ldmda-sw "Load multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ )
+ )
+
(dnai ldmda-wb "Load multiple registers (postindex, decrement, writeback)"
()
"FIXME"
***************
*** 1505,1510 ****
--- 1546,1577 ----
(set rn addr))
)
+ (dnai ldmda-sw-wb "Load multiple registers (postindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ (set rn addr))
+ )
+
(define-pmacro (ldmib-action bit-num)
(sequence ()
(set addr (add addr 4))
***************
*** 1517,1522 ****
--- 1584,1604 ----
(set pc (mem WI addr)))
)
+ (define-pmacro (ldmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+ )
+
+ (define-pmacro (ldmib-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (add addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmib "Load multiple register (preindex, increment)"
()
"FIXME"
***************
*** 1542,1547 ****
--- 1624,1654 ----
(multi-action 15 ldmib-action-r15))
)
+ (dnai ldmib-sw "Load multiple register (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15))
+ )
+
(dnai ldmib-wb "Load multiple registers (preindex, increment, writeback)"
()
"FIXME"
***************
*** 1568,1573 ****
--- 1675,1706 ----
(set rn addr))
)
+ (dnai ldmib-sw-wb "Load multiple registers (preindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (ldmia-action bit-num)
(sequence ()
(set (reg WI h-gr bit-num) (mem WI addr))
***************
*** 1580,1585 ****
--- 1713,1733 ----
(set addr (add addr 4)))
)
+ (define-pmacro (ldmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (add addr 4)))
+ )
+
+ (define-pmacro (ldmia-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (add addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmia "Load multiple registers (postindex, increment)"
()
"FIXME"
***************
*** 1605,1610 ****
--- 1753,1783 ----
(multi-action 15 ldmia-action-r15))
)
+ (dnai ldmia-sw "Load multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15))
+ )
+
(dnai ldmia-wb "Load multiple registers (postindex, increment, writeback)"
()
"FIXME"
***************
*** 1631,1636 ****
--- 1804,1835 ----
(set rn addr))
)
+ (dnai ldmia-sw-wb "Load multiple registers (postindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (ldmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
***************
*** 1643,1648 ****
--- 1842,1862 ----
(set pc (mem WI addr)))
)
+ (define-pmacro (ldmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+ )
+
+ (define-pmacro (ldmdb-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (sub addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmdb "Load multiple registers (preindex, decrement)"
()
"ldm$cond .."
***************
*** 1668,1673 ****
--- 1882,1912 ----
(multi-action 0 ldmdb-action))
)
+ (dnai ldmdb-sw "Load multiple registers (preindex, decrement, switch)"
+ ()
+ "ldm$cond .."
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action))
+ )
+
(dnai ldmdb-wb "Load multiple registers (preindex, decrement, writeback)"
()
"FIXME"
***************
*** 1694,1705 ****
--- 1933,1978 ----
(set rn addr))
)
+ (dnai ldmdb-sw-wb "Load multiple registers (preindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action)
+ (set rn addr))
+ )
+
(define-pmacro (stmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+ (define-pmacro (stmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+ )
+
(define-pmacro (stmdb-action-r15 ignore)
(sequence ()
(set addr (sub addr 4))
***************
*** 1731,1736 ****
--- 2004,2034 ----
(multi-action 0 stmdb-action))
)
+ (dnai stmdb-sw "Store multiple registers (preindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action))
+ )
+
(dnai stmdb-wb "Store multiple registers (preindex, decrement, writeback)"
()
"FIXME"
***************
*** 1757,1768 ****
--- 2055,2100 ----
(set rn addr))
)
+ (dnai stmdb-sw-wb "Store multiple registers (preindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action)
+ (set rn addr))
+ )
+
(define-pmacro (stmib-action bit-num)
(sequence ()
(set addr (add addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+ (define-pmacro (stmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+ )
+
(define-pmacro (stmib-action-r15 ignore)
(sequence ()
(set addr (add addr 4))
***************
*** 1794,1799 ****
--- 2126,2156 ----
(multi-action 15 stmib-action-r15))
)
+ (dnai stmib-sw "Store multiple registers (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15))
+ )
+
(dnai stmib-wb "Store multiple registers (preindex, increment, writeback)"
()
"FIXME"
***************
*** 1820,1831 ****
--- 2177,2222 ----
(set rn addr))
)
+ (dnai stmib-sw-wb "Store multiple registers (preindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (stmia-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
(set addr (add addr 4)))
)
+ (define-pmacro (stmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (add addr 4)))
+ )
+
(define-pmacro (stmia-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
***************
*** 1857,1862 ****
--- 2248,2278 ----
(multi-action 15 stmia-action-r15))
)
+ (dnai stmia-sw "Store multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15))
+ )
+
(dnai stmia-wb "Store multiple registers (postindex, increment, writeback)"
()
"FIXME"
***************
*** 1883,1894 ****
--- 2299,2344 ----
(set rn addr))
)
+ (dnai stmia-sw-wb "Store multiple registers (postindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (stmda-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
(set addr (sub addr 4)))
)
+ (define-pmacro (stmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (sub addr 4)))
+ )
+
(define-pmacro (stmda-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
***************
*** 1920,1925 ****
--- 2370,2400 ----
(multi-action 0 stmda-action))
)
+ (dnai stmda-sw "Store multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action))
+ )
+
(dnai stmda-wb "Store multiple registers (postindex, decrement, writeback)"
()
"FIXME"
***************
*** 1946,1951 ****
--- 2421,2451 ----
(set rn addr))
)
+ (dnai stmda-sw-wb "Store multiple registers (postindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action)
+ (set rn addr))
+ )
\f
; Coprocessor instructions.
; Currently not implemented, so omit these, such that we take the
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [patch] Additional insn support for ARM7T
2002-08-29 3:24 [patch] Additional insn support for ARM7T Robert Cragie
2002-09-03 4:29 ` Robert Cragie
@ 2002-09-07 7:58 ` Frank Ch. Eigler
1 sibling, 0 replies; 3+ messages in thread
From: Frank Ch. Eigler @ 2002-09-07 7:58 UTC (permalink / raw)
To: Robert Cragie; +Cc: sid, cgen
Hi, Robert -
> Whilst trying to get eCos to run on SID, I realised it was failing due to a
> LDMIA instruction not being emulated in the CPU simulator. Here is a patch
> to complete the combinations of LDM/STM instructions which are missing in
> CGEN for the ARM7. [...]
Thanks for your contribution. I committed it to cgen & sid in your name.
- FChE
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2002-09-07 14:58 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2002-08-29 3:24 [patch] Additional insn support for ARM7T Robert Cragie
2002-09-03 4:29 ` Robert Cragie
2002-09-07 7:58 ` Frank Ch. Eigler
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).