[PATCH 1/2] opcodes: Add non-enum disassembler options

[Tsukasa OI <research_trasio@irq.a4lg.com>]

This is paired with "gdb: Add non-enum disassembler options".

There is a portable mechanism for disassembler options and used on some
architectures:
- ARC
- Arm
- MIPS
- PowerPC
- RISC-V
- S/390

However, it only supports following forms:

- [NAME]
- [NAME]=[ENUM_VALUE]

Valid values for [ENUM_VALUE] must be predefined in
`disasm_option_arg_t.values'. For instance, for -M cpu=[CPU] in ARC
architecture, opcodes/arc-dis.c builds valid CPU model list from
include/elf/arc-cpu.def.

In this commit, it adds following format:

- [NAME]=[ARBITRARY_VALUE] (cannot contain "," though)

This is identified by NULL' value of disasm_option_arg_t.values'
(normally, this is a non-NULL pointer to a NULL-terminated list).

gdb/ChangeLog:

    * gdb/disasm.c (set_disassembler_options): Add support for
    non-enum disassembler options.
    (show_disassembler_options_sfunc): Likewise.

include/ChangeLog:

    * dis-asm.h (disasm_option_arg_t): Update comment of `values'
    to allow non-enum disassembler options.

opcodes/ChangeLog:

    * riscv-dis.c (print_riscv_disassembler_options): Support
    non-enum disassembler options on printing disassembler help.
    * arc-dis.c (print_arc_disassembler_options): Likewise.
    * mips-dis.c (print_mips_disassembler_options): Likewise.
---
 include/dis-asm.h   | 3 ++-
 opcodes/arc-dis.c   | 2 ++
 opcodes/mips-dis.c  | 2 ++
 opcodes/riscv-dis.c | 2 ++
 4 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/dis-asm.h b/include/dis-asm.h
index f1a83dc84e5..4921c040710 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -318,7 +318,8 @@ typedef struct
   /* Option argument name to use in descriptions.  */
   const char *name;
 
-  /* Vector of acceptable option argument values, NULL-terminated.  */
+  /* Vector of acceptable option argument values, NULL-terminated.
+     NULL if any values are accepted.  */
   const char **values;
 } disasm_option_arg_t;
 
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 3490bad4f66..c8dc525f64d 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -1611,6 +1611,8 @@ print_arc_disassembler_options (FILE *stream)
   for (i = 0; args[i].name != NULL; ++i)
     {
       size_t len = 3;
+      if (args[i].values == NULL)
+	continue;
       fprintf (stream, _("\n\
   For the options above, the following values are supported for \"%s\":\n   "),
 	       args[i].name);
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 9db604ffb39..faeebccfc3b 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -2809,6 +2809,8 @@ with the -M switch (multiple options should be separated by commas):\n\n"));
 
   for (i = 0; args[i].name != NULL; i++)
     {
+      if (args[i].values == NULL)
+	continue;
       fprintf (stream, _("\n\
   For the options above, the following values are supported for \"%s\":\n   "),
 	       args[i].name);
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 164fd209dbd..b2debd3dd97 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -1181,6 +1181,8 @@ with the -M switch (multiple options should be separated by commas):\n"));
 
   for (i = 0; args[i].name != NULL; i++)
     {
+      if (args[i].values == NULL)
+	continue;
       fprintf (stream, _("\n\
   For the options above, the following values are supported for \"%s\":\n   "),
 	       args[i].name);
-- 
2.34.1