[PATCH v2 0/2] gdb, opcodes: Add non-enum disassembler options

[Tsukasa OI <research_trasio@irq.a4lg.com>]

Hello,

This is a part of my work: implement `arch' disassembler option in RISC-V.
However, it requires technical changes also affecting opcodes:ARC and MIPS
and GDB.  It will take some time because we have to wait many Binutils
prerequisites but this technical change can be discussed now (due to it
affects both Binutils and GDB).

PATCH v1
    <https://sourceware.org/pipermail/binutils/2022-August/122677.html>
    <https://sourceware.org/pipermail/gdb-patches/2022-August/191611.html>
... is approved as follows:

PATCH 1/2: Binutils changes
    <https://sourceware.org/pipermail/binutils/2022-September/122697.html> (2022-09-01)
PATCH 2/2: GDB changes
    <https://sourceware.org/pipermail/gdb-patches/2022-September/191668.html> (2022-09-02)

The code part of PATCH v2 is unchanged from (approved) PATCH v1 but minor
commit message issues (including excess ChangeLog and quoting) are fixed.

Since I don't have write access yet, it's my preasure to merge the commits
if approved.

Thanks,
Tsukasa




Tsukasa OI (2):
  opcodes: Add non-enum disassembler options
  gdb: Add non-enum disassembler options

 gdb/disasm.c        | 4 ++++
 include/dis-asm.h   | 3 ++-
 opcodes/arc-dis.c   | 2 ++
 opcodes/mips-dis.c  | 2 ++
 opcodes/riscv-dis.c | 2 ++
 5 files changed, 12 insertions(+), 1 deletion(-)


base-commit: 148b68a56c57d69bd97a5f40c34fc4700693596a
-- 
2.34.1