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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Subject: [PATCH 5/5] x86/Intel: allow MASM representation of embedded rounding / SAE
Date: Wed, 4 May 2022 14:01:57 +0200	[thread overview]
Message-ID: <1e099a72-1663-61c2-b582-6fbf9d1f24b7@suse.com> (raw)
In-Reply-To: <26c648e6-d76b-052e-6392-48265a859a7c@suse.com>

[-- Attachment #1: Type: text/plain, Size: 3413 bytes --]

MASM doesn't support the separate operand form; the modifier belongs
after the instruction instead. Accept this form alongside the original
(now legacy) one. Short of having access to a MASM version to actually
check in how far "after the instruction" is a precise statement in their
documentation, allow both that and the SDM mandated form where the
modifier is on the last register operand (with a possible immediate
operand following).

Sadly the split out function, at least for the time being, needs to cast
away constness at some point, as the two callers disagree in this
regard.

Adjust some, but not all of the testcases.
---
Presenting only the non-testsuite changes inline. See attachment for the
full patch.

--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -600,6 +600,7 @@ i386_intel_operand (char *operand_string
   segT exp_seg;
   expressionS exp, *expP;
   char suffix = 0;
+  bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier;
   int ret;
 
   /* Handle vector immediates.  */
@@ -898,7 +899,9 @@ i386_intel_operand (char *operand_string
       i.types[this_operand].bitfield.unspecified = 0;
       ++i.reg_operands;
 
-      if (i.rounding.type != rc_none && temp.bitfield.class != Reg)
+      if ((i.rounding.type != rc_none && !i.rounding.modifier
+	   && temp.bitfield.class != Reg)
+	  || rc_sae_modifier)
 	{
 	  unsigned int j;
 
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -371,6 +371,9 @@ struct _i386_insn
 	  rz,
 	  saeonly
 	} type;
+      /* In Intel syntax the operand modifier form is supposed to be used, but
+	 we continue to accept the immediate forms as well.  */
+      bool modifier;
     } rounding;
 
     /* Broadcasting attributes.
@@ -10624,6 +10627,32 @@ pe_directive_secidx (int dummy ATTRIBUTE
 }
 #endif
 
+/* Handle Rounding Control / SAE specifiers.  */
+
+static char *
+RC_SAE_specifier (const char *pstr)
+{
+  unsigned int j;
+
+  for (j = 0; j < ARRAY_SIZE (RC_NamesTable); j++)
+    {
+      if (!strncmp (pstr, RC_NamesTable[j].name, RC_NamesTable[j].len))
+	{
+	  if (i.rounding.type != rc_none)
+	    {
+	      as_bad (_("duplicated `{%s}'"), RC_NamesTable[j].name);
+	      return NULL;
+	    }
+
+	  i.rounding.type = RC_NamesTable[j].type;
+
+	  return (char *)(pstr + RC_NamesTable[j].len);
+	}
+    }
+
+  return NULL;
+}
+
 /* Handle Vector operations.  */
 
 static char *
@@ -10745,6 +10774,9 @@ check_VecOperations (char *op_string)
 
 	      op_string++;
 	    }
+	  else if (intel_syntax
+		   && (op_string = RC_SAE_specifier (op_string)) != NULL)
+	    i.rounding.modifier = true;
 	  else
 	    goto unknown_vec_op;
 
@@ -11408,32 +11440,13 @@ i386_index_check (const char *operand_st
 static int
 RC_SAE_immediate (const char *imm_start)
 {
-  unsigned int match_found, j;
   const char *pstr = imm_start;
 
   if (*pstr != '{')
     return 0;
 
-  pstr++;
-  match_found = 0;
-  for (j = 0; j < ARRAY_SIZE (RC_NamesTable); j++)
-    {
-      if (!strncmp (pstr, RC_NamesTable[j].name, RC_NamesTable[j].len))
-	{
-	  if (i.rounding.type != rc_none)
-	    {
-	      as_bad (_("duplicated `%s'"), imm_start);
-	      return 0;
-	    }
-
-	  i.rounding.type = RC_NamesTable[j].type;
-
-	  pstr += RC_NamesTable[j].len;
-	  match_found = 1;
-	  break;
-	}
-    }
-  if (!match_found)
+  pstr = RC_SAE_specifier (pstr + 1);
+  if (pstr == NULL)
     return 0;
 
   if (*pstr++ != '}')

[-- Attachment #2: binutils-master-x86-AVX512-SAE-Intel-gas.patch.bz2 --]
[-- Type: application/octet-stream, Size: 24898 bytes --]

  parent reply	other threads:[~2022-05-04 12:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-04 11:44 [PATCH 0/5] x86/Intel: AVX512 syntax enhancements Jan Beulich
2022-05-04 11:57 ` [PATCH 1/5] x86/Intel: adjust representation of embedded broadcast Jan Beulich
2022-05-04 11:58 ` [PATCH 2/5] x86/Intel: allow MASM " Jan Beulich
2022-05-04 11:59 ` [PATCH 3/5] x86/Intel: adjust representation of embedded rounding / SAE Jan Beulich
2022-05-04 12:00 ` [PATCH 4/5] x86: re-work AVX512 " Jan Beulich
2022-05-04 12:01 ` Jan Beulich [this message]
2022-05-10  2:37 ` [PATCH 0/5] x86/Intel: AVX512 syntax enhancements Cui, Lili
2022-05-17 12:00   ` Jan Beulich
2022-05-18  3:15     ` Cui, Lili
2022-05-18  6:40       ` Jan Beulich
2022-05-18 15:07         ` H.J. Lu
2022-05-25  7:44 ` Jan Beulich
2022-05-26 14:48   ` H.J. Lu

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