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From: YunQiang Su <yunqiang.su@cipunited.com>
To: jiaxun.yang@flygoat.com, macro@orcam.me.uk
Cc: binutils@sourceware.org, syq@debian.org, YunQiang Su <ysu@wavecomp.com>
Subject: [PATCH 2/3] MIPS: default output r6 object if configured to r6
Date: Mon,  8 Mar 2021 04:30:15 +0000	[thread overview]
Message-ID: <20210308043016.11511-2-yunqiang.su@cipunited.com> (raw)
In-Reply-To: <20210308043016.11511-1-yunqiang.su@cipunited.com>

From: YunQiang Su <ysu@wavecomp.com>

currently we find 2 usecases with problem:

1. mipsisa32r6el-linux-gnu-ld -r -b binary xx.dat -o xx.o
   the output will be MIPS I, while we expect MIPS32r6.
2. mipsisa32r6el-linux-gnu-as -march=from-abi xx.s
   the output will be MIPS I, while we expect MIPS32r6.

We found this problem when we build glib2.0, which use ld directly
to generate object file from data files.

ChangeLog:
2021-03-08  YunQiang Su  <yunqiang.su@cipunited.com>

	PR MIPS/25494
        * bfd/config.bfd: set mips_default_r6 for mipsisa32/64r6
        * bfd/configure: Regenerate.
        * bfd/configure.ac: Define MIPS_DEFAULT_R6 for MIPSr6
        * bfd/elfxx-mips.c (mips_set_isa_flags):
          set isa flag to R6 if MIPS_DEFAULT_R6
        * gas/config.in: Define MIPS_DEFAULT_R6
        * gas/config/tc-mips.c (macro_build):
        (mips_parse_cpu): set isa flag to R6 if MIPS_DEFAULT_R6
        * gas/configure: Regenerate.
        * gas/configure.ac: Define MIPS_DEFAULT_R6 for MIPSr6
        * ld/testsuite/ld-mips-elf/mips-elf.exp: add New test.
        * ld/testsuite/ld-mips-elf/convert-data-to-obj.dd: New test.
---
 bfd/config.bfd                                |  5 +++++
 bfd/configure                                 |  1 +
 bfd/configure.ac                              |  1 +
 bfd/elfxx-mips.c                              |  6 ++++++
 gas/config.in                                 |  3 +++
 gas/config/tc-mips.c                          | 19 +++++++++++++------
 gas/configure                                 | 13 +++++++++++++
 gas/configure.ac                              | 10 ++++++++++
 .../ld-mips-elf/convert-data-to-obj.dd        |  5 +++++
 ld/testsuite/ld-mips-elf/mips-elf.exp         | 11 +++++++++++
 10 files changed, 68 insertions(+), 6 deletions(-)
 create mode 100644 ld/testsuite/ld-mips-elf/convert-data-to-obj.dd

diff --git a/bfd/config.bfd b/bfd/config.bfd
index 9434fd6c7e..b99e126eee 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1432,6 +1432,11 @@ case "${targ_defvec} ${targ_selvecs}" in
     want64=true
     ;;
 esac
+case "${targ}" in
+  mipsisa32r6* | mipsisa64r6*)
+    mips_default_r6=true
+    ;;
+esac
 
 case "${host64}${want64}" in
   *true*)
diff --git a/bfd/configure b/bfd/configure
index accd39cc59..6817d0f018 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -14697,6 +14697,7 @@ do
 	TDEFINES="$TDEFINES $targ_cflags"
     fi
 done
+test -n "${mips_default_r6}" && TDEFINES="$TDEFINES -DMIPS_DEFAULT_R6=1"
 
 
 # This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/configure.ac b/bfd/configure.ac
index e9a07b8ff0..c0e0d1d682 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -382,6 +382,7 @@ do
 	TDEFINES="$TDEFINES $targ_cflags"
     fi
 done
+test -n "${mips_default_r6}" && TDEFINES="$TDEFINES -DMIPS_DEFAULT_R6=1"
 AC_SUBST(TDEFINES)
 
 # This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 86e15b61ed..00f4745472 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -12220,9 +12220,15 @@ mips_set_isa_flags (bfd *abfd)
     {
     default:
       if (ABI_N32_P (abfd) || ABI_64_P (abfd))
+#ifdef MIPS_DEFAULT_R6
+        val = E_MIPS_ARCH_64R6;
+      else
+        val = E_MIPS_ARCH_32R6;
+#else
         val = E_MIPS_ARCH_3;
       else
         val = E_MIPS_ARCH_1;
+#endif
       break;
 
     case bfd_mach_mips3000:
diff --git a/gas/config.in b/gas/config.in
index bd125047d5..0e4ec1a2ac 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -213,6 +213,9 @@
 /* Choose a default ABI for MIPS targets. */
 #undef MIPS_DEFAULT_ABI
 
+/* Generate code for MIPSr6 by default on MIPS targets. */
+#undef MIPS_DEFAULT_R6
+
 /* Define value for nds32_arch_name */
 #undef NDS32_DEFAULT_ARCH_NAME
 
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 538b69710f..d2b1749e60 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -9081,7 +9081,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
 		      || *r == BFD_RELOC_HI16_S
 		      || *r == BFD_RELOC_LO16
 		      || *r == BFD_RELOC_MIPS_GOT_OFST
-		      || (mips_opts.micromips
+		      || ((mips_opts.micromips || ISA_IS_R6 (mips_opts.isa))
 			  && (*r == BFD_RELOC_16
 			      || *r == BFD_RELOC_MIPS_GOT16
 			      || *r == BFD_RELOC_MIPS_CALL16
@@ -20229,6 +20229,13 @@ static const struct mips_cpu_info *
 mips_parse_cpu (const char *option, const char *cpu_string)
 {
   const struct mips_cpu_info *p;
+#if MIPS_DEFAULT_R6
+  int default_isa32 = ISA_MIPS32R6;
+  int default_isa64 = ISA_MIPS64R6;
+#else
+  int default_isa32 = ISA_MIPS1;
+  int default_isa64 = ISA_MIPS3;
+#endif
 
   /* 'from-abi' selects the most compatible architecture for the given
      ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs.  For the
@@ -20243,18 +20250,18 @@ mips_parse_cpu (const char *option, const char *cpu_string)
   if (strcasecmp (cpu_string, "from-abi") == 0)
     {
       if (ABI_NEEDS_32BIT_REGS (mips_abi))
-	return mips_cpu_info_from_isa (ISA_MIPS1);
+	return mips_cpu_info_from_isa (default_isa32);
 
       if (ABI_NEEDS_64BIT_REGS (mips_abi))
-	return mips_cpu_info_from_isa (ISA_MIPS3);
+	return mips_cpu_info_from_isa (default_isa64);
 
       if (file_mips_opts.gp >= 0)
 	return mips_cpu_info_from_isa (file_mips_opts.gp == 32
-				       ? ISA_MIPS1 : ISA_MIPS3);
+				       ? default_isa32 : default_isa64);
 
       return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
-				     ? ISA_MIPS3
-				     : ISA_MIPS1);
+				     ? default_isa64
+				     : default_isa32);
     }
 
   /* 'default' has traditionally been a no-op.  Probably not very useful.  */
diff --git a/gas/configure b/gas/configure
index 5965f2bc24..7c66b76469 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12850,6 +12850,14 @@ _ACEOF
 	    mips_default_abi=NO_ABI
 	    ;;
 	esac
+	case ${target} in
+	  mipsisa32r6* | mipsisa64r6*)
+	    mips_default_r6=1
+	    ;;
+	  *)
+	    mips_default_r6=0
+	    ;;
+	esac
 
 cat >>confdefs.h <<_ACEOF
 #define MIPS_CPU_STRING_DEFAULT "$mips_cpu"
@@ -12870,6 +12878,11 @@ cat >>confdefs.h <<_ACEOF
 #define MIPS_DEFAULT_ABI $mips_default_abi
 _ACEOF
 
+
+cat >>confdefs.h <<_ACEOF
+#define MIPS_DEFAULT_R6 $mips_default_r6
+_ACEOF
+
 	;;
     esac
 
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a96bb70d7..a279feca23 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -398,6 +398,14 @@ changequote([,])dnl
 	    mips_default_abi=NO_ABI
 	    ;;
 	esac
+	case ${target} in
+	  mipsisa32r6* | mipsisa64r6*)
+	    mips_default_r6=1
+	    ;;
+	  *)
+	    mips_default_r6=0
+	    ;;
+	esac
 	AC_DEFINE_UNQUOTED(MIPS_CPU_STRING_DEFAULT, "$mips_cpu",
 			   [Default CPU for MIPS targets. ])
 	AC_DEFINE_UNQUOTED(USE_E_MIPS_ABI_O32, $use_e_mips_abi_o32,
@@ -406,6 +414,8 @@ changequote([,])dnl
 			   [Generate 64-bit code by default on MIPS targets. ])
 	AC_DEFINE_UNQUOTED(MIPS_DEFAULT_ABI, $mips_default_abi,
 			   [Choose a default ABI for MIPS targets. ])
+	AC_DEFINE_UNQUOTED(MIPS_DEFAULT_R6, $mips_default_r6,
+			   [Choose default ISA as r6 by default. ])
 	;;
     esac
 
diff --git a/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd b/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd
new file mode 100644
index 0000000000..03cfe9f80c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd
@@ -0,0 +1,5 @@
+
+.*: +file format .*mips.*
+architecture: mips:isa..r6, flags 0x000.*:
+HAS_SYMS.*
+start address 0x.*
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index 958eac261e..1eb9dd271f 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -137,6 +137,7 @@ set has_abi(eabi) [expr [istarget *-*-elf] \
 set irix [expr [istarget *-*-irix*]]
 set linux_gnu [expr [istarget mips*-*-linux*]]
 set embedded_elf [expr [istarget mips*-*-elf]]
+set is_r6 [expr [istarget mipsisa*r6*-*]]
 
 # Set defaults.
 set abi_asflags(o32) ""
@@ -766,6 +767,16 @@ if {$linux_gnu} {
     run_ld_link_tests $eh_frame5_test
 }
 
+if {$is_r6} {
+    run_ld_link_tests {
+	{"Convert data to object (MIPSr6)"
+	 "-r -b binary config.log tmpdir/config.log.o" ""
+	 "" {}
+	 {{objdump -f convert-data-to-obj.dd}}
+	 "config.log.o"}
+    }
+}
+
 if {$embedded_elf} {
     run_dump_test "compact-eh1"
     run_dump_test "compact-eh2"
-- 
2.20.1


  reply	other threads:[~2021-03-08  4:30 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08  4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08  4:30 ` YunQiang Su [this message]
2023-02-23 11:11   ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2023-03-30 16:53     ` Richard Sandiford
2023-04-03 11:06     ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
2023-04-03 12:40       ` Richard Sandiford
2023-04-10  7:01         ` YunQiang Su
2023-04-14  7:20       ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
2023-04-18 13:07         ` Richard Sandiford
2023-04-18 14:00         ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-18 14:00           ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:03             ` Richard Sandiford
2023-04-20 13:31             ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-20 13:31               ` [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:00           ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
2023-07-21 10:00             ` Maciej W. Rozycki
2023-07-21 10:14               ` YunQiang Su
2023-07-21 11:54                 ` Maciej W. Rozycki
2023-07-21 12:30                   ` YunQiang Su
2023-07-21 14:30                     ` Maciej W. Rozycki
2023-07-21 15:01                       ` YunQiang Su
2023-07-22  7:18                         ` Xi Ruoyao
2023-07-25 13:30                           ` Nick Clifton
2023-07-25 14:00                             ` YunQiang Su
2023-07-25 16:03                             ` Maciej W. Rozycki
2023-07-31 10:05                         ` Maciej W. Rozycki
2023-07-31 10:32                           ` YunQiang Su
2023-08-01 22:52                             ` Maciej W. Rozycki
2023-07-25 17:47                       ` Andreas K. Huettel
2023-07-28  5:42                         ` YunQiang Su
2023-07-25 17:41                     ` Andreas K. Huettel
2021-03-08  4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
2021-03-19  5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su

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