From: YunQiang Su <yunqiang.su@cipunited.com>
To: binutils@sourceware.org
Cc: syq@debian.org, macro@orcam.me.uk, xry111@xry111.site,
richard.sandiford@arm.com, jiaxun.yang@flygoat.com,
YunQiang Su <yunqiang.su@cipunited.com>
Subject: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
Date: Tue, 18 Apr 2023 22:00:18 +0800 [thread overview]
Message-ID: <20230418140019.2195551-1-yunqiang.su@cipunited.com> (raw)
In-Reply-To: <20230414072046.1639896-1-yunqiang.su@cipunited.com>
For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
---
bfd/config.bfd | 14 ++++++++++++--
.../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
gas/configure | 5 ++++-
gas/configure.ac | 5 ++++-
gold/configure.tgt | 14 ++++++++++++++
ld/configure.tgt | 12 ++++++++++--
6 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7af481048db..1e4bea191dd 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -941,11 +941,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/configure b/gas/configure
index b56836998ef..868f4a911a9 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12223,7 +12223,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..03728ffce4d 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -392,7 +392,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 34c9d67c365..4a71f679e29 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
next prev parent reply other threads:[~2023-04-18 14:00 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
2023-02-23 11:11 ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2023-03-30 16:53 ` Richard Sandiford
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
2023-04-03 12:40 ` Richard Sandiford
2023-04-10 7:01 ` YunQiang Su
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
2023-04-18 13:07 ` Richard Sandiford
2023-04-18 14:00 ` YunQiang Su [this message]
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:03 ` Richard Sandiford
2023-04-20 13:31 ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-20 13:31 ` [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
2023-07-21 10:00 ` Maciej W. Rozycki
2023-07-21 10:14 ` YunQiang Su
2023-07-21 11:54 ` Maciej W. Rozycki
2023-07-21 12:30 ` YunQiang Su
2023-07-21 14:30 ` Maciej W. Rozycki
2023-07-21 15:01 ` YunQiang Su
2023-07-22 7:18 ` Xi Ruoyao
2023-07-25 13:30 ` Nick Clifton
2023-07-25 14:00 ` YunQiang Su
2023-07-25 16:03 ` Maciej W. Rozycki
2023-07-31 10:05 ` Maciej W. Rozycki
2023-07-31 10:32 ` YunQiang Su
2023-08-01 22:52 ` Maciej W. Rozycki
2023-07-25 17:47 ` Andreas K. Huettel
2023-07-28 5:42 ` YunQiang Su
2023-07-25 17:41 ` Andreas K. Huettel
2021-03-08 4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
2021-03-19 5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su
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