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From: Richard Sandiford <richard.sandiford@arm.com>
To: YunQiang Su <yunqiang.su@cipunited.com>
Cc: binutils@sourceware.org,  syq@debian.org,  macro@orcam.me.uk,
	 xry111@xry111.site,  jiaxun.yang@flygoat.com
Subject: Re: [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6
Date: Wed, 19 Apr 2023 20:03:41 +0100	[thread overview]
Message-ID: <mptfs8velte.fsf@arm.com> (raw)
In-Reply-To: <20230418140019.2195551-2-yunqiang.su@cipunited.com> (YunQiang Su's message of "Tue, 18 Apr 2023 22:00:19 +0800")

YunQiang Su <yunqiang.su@cipunited.com> writes:
> If the triple is mipsisa32r6* or mipsisa64r6*, ld/as should output
> r6 objects by default.
> The triples with vendor `img` should do same.
>
> The examples include:
> 	as xx.s -o xx.o
> 	ld -r -b binary xx.dat -o xx.o
> ---
>  bfd/config.bfd   | 6 ++++++
>  bfd/elfxx-mips.c | 6 ++++++
>  gas/configure    | 9 +++++++++
>  gas/configure.ac | 9 +++++++++
>  4 files changed, 30 insertions(+)
>
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 1e4bea191dd..78752994456 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -1535,3 +1535,9 @@ case "${targ_defvec} ${targ_selvecs}" in
>      targ_archs="$targ_archs bfd_iamcu_arch"
>      ;;
>  esac
> +
> +case "${targ}" in
> +  mipsisa32r6* | mipsisa64r6* | mips*-img-*)
> +    targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
> +    ;;
> +esac
> diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> index 13a89953293..0b0ea11bfb5 100644
> --- a/bfd/elfxx-mips.c
> +++ b/bfd/elfxx-mips.c
> @@ -12327,9 +12327,15 @@ mips_set_isa_flags (bfd *abfd)
>      {
>      default:
>        if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> +#ifdef MIPS_DEFAULT_R6
> +        val = E_MIPS_ARCH_64R6;
> +      else
> +        val = E_MIPS_ARCH_32R6;
> +#else
>          val = E_MIPS_ARCH_3;
>        else
>          val = E_MIPS_ARCH_1;
> +#endif
>        break;

IMO it'd be better to stick:

#ifndef MIPS_DEFAULT_R6
#define MIPS_DEFAULT_R6 0
#endif

after the #includes and use:

  val = MIPS_DEFAULT_R6 ? E_MIPS_ARCH_64R6 : E_MIPS_ARCH_3;

etc.  OK with that change, thanks.

Richard

>      case bfd_mach_mips3000:
> diff --git a/gas/configure b/gas/configure
> index 868f4a911a9..0daa80d5b4c 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12211,6 +12211,15 @@ _ACEOF
>  	    use_e_mips_abi_o32=1
>  	    ;;
>  	esac
> +	# If Vendor is IMG, then MIPSr6 is used
> +	case ${target} in
> +	  mips*64*-img-*)
> +	    mips_cpu=mips64r6
> +	    ;;
> +	  mips*-img-*)
> +	    mips_cpu=mips32r6
> +	    ;;
> +	esac
>  	# Decide whether to generate 32-bit or 64-bit code by default.
>  	# Used to resolve -march=from-abi when an embedded ABI is selected.
>  	case ${target} in
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 03728ffce4d..2b91f9ec616 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -380,6 +380,15 @@ changequote([,])dnl
>  	    use_e_mips_abi_o32=1
>  	    ;;
>  	esac
> +	# If Vendor is IMG, then MIPSr6 is used
> +	case ${target} in
> +	  mips*64*-img-*)
> +	    mips_cpu=mips64r6
> +	    ;;
> +	  mips*-img-*)
> +	    mips_cpu=mips32r6
> +	    ;;
> +	esac
>  	# Decide whether to generate 32-bit or 64-bit code by default.
>  	# Used to resolve -march=from-abi when an embedded ABI is selected.
>  	case ${target} in

  reply	other threads:[~2023-04-19 19:03 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08  4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08  4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
2023-02-23 11:11   ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2023-03-30 16:53     ` Richard Sandiford
2023-04-03 11:06     ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
2023-04-03 12:40       ` Richard Sandiford
2023-04-10  7:01         ` YunQiang Su
2023-04-14  7:20       ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
2023-04-18 13:07         ` Richard Sandiford
2023-04-18 14:00         ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-18 14:00           ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:03             ` Richard Sandiford [this message]
2023-04-20 13:31             ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-20 13:31               ` [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:00           ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
2023-07-21 10:00             ` Maciej W. Rozycki
2023-07-21 10:14               ` YunQiang Su
2023-07-21 11:54                 ` Maciej W. Rozycki
2023-07-21 12:30                   ` YunQiang Su
2023-07-21 14:30                     ` Maciej W. Rozycki
2023-07-21 15:01                       ` YunQiang Su
2023-07-22  7:18                         ` Xi Ruoyao
2023-07-25 13:30                           ` Nick Clifton
2023-07-25 14:00                             ` YunQiang Su
2023-07-25 16:03                             ` Maciej W. Rozycki
2023-07-31 10:05                         ` Maciej W. Rozycki
2023-07-31 10:32                           ` YunQiang Su
2023-08-01 22:52                             ` Maciej W. Rozycki
2023-07-25 17:47                       ` Andreas K. Huettel
2023-07-28  5:42                         ` YunQiang Su
2023-07-25 17:41                     ` Andreas K. Huettel
2021-03-08  4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
2021-03-19  5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su

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