* [PATCH 1/2] Revert "PR28824, relro security issues, x86 keep COMMONPAGESIZE relro"
@ 2022-02-15 1:10 H.J. Lu
2022-02-15 1:10 ` [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2022-02-15 1:10 UTC (permalink / raw)
To: binutils
This reverts commit 31b4d3a16f200bf04db8439a63b72bba7af4e1be.
---
ld/emultempl/elf-x86.em | 1 -
ld/ld.h | 4 ----
ld/ldexp.c | 5 +----
ld/testsuite/ld-x86-64/pr18176.d | 1 -
4 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/ld/emultempl/elf-x86.em b/ld/emultempl/elf-x86.em
index 134e4e1b616..f75521cecea 100644
--- a/ld/emultempl/elf-x86.em
+++ b/ld/emultempl/elf-x86.em
@@ -33,7 +33,6 @@ static struct elf_linker_x86_params params;
static void
elf_x86_create_output_section_statements (void)
{
- config.relro_use_commonpagesize = true;
_bfd_elf_linker_x86_set_options (&link_info, ¶ms);
}
diff --git a/ld/ld.h b/ld/ld.h
index c7e4ca3d334..f3086bf30de 100644
--- a/ld/ld.h
+++ b/ld/ld.h
@@ -276,10 +276,6 @@ typedef struct
/* If set, code and non-code sections should never be in one segment. */
bool separate_code;
- /* TRUE if the end of the relro segment should be aligned to
- COMMONPAGESIZE rather than MAXPAGESIZE. */
- bool relro_use_commonpagesize;
-
/* The rpath separation character. Usually ':'. */
char rpath_separator;
diff --git a/ld/ldexp.c b/ld/ldexp.c
index 90760e0a8ca..c18b8284ca5 100644
--- a/ld/ldexp.c
+++ b/ld/ldexp.c
@@ -485,10 +485,7 @@ fold_segment_align (etree_value_type *lhs)
seg->base = expld.result.value;
seg->commonpagesize = commonpage;
seg->maxpagesize = maxpage;
- if (config.relro_use_commonpagesize)
- seg->relropagesize = commonpage;
- else
- seg->relropagesize = maxpage;
+ seg->relropagesize = maxpage;
seg->relro_end = 0;
}
else
diff --git a/ld/testsuite/ld-x86-64/pr18176.d b/ld/testsuite/ld-x86-64/pr18176.d
index 728c15a3dd8..a99ff15ac6b 100644
--- a/ld/testsuite/ld-x86-64/pr18176.d
+++ b/ld/testsuite/ld-x86-64/pr18176.d
@@ -3,7 +3,6 @@
#ld: -melf_x86_64 -shared -z relro -T pr18176.t -z max-page-size=0x200000 -z common-page-size=0x1000 $NO_DT_RELR_LDFLAGS
#readelf: -l --wide
#target: x86_64-*-linux*
-#xfail: *-*-*
#...
GNU_RELRO 0x04bd17 0x000000000024bd17 0x000000000024bd17 0x0022e9 0x0022e9 R 0x1
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment
2022-02-15 1:10 [PATCH 1/2] Revert "PR28824, relro security issues, x86 keep COMMONPAGESIZE relro" H.J. Lu
@ 2022-02-15 1:10 ` H.J. Lu
2022-02-15 14:08 ` Michael Matz
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2022-02-15 1:10 UTC (permalink / raw)
To: binutils
Adjust x86-64 linker tests after reverting
commit 31b4d3a16f200bf04db8439a63b72bba7af4e1be
Author: Alan Modra <amodra@gmail.com>
Date: Thu Feb 3 08:57:47 2022 +1030
PR28824, relro security issues, x86 keep COMMONPAGESIZE relro
to use MAXPAGESIZE for the end of the relro segment alignment, like other
ELF targets.
* testsuite/ld-x86-64/plt-main-bnd.dd: Updated.
* testsuite/ld-x86-64/plt-main-ibt-x32.dd: Likewise.
* testsuite/ld-x86-64/plt-main-ibt.dd: Likewise.
* testsuite/ld-x86-64/pr14207.d: Likewise.
* testsuite/ld-x86-64/pr18176.d: Likewise.
* testsuite/ld-x86-64/pr20830a-now.d: Likewise.
* testsuite/ld-x86-64/pr20830a.d: Likewise.
* testsuite/ld-x86-64/pr20830b-now.d: Likewise.
* testsuite/ld-x86-64/pr20830b.d: Likewise.
* testsuite/ld-x86-64/pr21038a-now.d: Likewise.
* testsuite/ld-x86-64/pr21038a.d: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.
---
ld/testsuite/ld-x86-64/plt-main-bnd.dd | 2 +-
ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd | 2 +-
ld/testsuite/ld-x86-64/plt-main-ibt.dd | 2 +-
ld/testsuite/ld-x86-64/pr14207.d | 6 +++---
ld/testsuite/ld-x86-64/pr18176.d | 2 +-
ld/testsuite/ld-x86-64/pr20830a-now.d | 10 +++++-----
ld/testsuite/ld-x86-64/pr20830a.d | 10 +++++-----
ld/testsuite/ld-x86-64/pr20830b-now.d | 12 ++++++------
ld/testsuite/ld-x86-64/pr20830b.d | 12 ++++++------
ld/testsuite/ld-x86-64/pr21038a-now.d | 10 +++++-----
ld/testsuite/ld-x86-64/pr21038a.d | 10 +++++-----
ld/testsuite/ld-x86-64/pr21038b-now.d | 8 ++++----
ld/testsuite/ld-x86-64/pr21038b.d | 8 ++++----
ld/testsuite/ld-x86-64/pr21038c-now.d | 12 ++++++------
ld/testsuite/ld-x86-64/pr21038c.d | 12 ++++++------
15 files changed, 59 insertions(+), 59 deletions(-)
diff --git a/ld/testsuite/ld-x86-64/plt-main-bnd.dd b/ld/testsuite/ld-x86-64/plt-main-bnd.dd
index 70b8d545344..571ef77f477 100644
--- a/ld/testsuite/ld-x86-64/plt-main-bnd.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-bnd.dd
@@ -2,6 +2,6 @@
Disassembly of section .plt.got:
[a-f0-9]+ <[a-z_]+@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmp \*0x20....\(%rip\) # ...... <.*>
+[ ]*[a-f0-9]+: f2 ff 25 .. .. 3f 00 bnd jmp \*0x3f....\(%rip\) # ...... <.*>
[ ]*[a-f0-9]+: 90 nop
#pass
diff --git a/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd b/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd
index 84e1d17370b..54b55288095 100644
--- a/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd
@@ -3,5 +3,5 @@ Disassembly of section .plt.got:
[a-f0-9]+ <[_a-z]+@plt>:
[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
-[ ]*[a-f0-9]+: ff 25 .. .. 20 00 jmp +\*0x20....\(%rip\) # ...... <.*>
+[ ]*[a-f0-9]+: ff 25 .. .. 3f 00 jmp +\*0x3f....\(%rip\) # ...... <.*>
#pass
diff --git a/ld/testsuite/ld-x86-64/plt-main-ibt.dd b/ld/testsuite/ld-x86-64/plt-main-ibt.dd
index 3c9c6584933..6cdce13f274 100644
--- a/ld/testsuite/ld-x86-64/plt-main-ibt.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-ibt.dd
@@ -3,5 +3,5 @@ Disassembly of section .plt.got:
[a-f0-9]+ <[_a-z]+@plt>:
[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmp \*0x20....\(%rip\) # ...... <.*>
+[ ]*[a-f0-9]+: f2 ff 25 .. .. 3f 00 bnd jmp \*0x3f....\(%rip\) # ...... <.*>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr14207.d b/ld/testsuite/ld-x86-64/pr14207.d
index e3af36146c6..c718c77e1d1 100644
--- a/ld/testsuite/ld-x86-64/pr14207.d
+++ b/ld/testsuite/ld-x86-64/pr14207.d
@@ -11,9 +11,9 @@ There are 4 program headers, starting at offset 64
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000150 0x000150 R 0x200000
- LOAD 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x000c.8 RW 0x200000
- DYNAMIC 0x000b.0 0x0000000000200b.0 0x0000000000200b.0 0x0001.0 0x0001.0 RW 0x8
- GNU_RELRO 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x0004.8 R 0x1
+ LOAD 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x000c.8 RW 0x200000
+ DYNAMIC 0x1ffb.0 0x00000000003ffb.0 0x00000000003ffb.0 0x0001.0 0x0001.0 RW 0x8
+ GNU_RELRO 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x0004.8 R 0x1
Section to Segment mapping:
Segment Sections...
diff --git a/ld/testsuite/ld-x86-64/pr18176.d b/ld/testsuite/ld-x86-64/pr18176.d
index a99ff15ac6b..b1b3251f98c 100644
--- a/ld/testsuite/ld-x86-64/pr18176.d
+++ b/ld/testsuite/ld-x86-64/pr18176.d
@@ -5,5 +5,5 @@
#target: x86_64-*-linux*
#...
- GNU_RELRO 0x04bd17 0x000000000024bd17 0x000000000024bd17 0x0022e9 0x0022e9 R 0x1
+ GNU_RELRO 0x1fdd17 0x00000000003fdd17 0x00000000003fdd17 0x0022e9 0x0022e9 R 0x1
#pass
diff --git a/ld/testsuite/ld-x86-64/pr20830a-now.d b/ld/testsuite/ld-x86-64/pr20830a-now.d
index 44a2593acd1..28f595f1c83 100644
--- a/ld/testsuite/ld-x86-64/pr20830a-now.d
+++ b/ld/testsuite/ld-x86-64/pr20830a-now.d
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00 push 0x200e32\(%rip\) # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 34 0e 20 00 jmp \*0x200e34\(%rip\) # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 fe 3f 00 push 0x3ffe32\(%rip\) # 3fffe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 34 fe 3f 00 jmp \*0x3ffe34\(%rip\) # 3ffff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
Disassembly of section .plt.got:
0+1c0 <func@plt>:
- +[a-f0-9]+: ff 25 32 0e 20 00 jmp \*0x200e32\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: ff 25 32 fe 3f 00 jmp \*0x3ffe32\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .text:
0+1c8 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 1c0 <func@plt>
- +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov 0x200e24\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 24 fe 3f 00 mov 0x3ffe24\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr20830a.d b/ld/testsuite/ld-x86-64/pr20830a.d
index 4ea0596fab0..2c47a51b19d 100644
--- a/ld/testsuite/ld-x86-64/pr20830a.d
+++ b/ld/testsuite/ld-x86-64/pr20830a.d
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00 push 0x200e52\(%rip\) # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 54 0e 20 00 jmp \*0x200e54\(%rip\) # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 fe 3f 00 push 0x3ffe52\(%rip\) # 400008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 54 fe 3f 00 jmp \*0x3ffe54\(%rip\) # 400010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
Disassembly of section .plt.got:
0+1c0 <func@plt>:
- +[a-f0-9]+: ff 25 32 0e 20 00 jmp \*0x200e32\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: ff 25 32 fe 3f 00 jmp \*0x3ffe32\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .text:
0+1c8 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 1c0 <func@plt>
- +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov 0x200e24\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 24 fe 3f 00 mov 0x3ffe24\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr20830b-now.d b/ld/testsuite/ld-x86-64/pr20830b-now.d
index 6a4f2c1a48f..2cad0234853 100644
--- a/ld/testsuite/ld-x86-64/pr20830b-now.d
+++ b/ld/testsuite/ld-x86-64/pr20830b-now.d
@@ -1,4 +1,4 @@
-#name: PR ld/20830 (.plt.got, -z now)
+#name: PR ld/20830 (.plt.got, -z now) (x32)
#source: pr20830.s
#as: --x32
#ld: -z now -melf32_x86_64 -shared -z relro --ld-generated-unwind-info --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -42,19 +42,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+120 <.plt>:
- +[a-f0-9]+: ff 35 c2 0e 20 00 push 0x200ec2\(%rip\) # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 c4 0e 20 00 jmp \*0x200ec4\(%rip\) # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 c2 fe 3f 00 push 0x3ffec2\(%rip\) # 3fffe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 c4 fe 3f 00 jmp \*0x3ffec4\(%rip\) # 3ffff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
Disassembly of section .plt.got:
0+130 <func@plt>:
- +[a-f0-9]+: ff 25 c2 0e 20 00 jmp \*0x200ec2\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: ff 25 c2 fe 3f 00 jmp \*0x3ffec2\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .text:
0+138 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 130 <func@plt>
- +[a-f0-9]+: 48 8b 05 b4 0e 20 00 mov 0x200eb4\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 b4 fe 3f 00 mov 0x3ffeb4\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr20830b.d b/ld/testsuite/ld-x86-64/pr20830b.d
index 6487eb85945..047adc17460 100644
--- a/ld/testsuite/ld-x86-64/pr20830b.d
+++ b/ld/testsuite/ld-x86-64/pr20830b.d
@@ -1,4 +1,4 @@
-#name: PR ld/20830 (.plt.got)
+#name: PR ld/20830 (.plt.got) (x32)
#source: pr20830.s
#as: --x32
#ld: -melf32_x86_64 -shared -z relro --ld-generated-unwind-info --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -42,19 +42,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+120 <.plt>:
- +[a-f0-9]+: ff 35 e2 0e 20 00 push 0x200ee2\(%rip\) # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 e4 0e 20 00 jmp \*0x200ee4\(%rip\) # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 e2 fe 3f 00 push 0x3ffee2\(%rip\) # 400008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 e4 fe 3f 00 jmp \*0x3ffee4\(%rip\) # 400010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
Disassembly of section .plt.got:
0+130 <func@plt>:
- +[a-f0-9]+: ff 25 c2 0e 20 00 jmp \*0x200ec2\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: ff 25 c2 fe 3f 00 jmp \*0x3ffec2\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .text:
0+138 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 130 <func@plt>
- +[a-f0-9]+: 48 8b 05 b4 0e 20 00 mov 0x200eb4\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 b4 fe 3f 00 mov 0x3ffeb4\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr21038a-now.d b/ld/testsuite/ld-x86-64/pr21038a-now.d
index 51e26578a1a..1fae617cb2e 100644
--- a/ld/testsuite/ld-x86-64/pr21038a-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038a-now.d
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00 push 0x200e32\(%rip\) # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmp \*0x200e33\(%rip\) # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 fe 3f 00 push 0x3ffe32\(%rip\) # 3fffe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 33 fe 3f 00 bnd jmp \*0x3ffe33\(%rip\) # 3ffff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
Disassembly of section .plt.got:
0+1c0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmp \*0x200e31\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 31 fe 3f 00 bnd jmp \*0x3ffe31\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
0+1c8 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 1c0 <func@plt>
- +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov 0x200e24\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 24 fe 3f 00 mov 0x3ffe24\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr21038a.d b/ld/testsuite/ld-x86-64/pr21038a.d
index 0ea7e8ed5b6..070d37e5bcc 100644
--- a/ld/testsuite/ld-x86-64/pr21038a.d
+++ b/ld/testsuite/ld-x86-64/pr21038a.d
@@ -7,6 +7,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -14,7 +15,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -49,19 +49,19 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00 push 0x200e52\(%rip\) # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmp \*0x200e53\(%rip\) # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 fe 3f 00 push 0x3ffe52\(%rip\) # 400008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 53 fe 3f 00 bnd jmp \*0x3ffe53\(%rip\) # 400010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
Disassembly of section .plt.got:
0+1c0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmp \*0x200e31\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 31 fe 3f 00 bnd jmp \*0x3ffe31\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
0+1c8 <foo>:
+[a-f0-9]+: e8 f3 ff ff ff call 1c0 <func@plt>
- +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov 0x200e24\(%rip\),%rax # 200ff8 <func>
+ +[a-f0-9]+: 48 8b 05 24 fe 3f 00 mov 0x3ffe24\(%rip\),%rax # 3ffff8 <func>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr21038b-now.d b/ld/testsuite/ld-x86-64/pr21038b-now.d
index 1b760f200db..72e5109f5db 100644
--- a/ld/testsuite/ld-x86-64/pr21038b-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038b-now.d
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -50,8 +50,8 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00 push 0x200e32\(%rip\) # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmp \*0x200e33\(%rip\) # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 fe 3f 00 push 0x3ffe32\(%rip\) # 3fffe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 33 fe 3f 00 bnd jmp \*0x3ffe33\(%rip\) # 3ffff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmp 1b0 <func@plt-0x20>
@@ -60,7 +60,7 @@ Disassembly of section .plt:
Disassembly of section .plt.sec:
0+1d0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 21 0e 20 00 bnd jmp \*0x200e21\(%rip\) # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 21 fe 3f 00 bnd jmp \*0x3ffe21\(%rip\) # 3ffff8 <func>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
diff --git a/ld/testsuite/ld-x86-64/pr21038b.d b/ld/testsuite/ld-x86-64/pr21038b.d
index 144ed44cccf..d6a9567364d 100644
--- a/ld/testsuite/ld-x86-64/pr21038b.d
+++ b/ld/testsuite/ld-x86-64/pr21038b.d
@@ -7,6 +7,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -14,7 +15,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -49,8 +49,8 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00 push 0x200e52\(%rip\) # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmp \*0x200e53\(%rip\) # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 fe 3f 00 push 0x3ffe52\(%rip\) # 400008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 53 fe 3f 00 bnd jmp \*0x3ffe53\(%rip\) # 400010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmp 1b0 <func@plt-0x20>
@@ -59,7 +59,7 @@ Disassembly of section .plt:
Disassembly of section .plt.sec:
0+1d0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 41 0e 20 00 bnd jmp \*0x200e41\(%rip\) # 201018 <func>
+ +[a-f0-9]+: f2 ff 25 41 fe 3f 00 bnd jmp \*0x3ffe41\(%rip\) # 400018 <func>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
diff --git a/ld/testsuite/ld-x86-64/pr21038c-now.d b/ld/testsuite/ld-x86-64/pr21038c-now.d
index bca7ccdc55b..cda1c446c2d 100644
--- a/ld/testsuite/ld-x86-64/pr21038c-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038c-now.d
@@ -8,6 +8,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -15,7 +16,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -59,8 +59,8 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 ea 0d 20 00 push 0x200dea\(%rip\) # 200fe0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 eb 0d 20 00 bnd jmp \*0x200deb\(%rip\) # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ea fd 3f 00 push 0x3ffdea\(%rip\) # 3fffe0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 eb fd 3f 00 bnd jmp \*0x3ffdeb\(%rip\) # 3fffe8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmp 1f0 <func1@plt-0x20>
@@ -69,13 +69,13 @@ Disassembly of section .plt:
Disassembly of section .plt.got:
0+210 <func1@plt>:
- +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmp \*0x200de1\(%rip\) # 200ff8 <func1>
+ +[a-f0-9]+: f2 ff 25 e1 fd 3f 00 bnd jmp \*0x3ffde1\(%rip\) # 3ffff8 <func1>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
0+218 <func2@plt>:
- +[a-f0-9]+: f2 ff 25 d1 0d 20 00 bnd jmp \*0x200dd1\(%rip\) # 200ff0 <func2>
+ +[a-f0-9]+: f2 ff 25 d1 fd 3f 00 bnd jmp \*0x3ffdd1\(%rip\) # 3ffff0 <func2>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
@@ -83,5 +83,5 @@ Disassembly of section .text:
0+220 <foo>:
+[a-f0-9]+: e8 eb ff ff ff call 210 <func1@plt>
+[a-f0-9]+: e8 ee ff ff ff call 218 <func2@plt>
- +[a-f0-9]+: 48 8b 05 c7 0d 20 00 mov 0x200dc7\(%rip\),%rax # 200ff8 <func1>
+ +[a-f0-9]+: 48 8b 05 c7 fd 3f 00 mov 0x3ffdc7\(%rip\),%rax # 3ffff8 <func1>
#pass
diff --git a/ld/testsuite/ld-x86-64/pr21038c.d b/ld/testsuite/ld-x86-64/pr21038c.d
index f5d9727aa66..6784d336a53 100644
--- a/ld/testsuite/ld-x86-64/pr21038c.d
+++ b/ld/testsuite/ld-x86-64/pr21038c.d
@@ -7,6 +7,7 @@
Contents of the .eh_frame section:
+
0+ 0000000000000014 00000000 CIE
Version: 1
Augmentation: "zR"
@@ -14,7 +15,6 @@ Contents of the .eh_frame section:
Data alignment factor: -8
Return address column: 16
Augmentation data: 1b
-
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
@@ -58,8 +58,8 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 12 0e 20 00 push 0x200e12\(%rip\) # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 13 0e 20 00 bnd jmp \*0x200e13\(%rip\) # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 12 fe 3f 00 push 0x3ffe12\(%rip\) # 400008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 13 fe 3f 00 bnd jmp \*0x3ffe13\(%rip\) # 400010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmp 1f0 <func1@plt-0x20>
@@ -68,13 +68,13 @@ Disassembly of section .plt:
Disassembly of section .plt.got:
0+210 <func1@plt>:
- +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmp \*0x200de1\(%rip\) # 200ff8 <func1>
+ +[a-f0-9]+: f2 ff 25 e1 fd 3f 00 bnd jmp \*0x3ffde1\(%rip\) # 3ffff8 <func1>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
0+218 <func2@plt>:
- +[a-f0-9]+: f2 ff 25 f9 0d 20 00 bnd jmp \*0x200df9\(%rip\) # 201018 <func2>
+ +[a-f0-9]+: f2 ff 25 f9 fd 3f 00 bnd jmp \*0x3ffdf9\(%rip\) # 400018 <func2>
+[a-f0-9]+: 90 nop
Disassembly of section .text:
@@ -82,5 +82,5 @@ Disassembly of section .text:
0+220 <foo>:
+[a-f0-9]+: e8 eb ff ff ff call 210 <func1@plt>
+[a-f0-9]+: e8 ee ff ff ff call 218 <func2@plt>
- +[a-f0-9]+: 48 8b 05 c7 0d 20 00 mov 0x200dc7\(%rip\),%rax # 200ff8 <func1>
+ +[a-f0-9]+: 48 8b 05 c7 fd 3f 00 mov 0x3ffdc7\(%rip\),%rax # 3ffff8 <func1>
#pass
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment
2022-02-15 1:10 ` [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment H.J. Lu
@ 2022-02-15 14:08 ` Michael Matz
2022-02-15 14:41 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Michael Matz @ 2022-02-15 14:08 UTC (permalink / raw)
To: H.J. Lu; +Cc: binutils
Hello,
On Mon, 14 Feb 2022, H.J. Lu via Binutils wrote:
> Adjust x86-64 linker tests after reverting
>
> commit 31b4d3a16f200bf04db8439a63b72bba7af4e1be
> Author: Alan Modra <amodra@gmail.com>
> Date: Thu Feb 3 08:57:47 2022 +1030
>
> PR28824, relro security issues, x86 keep COMMONPAGESIZE relro
>
> to use MAXPAGESIZE for the end of the relro segment alignment, like other
> ELF targets.
>
> --- a/ld/testsuite/ld-x86-64/pr14207.d
> +++ b/ld/testsuite/ld-x86-64/pr14207.d
> @@ -11,9 +11,9 @@ There are 4 program headers, starting at offset 64
> Program Headers:
> Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
> LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000150 0x000150 R 0x200000
> - LOAD 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x000c.8 RW 0x200000
> - DYNAMIC 0x000b.0 0x0000000000200b.0 0x0000000000200b.0 0x0001.0 0x0001.0 RW 0x8
> - GNU_RELRO 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x0004.8 R 0x1
> + LOAD 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x000c.8 RW 0x200000
> + DYNAMIC 0x1ffb.0 0x00000000003ffb.0 0x00000000003ffb.0 0x0001.0 0x0001.0 RW 0x8
> + GNU_RELRO 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x0004.8 R 0x1
This change implies that the filesize increased by 2MB (and I verified
this to be the case). I don't think that's a good trade-off. E.g. I have
about 3500 binaries in /usr/bin/ alone. That linker change translates to
an overall increase of 7 Gigabytes filesize. Right now all the files
therein are about 1GB.
So, please!
Ciao,
Michael.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment
2022-02-15 14:08 ` Michael Matz
@ 2022-02-15 14:41 ` H.J. Lu
2022-02-15 14:57 ` Michael Matz
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2022-02-15 14:41 UTC (permalink / raw)
To: Michael Matz; +Cc: Binutils
On Tue, Feb 15, 2022 at 6:08 AM Michael Matz <matz@suse.de> wrote:
>
> Hello,
>
> On Mon, 14 Feb 2022, H.J. Lu via Binutils wrote:
>
> > Adjust x86-64 linker tests after reverting
> >
> > commit 31b4d3a16f200bf04db8439a63b72bba7af4e1be
> > Author: Alan Modra <amodra@gmail.com>
> > Date: Thu Feb 3 08:57:47 2022 +1030
> >
> > PR28824, relro security issues, x86 keep COMMONPAGESIZE relro
> >
> > to use MAXPAGESIZE for the end of the relro segment alignment, like other
> > ELF targets.
> >
> > --- a/ld/testsuite/ld-x86-64/pr14207.d
> > +++ b/ld/testsuite/ld-x86-64/pr14207.d
> > @@ -11,9 +11,9 @@ There are 4 program headers, starting at offset 64
> > Program Headers:
> > Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
> > LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000150 0x000150 R 0x200000
> > - LOAD 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x000c.8 RW 0x200000
> > - DYNAMIC 0x000b.0 0x0000000000200b.0 0x0000000000200b.0 0x0001.0 0x0001.0 RW 0x8
> > - GNU_RELRO 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x0004.8 R 0x1
> > + LOAD 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x000c.8 RW 0x200000
> > + DYNAMIC 0x1ffb.0 0x00000000003ffb.0 0x00000000003ffb.0 0x0001.0 0x0001.0 RW 0x8
> > + GNU_RELRO 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x0004.8 R 0x1
>
> This change implies that the filesize increased by 2MB (and I verified
> this to be the case). I don't think that's a good trade-off. E.g. I have
> about 3500 binaries in /usr/bin/ alone. That linker change translates to
> an overall increase of 7 Gigabytes filesize. Right now all the files
> therein are about 1GB.
>
> So, please!
Do they use 2MB pages?
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment
2022-02-15 14:41 ` H.J. Lu
@ 2022-02-15 14:57 ` Michael Matz
0 siblings, 0 replies; 5+ messages in thread
From: Michael Matz @ 2022-02-15 14:57 UTC (permalink / raw)
To: H.J. Lu; +Cc: Binutils
Hello,
On Tue, 15 Feb 2022, H.J. Lu wrote:
> > > Adjust x86-64 linker tests after reverting
> > >
> > > commit 31b4d3a16f200bf04db8439a63b72bba7af4e1be
> > > Author: Alan Modra <amodra@gmail.com>
> > > Date: Thu Feb 3 08:57:47 2022 +1030
> > >
> > > PR28824, relro security issues, x86 keep COMMONPAGESIZE relro
> > >
> > > to use MAXPAGESIZE for the end of the relro segment alignment, like other
> > > ELF targets.
> > >
> > > --- a/ld/testsuite/ld-x86-64/pr14207.d
> > > +++ b/ld/testsuite/ld-x86-64/pr14207.d
> > > @@ -11,9 +11,9 @@ There are 4 program headers, starting at offset 64
> > > Program Headers:
> > > Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
> > > LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000150 0x000150 R 0x200000
> > > - LOAD 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x000c.8 RW 0x200000
> > > - DYNAMIC 0x000b.0 0x0000000000200b.0 0x0000000000200b.0 0x0001.0 0x0001.0 RW 0x8
> > > - GNU_RELRO 0x000b.8 0x0000000000200b.8 0x0000000000200b.8 0x0004.0 0x0004.8 R 0x1
> > > + LOAD 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x000c.8 RW 0x200000
> > > + DYNAMIC 0x1ffb.0 0x00000000003ffb.0 0x00000000003ffb.0 0x0001.0 0x0001.0 RW 0x8
> > > + GNU_RELRO 0x1ffb.8 0x00000000003ffb.8 0x00000000003ffb.8 0x0004.0 0x0004.8 R 0x1
> >
> > This change implies that the filesize increased by 2MB (and I verified
> > this to be the case). I don't think that's a good trade-off. E.g. I have
> > about 3500 binaries in /usr/bin/ alone. That linker change translates to
> > an overall increase of 7 Gigabytes filesize. Right now all the files
> > therein are about 1GB.
> >
> > So, please!
>
> Do they use 2MB pages?
I missed the explicit '-z max-page-size=0x200000' in those tests link
command and verified that not using it still generates small executables.
Sorry for the noise, by default everything should be just fine.
Ciao,
Michael.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-02-15 14:57 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-15 1:10 [PATCH 1/2] Revert "PR28824, relro security issues, x86 keep COMMONPAGESIZE relro" H.J. Lu
2022-02-15 1:10 ` [PATCH 2/2] x86-64: Use MAXPAGESIZE for the relro segment alignment H.J. Lu
2022-02-15 14:08 ` Michael Matz
2022-02-15 14:41 ` H.J. Lu
2022-02-15 14:57 ` Michael Matz
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