From: Richard Sandiford <richard.sandiford@arm.com>
To: binutils@sourceware.org
Cc: Richard Sandiford <richard.sandiford@arm.com>
Subject: [PATCH 16/31] aarch64: Add the SME2 dot-product instructions
Date: Thu, 30 Mar 2023 11:26:31 +0100 [thread overview]
Message-ID: <20230330102646.3327818-17-richard.sandiford@arm.com> (raw)
In-Reply-To: <20230330102646.3327818-1-richard.sandiford@arm.com>
BFDOT, FDOT and USDOT share the same instruction format.
SDOT and UDOT share a different format. SUDOT does not
have the multi vector x multi vector forms, since they
would be redundant with USDOT.
---
gas/testsuite/gas/aarch64/sme2-15-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-15-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-15-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-noarch.l | 187 ++
gas/testsuite/gas/aarch64/sme2-15.d | 195 ++
gas/testsuite/gas/aarch64/sme2-15.s | 203 ++
gas/testsuite/gas/aarch64/sme2-16-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-16-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-16-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-noarch.l | 249 ++
gas/testsuite/gas/aarch64/sme2-16.d | 257 +++
gas/testsuite/gas/aarch64/sme2-16.s | 271 +++
gas/testsuite/gas/aarch64/sme2-17-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-17-invalid.s | 12 +
gas/testsuite/gas/aarch64/sme2-17-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-noarch.l | 45 +
gas/testsuite/gas/aarch64/sme2-17.d | 53 +
gas/testsuite/gas/aarch64/sme2-17.s | 47 +
.../gas/aarch64/sme2-i16i64-3-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-3-invalid.l | 19 +
.../gas/aarch64/sme2-i16i64-3-invalid.s | 12 +
.../gas/aarch64/sme2-i16i64-3-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-3-noarch.l | 125 +
gas/testsuite/gas/aarch64/sme2-i16i64-3.d | 133 ++
gas/testsuite/gas/aarch64/sme2-i16i64-3.s | 135 ++
opcodes/aarch64-dis-2.c | 2056 +++++++++++------
opcodes/aarch64-tbl.h | 50 +
30 files changed, 3708 insertions(+), 753 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-15.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-16.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-17.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.s
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.d b/gas/testsuite/gas/aarch64/sme2-15-invalid.d
new file mode 100644
index 00000000000..9a101349326
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-15-invalid.s
+#error_output: sme2-15-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.l b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
new file mode 100644
index 00000000000..54fd066712c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
@@ -0,0 +1,97 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `bfdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.s b/gas/testsuite/gas/aarch64/sme2-15-invalid.s
new file mode 100644
index 00000000000..1deb7ca25a1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.s
@@ -0,0 +1,87 @@
+ bfdot 0, { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], 0, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ bfdot za.h[w8, 0], z0.h, z0.h
+ bfdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+ bfdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+ bfdot za.s[w7, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w12, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, -1], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 8], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z1.h - z4.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z2.h - z5.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z3.h - z6.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[4]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z16.h[0]
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h[0]
+ bfdot za[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0 - z1 }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0[0]
+ bfdot za.h[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.h[w8, 0], { z0.s - z1.s }, z0.s[0]
+
+ bfdot za.s[w8, 0], { z0.h - z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z4.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h, z1.h, z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h, z1.h, z5.h }, z0.h
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h
+ bfdot za[w8, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z0 - z1 }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0
+ bfdot za[w8, 0], { z0.h - z1.h }, z0
+
+ bfdot za.s[w7, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w12, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, -1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 8], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z1.h - z2.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z15.h - z16.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z31.h, z0.h }
+
+ bfdot za.s[w7, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w12, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, -1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 8], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z1.h - z4.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z2.h - z5.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z3.h - z6.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z15.h - z18.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ bfdot za.s[w8, 0], { z0.h - z2.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z2.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z4.h }
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+
+ bfdot za.s[w8, 0:0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:2], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 1:0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, foo:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 1:foo], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, foo:bar], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.d b/gas/testsuite/gas/aarch64/sme2-15-noarch.d
new file mode 100644
index 00000000000..93ef8842b4c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-15.s
+#error_output: sme2-15-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.l b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
new file mode 100644
index 00000000000..70bfb962091
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
@@ -0,0 +1,187 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15.d b/gas/testsuite/gas/aarch64/sme2-15.d
new file mode 100644
index 00000000000..9f60f9ded69
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15.d
@@ -0,0 +1,195 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507018 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150101f bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013d8 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c18 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55da bfdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f018 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150901f bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509398 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f9018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1509c18 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[3\]
+[^:]+: c15ab899 bfdot za\.s\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[2\]
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1207010 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201017 bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c12013d0 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c12013f0 bfdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12013f0 bfdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f1010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12932b3 bfdot za\.s\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1307010 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301017 bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301390 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c13013d0 bfdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013d0 bfdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013f0 bfdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13013f0 bfdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f1010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1335235 bfdot za\.s\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a07010 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01017 bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a013d0 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be1010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b252d1 bfdot za\.s\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a17010 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11017 bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11390 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd1010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b97213 bfdot za\.s\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507008 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150100f fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013c8 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c08 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55ca fdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f008 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150900f fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509388 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f9008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1509c08 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[3\]
+[^:]+: c15ab889 fdot za\.s\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[2\]
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1207000 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201007 fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c12013c0 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c12013e0 fdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12013e0 fdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f1000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12932a3 fdot za\.s\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1307000 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301007 fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301380 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c13013c0 fdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013c0 fdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013e0 fdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13013e0 fdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f1000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1335225 fdot za\.s\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a07000 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01007 fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a013c0 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be1000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b252c1 fdot za\.s\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a17000 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11007 fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11380 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd1000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b97203 fdot za\.s\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1507028 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c150102f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c15013e8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f1028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1501c28 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[3\]
+[^:]+: c15d55ea usdot za\.s\[w10, 2, vgx2\], {z14\.b-z15\.b}, z13\.b\[1\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150f028 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150902f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15093a8 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c28 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8a9 usdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207408 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c120140f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017c8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017e8 usdot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017e8 usdot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936ab usdot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307408 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c130140f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301788 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017c8 usdot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017c8 usdot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017e8 usdot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13017e8 usdot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f1408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c133562d usdot za\.s\[w10, 5, vgx4\], {z17\.b-z20\.b}, z3\.b
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a07408 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a0140f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a017c8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be1408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b256c9 usdot za\.s\[w10, 1, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a17408 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a1140f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11788 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd1408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b9760b usdot za\.s\[w11, 3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-15.s b/gas/testsuite/gas/aarch64/sme2-15.s
new file mode 100644
index 00000000000..aa13cddffb8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15.s
@@ -0,0 +1,203 @@
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ bfdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ bfdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ bfdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ bfdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ bfdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ bfdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ fdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ fdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ fdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ fdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ fdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ fdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ fdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ fdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ fdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ fdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ fdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ fdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ fdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ fdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ fdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ fdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ fdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ usdot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ usdot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ usdot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ usdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ usdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ usdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ usdot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ usdot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ usdot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ usdot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ usdot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ usdot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ usdot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ usdot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ usdot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ usdot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ usdot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ usdot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ usdot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ usdot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ usdot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ usdot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.d b/gas/testsuite/gas/aarch64/sme2-16-invalid.d
new file mode 100644
index 00000000000..76f36982780
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-16-invalid.s
+#error_output: sme2-16-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.l b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
new file mode 100644
index 00000000000..44e0f1a69fb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
@@ -0,0 +1,97 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `sdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.s b/gas/testsuite/gas/aarch64/sme2-16-invalid.s
new file mode 100644
index 00000000000..52e7209a8a8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.s
@@ -0,0 +1,87 @@
+ sdot 0, { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], 0, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ sdot za.h[w8, 0], z0.h, z0.h
+ sdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+ sdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ sdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+ sdot za.s[w7, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w12, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, -1], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 8], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0], { z1.h - z4.h }, z0.h[0]
+ sdot za.s[w8, 0], { z2.h - z5.h }, z0.h[0]
+ sdot za.s[w8, 0], { z3.h - z6.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[4]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z16.h[0]
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h[0]
+ sdot za[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0 - z1 }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0[0]
+ sdot za.h[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.h[w8, 0], { z0.s - z1.s }, z0.s[0]
+
+ sdot za.s[w8, 0], { z0.h - z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z4.h }, z0.h
+ sdot za.s[w8, 0], { z0.h, z1.h, z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h, z1.h, z5.h }, z0.h
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h
+ sdot za[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z0 - z1 }, z0.h
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0
+ sdot za[w8, 0], { z0.h - z1.h }, z0
+
+ sdot za.s[w7, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w12, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, -1], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 8], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z1.h - z2.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z15.h - z16.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z31.h, z0.h }
+
+ sdot za.s[w7, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w12, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, -1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 8], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z1.h - z4.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z2.h - z5.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z3.h - z6.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z15.h - z18.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ sdot za.s[w8, 0], { z0.h - z2.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z2.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z4.h }
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+
+ sdot za.s[w8, 0:0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:2], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 1:0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, foo:1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 1:foo], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, foo:bar], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.d b/gas/testsuite/gas/aarch64/sme2-16-noarch.d
new file mode 100644
index 00000000000..af9a97ebbee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-16.s
+#error_output: sme2-16-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.l b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
new file mode 100644
index 00000000000..bebc1cca2bc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
@@ -0,0 +1,249 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16.d b/gas/testsuite/gas/aarch64/sme2-16.d
new file mode 100644
index 00000000000..4bf9270fe2b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16.d
@@ -0,0 +1,257 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507000 sdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501007 sdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013c0 sdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c00 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55c2 sdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f000 sdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
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+[^:]+: c1501c30 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[3\]
+[^:]+: c15d55f2 udot za\.s\[w10, 2, vgx2\], {z14\.b-z15\.b}, z13\.b\[1\]
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+[^:]+: c1509030 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509030 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509030 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150f030 udot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
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+[^:]+: c15093b0 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9030 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c30 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8b1 udot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207410 udot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201417 udot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017d0 udot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017f0 udot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017f0 udot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936b3 udot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307410 udot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301417 udot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301790 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017d0 udot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017d0 udot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
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+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
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+[^:]+: c1a11410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
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+[^:]+: c1a11417 udot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11790 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd1410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b97613 udot za\.s\[w11, 3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-16.s b/gas/testsuite/gas/aarch64/sme2-16.s
new file mode 100644
index 00000000000..b47e1d308f3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16.s
@@ -0,0 +1,271 @@
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ sdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ sdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ sdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ sdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ sdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ sdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ sdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ sdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ sdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ sdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ sdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ sdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ sdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ sdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ sdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ sdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ sdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ sdot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ sdot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ sdot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ sdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ sdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ sdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ sdot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ sdot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ sdot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ sdot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ sdot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ sdot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ sdot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sdot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ sdot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ sdot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ sdot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ sdot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ sdot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ sdot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ sdot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ sdot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ udot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ udot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ udot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ udot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ udot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ udot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ udot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ udot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ udot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ udot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ udot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ udot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ udot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ udot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ udot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ udot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ udot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ udot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ udot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ udot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ udot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ udot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ udot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ udot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ udot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ udot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ udot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ udot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ udot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ udot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ udot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ udot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ udot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ udot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ udot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ udot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ udot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ udot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ udot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ udot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ udot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ udot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ udot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ udot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ udot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ udot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ udot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ udot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ udot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ udot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ udot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ udot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.d b/gas/testsuite/gas/aarch64/sme2-17-invalid.d
new file mode 100644
index 00000000000..8713e800cb3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-17-invalid.s
+#error_output: sme2-17-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.l b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
new file mode 100644
index 00000000000..b1f59231a8e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
@@ -0,0 +1,20 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sudot za\.s\[w8,0\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.s b/gas/testsuite/gas/aarch64/sme2-17-invalid.s
new file mode 100644
index 00000000000..50c3dbe01ef
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.s
@@ -0,0 +1,12 @@
+ sudot 0, { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0], 0, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, 0
+
+ sudot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sudot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sudot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ sudot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ sudot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sudot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sudot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sudot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.d b/gas/testsuite/gas/aarch64/sme2-17-noarch.d
new file mode 100644
index 00000000000..266cde1a638
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-17.s
+#error_output: sme2-17-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.l b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
new file mode 100644
index 00000000000..f3f2f53574e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
@@ -0,0 +1,45 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
diff --git a/gas/testsuite/gas/aarch64/sme2-17.d b/gas/testsuite/gas/aarch64/sme2-17.d
new file mode 100644
index 00000000000..7866240a75a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17.d
@@ -0,0 +1,53 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1507038 sudot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c150103f sudot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c15013f8 sudot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f1038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1501c38 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[3\]
+[^:]+: c15d55fa sudot za\.s\[w10, 2, vgx2\], {z14\.b-z15\.b}, z13\.b\[1\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150f038 sudot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150903f sudot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15093b8 sudot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c38 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8b9 sudot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207418 sudot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c120141f sudot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017d8 sudot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017f8 sudot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017f8 sudot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936bb sudot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307418 sudot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c130141f sudot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301798 sudot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017d8 sudot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017d8 sudot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017f8 sudot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13017f8 sudot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f1418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c133563d sudot za\.s\[w10, 5, vgx4\], {z17\.b-z20\.b}, z3\.b
diff --git a/gas/testsuite/gas/aarch64/sme2-17.s b/gas/testsuite/gas/aarch64/sme2-17.s
new file mode 100644
index 00000000000..a6fb1664645
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17.s
@@ -0,0 +1,47 @@
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ SUDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ SUDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ sudot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ sudot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SUDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SUDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ sudot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ sudot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ SUDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ SUDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ sudot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ sudot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ sudot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ sudot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ sudot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ SUDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ SUDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ sudot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ sudot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sudot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ sudot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ sudot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ sudot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ sudot za.s[w10, 5], { z17.b - z20.b }, z3.b
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
new file mode 100644
index 00000000000..fb1b90b6023
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-3-invalid.s
+#error_output: sme2-i16i64-3-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
new file mode 100644
index 00000000000..dfbb8f97982
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
@@ -0,0 +1,19 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
new file mode 100644
index 00000000000..20dd22f47e1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
@@ -0,0 +1,12 @@
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[2]
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[2]
+
+ sudot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sudot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sudot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ sudot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ sudot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sudot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
new file mode 100644
index 00000000000..66d062e6290
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-3.s
+#error_output: sme2-i16i64-3-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
new file mode 100644
index 00000000000..432d1943481
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
@@ -0,0 +1,125 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3.d
new file mode 100644
index 00000000000..c7f6129fc1c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3.d
@@ -0,0 +1,133 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d06008 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0000f sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d003c8 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df0008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d00408 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[1\]
+[^:]+: c1dd45ca sdot za\.d\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e008 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0800f sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08388 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08408 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daa489 sdot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1607400 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601407 sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16017c0 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16017e0 sdot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16017e0 sdot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f1400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16936a3 sdot za\.d\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1707400 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701407 sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701780 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17017c0 sdot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017c0 sdot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017e0 sdot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17017e0 sdot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f1400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1735625 sdot za\.d\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e07400 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01407 sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e017c0 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe1400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f256c1 sdot za\.d\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e17400 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11407 sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11780 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd1400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f97603 sdot za\.d\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d06018 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0001f udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d003d8 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df0018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d00418 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[1\]
+[^:]+: c1dd45da udot za\.d\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e018 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0801f udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08398 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08418 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daa099 udot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[0\]
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1607410 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601417 udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16017d0 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16017f0 udot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16017f0 udot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f1410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16936b3 udot za\.d\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1707410 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701417 udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701790 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17017d0 udot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017d0 udot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017f0 udot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17017f0 udot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f1410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1735635 udot za\.d\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e07410 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01417 udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e017d0 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe1410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f256d1 udot za\.d\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e17410 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11417 udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11790 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd1410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f97613 udot za\.d\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3.s b/gas/testsuite/gas/aarch64/sme2-i16i64-3.s
new file mode 100644
index 00000000000..bb08d744579
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3.s
@@ -0,0 +1,135 @@
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ sdot za.d[w11, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 7], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 0], { z30.h - z31.h }, z0.h[0]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z15.h[0]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[1]
+ sdot za.d[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ sdot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ sdot za.d[w9, 1], { z4.h - z7.h }, z10.h[1]
+
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ sdot za.d[w11, 0], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 7], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 0], { z30.h - z31.h }, z0.h
+ sdot za.d[w8, 0], { z31.h, z0.h }, z0.h
+ sdot za.d[w8, 0], { z31.h - z0.h }, z0.h
+ sdot za.d[w8, 0], { z0.h - z1.h }, z15.h
+ sdot za.d[w9, 3], { z21.h - z22.h }, z9.h
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ sdot za.d[w11, 0], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 7], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 0], { z28.h - z31.h }, z0.h
+ sdot za.d[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ sdot za.d[w8, 0], { z30.h - z1.h }, z0.h
+ sdot za.d[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ sdot za.d[w8, 0], { z31.h - z2.h }, z0.h
+ sdot za.d[w8, 0], { z0.h - z3.h }, z15.h
+ sdot za.d[w10, 5], { z17.h - z20.h }, z3.h
+
+ sdot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ sdot za.d[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ sdot za.d[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ sdot za.d[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ sdot za.d[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ udot za.d[w11, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 7], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 0], { z30.h - z31.h }, z0.h[0]
+ udot za.d[w8, 0], { z0.h - z1.h }, z15.h[0]
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h[1]
+ udot za.d[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ udot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ udot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ udot za.d[w9, 1], { z4.h - z7.h }, z10.h[0]
+
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ udot za.d[w11, 0], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 7], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 0], { z30.h - z31.h }, z0.h
+ udot za.d[w8, 0], { z31.h, z0.h }, z0.h
+ udot za.d[w8, 0], { z31.h - z0.h }, z0.h
+ udot za.d[w8, 0], { z0.h - z1.h }, z15.h
+ udot za.d[w9, 3], { z21.h - z22.h }, z9.h
+
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ udot za.d[w11, 0], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 7], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 0], { z28.h - z31.h }, z0.h
+ udot za.d[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ udot za.d[w8, 0], { z30.h - z1.h }, z0.h
+ udot za.d[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ udot za.d[w8, 0], { z31.h - z2.h }, z0.h
+ udot za.d[w8, 0], { z0.h - z3.h }, z15.h
+ udot za.d[w10, 5], { z17.h - z20.h }, z3.h
+
+ udot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ udot za.d[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ udot za.d[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ udot za.d[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ udot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ udot za.d[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ udot za.d[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ udot za.d[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 72da86865eb..c631e1cd59b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2779;
+ return 2825;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2571;
+ return 2583;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2570;
+ return 2582;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2569;
+ return 2581;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2578;
+ return 2590;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2574;
+ return 2586;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2568;
+ return 2580;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2567;
+ return 2579;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2589;
+ return 2601;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2588;
+ return 2600;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2566;
+ return 2578;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2576;
+ return 2588;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2572;
+ return 2584;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2579;
+ return 2591;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2575;
+ return 2587;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2577;
+ return 2589;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2573;
+ return 2585;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2505;
+ return 2517;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2506;
+ return 2518;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2529;
+ return 2541;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2530;
+ return 2542;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2521;
+ return 2533;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2522;
+ return 2534;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2513;
+ return 2525;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2514;
+ return 2526;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2537;
+ return 2549;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2538;
+ return 2550;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2561;
+ return 2573;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2562;
+ return 2574;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2553;
+ return 2565;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2554;
+ return 2566;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2545;
+ return 2557;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2546;
+ return 2558;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2501;
+ return 2513;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2502;
+ return 2514;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2525;
+ return 2537;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2526;
+ return 2538;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2517;
+ return 2529;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2518;
+ return 2530;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2509;
+ return 2521;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2510;
+ return 2522;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2533;
+ return 2545;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2534;
+ return 2546;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2557;
+ return 2569;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2558;
+ return 2570;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2549;
+ return 2561;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2550;
+ return 2562;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2541;
+ return 2553;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2542;
+ return 2554;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2647;
+ return 2671;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2648;
+ return 2672;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2671;
+ return 2695;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2672;
+ return 2696;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2663;
+ return 2687;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2664;
+ return 2688;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2655;
+ return 2679;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2656;
+ return 2680;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2679;
+ return 2703;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2680;
+ return 2704;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2703;
+ return 2727;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2704;
+ return 2728;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2695;
+ return 2719;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2696;
+ return 2720;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2687;
+ return 2711;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2688;
+ return 2712;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2643;
+ return 2667;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2644;
+ return 2668;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2667;
+ return 2691;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2668;
+ return 2692;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2659;
+ return 2683;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2660;
+ return 2684;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2651;
+ return 2675;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2652;
+ return 2676;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2675;
+ return 2699;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2676;
+ return 2700;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2699;
+ return 2723;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2700;
+ return 2724;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2691;
+ return 2715;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2692;
+ return 2716;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2683;
+ return 2707;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2684;
+ return 2708;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2611;
+ return 2635;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2763;
+ return 2809;
}
}
else
@@ -1295,7 +1295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2612;
+ return 2636;
}
else
{
@@ -1303,7 +1303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2613;
+ return 2637;
}
}
else
@@ -1314,7 +1314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2764;
+ return 2810;
}
else
{
@@ -1322,7 +1322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2765;
+ return 2811;
}
}
}
@@ -1337,7 +1337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2735;
+ return 2775;
}
else
{
@@ -1345,7 +1345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2714;
+ return 2742;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2736;
+ return 2776;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2737;
+ return 2777;
}
}
else
@@ -1377,7 +1377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2715;
+ return 2743;
}
else
{
@@ -1385,7 +1385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2716;
+ return 2744;
}
}
}
@@ -1401,7 +1401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2627;
+ return 2651;
}
else
{
@@ -1411,7 +1411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2628;
+ return 2652;
}
else
{
@@ -1419,7 +1419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2629;
+ return 2653;
}
}
}
@@ -1431,7 +1431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2751;
+ return 2791;
}
else
{
@@ -1441,7 +1441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2752;
+ return 2792;
}
else
{
@@ -1449,7 +1449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2753;
+ return 2793;
}
}
}
@@ -1471,7 +1471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2507;
+ return 2519;
}
else
{
@@ -1479,7 +1479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2531;
+ return 2543;
}
}
else
@@ -1490,7 +1490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2523;
+ return 2535;
}
else
{
@@ -1498,7 +1498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2515;
+ return 2527;
}
}
}
@@ -1512,7 +1512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2539;
+ return 2551;
}
else
{
@@ -1520,7 +1520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2563;
+ return 2575;
}
}
else
@@ -1531,7 +1531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2555;
+ return 2567;
}
else
{
@@ -1539,7 +1539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2547;
+ return 2559;
}
}
}
@@ -1567,7 +1567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2508;
+ return 2520;
}
else
{
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2565;
+ return 2577;
}
}
else
@@ -1584,7 +1584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2532;
+ return 2544;
}
}
else
@@ -1595,7 +1595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2524;
+ return 2536;
}
else
{
@@ -1603,7 +1603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2516;
+ return 2528;
}
}
}
@@ -1617,7 +1617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2540;
+ return 2552;
}
else
{
@@ -1625,7 +1625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2564;
+ return 2576;
}
}
else
@@ -1636,7 +1636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2556;
+ return 2568;
}
else
{
@@ -1644,7 +1644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2548;
+ return 2560;
}
}
}
@@ -1677,7 +1677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2780;
+ return 2828;
}
else
{
@@ -1687,7 +1687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2781;
+ return 2829;
}
else
{
@@ -1695,7 +1695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2782;
+ return 2830;
}
}
}
@@ -1707,7 +1707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2477;
+ return 2489;
}
else
{
@@ -1717,7 +1717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2478;
+ return 2490;
}
else
{
@@ -1725,7 +1725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2479;
+ return 2491;
}
}
}
@@ -1762,7 +1762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2786;
+ return 2836;
}
else
{
@@ -1772,7 +1772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2787;
+ return 2837;
}
else
{
@@ -1780,7 +1780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2788;
+ return 2838;
}
}
}
@@ -1792,7 +1792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2436;
+ return 2442;
}
else
{
@@ -1802,7 +1802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2437;
+ return 2443;
}
else
{
@@ -1810,7 +1810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2438;
+ return 2444;
}
}
}
@@ -1838,7 +1838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2783;
+ return 2831;
}
else
{
@@ -1848,7 +1848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2784;
+ return 2832;
}
else
{
@@ -1856,7 +1856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2785;
+ return 2833;
}
}
}
@@ -1868,7 +1868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2491;
+ return 2503;
}
else
{
@@ -1878,7 +1878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2492;
+ return 2504;
}
else
{
@@ -1886,7 +1886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2493;
+ return 2505;
}
}
}
@@ -1901,7 +1901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2789;
+ return 2839;
}
else
{
@@ -1911,7 +1911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2790;
+ return 2840;
}
else
{
@@ -1919,7 +1919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2791;
+ return 2841;
}
}
}
@@ -1931,7 +1931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2444;
+ return 2450;
}
else
{
@@ -1941,7 +1941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2445;
+ return 2451;
}
else
{
@@ -1949,7 +1949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2446;
+ return 2452;
}
}
}
@@ -1975,7 +1975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2503;
+ return 2515;
}
else
{
@@ -1983,7 +1983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2527;
+ return 2539;
}
}
else
@@ -1994,7 +1994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2519;
+ return 2531;
}
else
{
@@ -2002,7 +2002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2511;
+ return 2523;
}
}
}
@@ -2010,19 +2010,63 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxxx00xxx
- fmla. */
- return 2471;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx000xxx
+ fmla. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx000xxx
+ sdot. */
+ return 2605;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx100xxx
+ sdot. */
+ return 2611;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxxx10xxx
- fmls. */
- return 2485;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx010xxx
+ fmls. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx010xxx
+ udot. */
+ return 2747;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx110xxx
+ udot. */
+ return 2753;
+ }
}
}
}
@@ -2038,7 +2082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2504;
+ return 2516;
}
else
{
@@ -2046,7 +2090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2528;
+ return 2540;
}
}
else
@@ -2057,7 +2101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2520;
+ return 2532;
}
else
{
@@ -2065,7 +2109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2512;
+ return 2524;
}
}
}
@@ -2073,104 +2117,236 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxxx00xxx
- fmla. */
- return 2472;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx000xxx
+ fmla. */
+ return 2484;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx000xxx
+ sdot. */
+ return 2606;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx100xxx
+ sdot. */
+ return 2612;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxxx10xxx
- fmls. */
- return 2486;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx010xxx
+ fmls. */
+ return 2498;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx010xxx
+ udot. */
+ return 2748;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx110xxx
+ udot. */
+ return 2754;
+ }
}
}
}
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx000xxxxxxxxx1xxx
- ldnt1b. */
- return 2535;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2547;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2571;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx100xxxxxxxxx1xxx
- ldnt1b. */
- return 2536;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2563;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2555;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx010xxxxxxxxx1xxx
- ldnt1w. */
- return 2559;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx001xxx
+ fdot. */
+ return 2461;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx101xxx
+ usdot. */
+ return 2803;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx110xxxxxxxxx1xxx
- ldnt1w. */
- return 2560;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx011xxx
+ bfdot. */
+ return 2436;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx111xxx
+ sudot. */
+ return 2738;
+ }
}
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx001xxxxxxxxx1xxx
- ldnt1h. */
- return 2551;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2548;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2572;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx101xxxxxxxxx1xxx
- ldnt1h. */
- return 2552;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2564;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2556;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx011xxxxxxxxx1xxx
- ldnt1d. */
- return 2543;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx001xxx
+ fdot. */
+ return 2462;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx101xxx
+ usdot. */
+ return 2804;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx111xxxxxxxxx1xxx
- ldnt1d. */
- return 2544;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx011xxx
+ bfdot. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx111xxx
+ sudot. */
+ return 2739;
+ }
}
}
}
@@ -2192,7 +2368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2792;
+ return 2842;
}
else
{
@@ -2200,7 +2376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2793;
+ return 2843;
}
}
else
@@ -2211,7 +2387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2603;
+ return 2627;
}
else
{
@@ -2221,7 +2397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2604;
+ return 2628;
}
else
{
@@ -2229,38 +2405,60 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2605;
+ return 2629;
}
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000011100xxxxxxxxxxxxxxx01xxx
- smlsl. */
- return 2619;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000011101xxxx0xxxxxxxxxx01xxx
- smlsl. */
- return 2620;
+ xx000001110xxxxx0xx0xxxxxxx01xxx
+ sdot. */
+ return 2826;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000011101xxxx1xxxxxxxxxx01xxx
+ xx000001110xxxxx1xx0xxxxxxx01xxx
+ sdot. */
+ return 2827;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2621;
+ return 2643;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx01xxx
+ smlsl. */
+ return 2644;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx01xxx
+ smlsl. */
+ return 2645;
+ }
}
}
}
@@ -2299,7 +2497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2794;
+ return 2844;
}
else
{
@@ -2307,7 +2505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2795;
+ return 2845;
}
}
else
@@ -2318,7 +2516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2727;
+ return 2767;
}
else
{
@@ -2328,7 +2526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2728;
+ return 2768;
}
else
{
@@ -2336,7 +2534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2729;
+ return 2769;
}
}
}
@@ -2352,31 +2550,53 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011100xxxxxxxxxxxxxxx11xxx
- umlsl. */
- return 2743;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011101xxxx0xxxxxxxxxx11xxx
- umlsl. */
- return 2744;
+ xxx00001110xxxxx0xx0xxxxxxx11xxx
+ udot. */
+ return 2834;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011101xxxx1xxxxxxxxxx11xxx
+ xxx00001110xxxxx1xx0xxxxxxx11xxx
+ udot. */
+ return 2835;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2745;
+ return 2783;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx0xx1xxxxxxx11xxx
+ umlsl. */
+ return 2784;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx1xx1xxxxxxx11xxx
+ umlsl. */
+ return 2785;
+ }
}
}
}
@@ -2419,44 +2639,88 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx000xx
- smlall. */
- return 2615;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx000xx
+ smlall. */
+ return 2639;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx000xx
+ smlall. */
+ return 2640;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx000xx
- smlall. */
- return 2616;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx000xx
+ smlall. */
+ return 2641;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx000xx
+ smlall. */
+ return 2642;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx000xx
- smlall. */
- return 2617;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx001xx
+ usmlall. */
+ return 2813;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx001xx
+ usmlall. */
+ return 2814;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx000xx
- smlall. */
- return 2618;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx001xx
+ usmlall. */
+ return 2815;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx001xx
+ usmlall. */
+ return 2816;
+ }
}
}
}
@@ -2468,17 +2732,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx001xx
- usmlall. */
- return 2767;
+ x10000010x10xxxx0xx100xxxxx00xxx
+ fdot. */
+ return 2463;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx001xx
- usmlall. */
- return 2768;
+ x10000010x11xxxx0xx100xxxxx00xxx
+ fdot. */
+ return 2464;
}
}
else
@@ -2487,17 +2751,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx001xx
- usmlall. */
- return 2769;
+ x10000011x1xxxx00xx100xxxxx00xxx
+ fdot. */
+ return 2465;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx001xx
- usmlall. */
- return 2770;
+ x10000011x1xxxx10xx100xxxxx00xxx
+ fdot. */
+ return 2466;
}
}
}
@@ -2516,7 +2780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2481;
+ return 2493;
}
else
{
@@ -2524,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2482;
+ return 2494;
}
}
else
@@ -2535,7 +2799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2483;
+ return 2495;
}
else
{
@@ -2543,7 +2807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2484;
+ return 2496;
}
}
}
@@ -2557,7 +2821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2607;
+ return 2631;
}
else
{
@@ -2565,7 +2829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2608;
+ return 2632;
}
}
else
@@ -2576,7 +2840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2609;
+ return 2633;
}
else
{
@@ -2584,7 +2848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2610;
+ return 2634;
}
}
}
@@ -2599,7 +2863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2473;
+ return 2485;
}
else
{
@@ -2607,7 +2871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2474;
+ return 2486;
}
}
else
@@ -2618,7 +2882,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2475;
+ return 2487;
}
else
{
@@ -2626,7 +2890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2476;
+ return 2488;
}
}
}
@@ -2636,21 +2900,65 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx000xx
- smlall. */
- return 2614;
+ if (((word >> 2) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx000xx
+ smlall. */
+ return 2638;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx001xx
+ usmlall. */
+ return 2812;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx001xx
- usmlall. */
- return 2766;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx101xxxxx00xxx
+ sdot. */
+ return 2613;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx101xxxxx00xxx
+ sdot. */
+ return 2614;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx101xxxxx00xxx
+ sdot. */
+ return 2615;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx101xxxxx00xxx
+ sdot. */
+ return 2616;
+ }
+ }
}
}
else
@@ -2663,7 +2971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2480;
+ return 2492;
}
else
{
@@ -2671,7 +2979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2606;
+ return 2630;
}
}
else
@@ -2682,7 +2990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2453;
+ return 2459;
}
else
{
@@ -2690,7 +2998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2454;
+ return 2460;
}
}
}
@@ -2702,64 +3010,108 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx100xx
- umlall. */
- return 2739;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx100xx
+ umlall. */
+ return 2779;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx100xx
+ umlall. */
+ return 2780;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx100xx
- umlall. */
- return 2740;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx100xx
+ umlall. */
+ return 2781;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx100xx
+ umlall. */
+ return 2782;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx100xx
- umlall. */
- return 2741;
+ x1000001xx10xxxx0xx000xxxxx101xx
+ sumlall. */
+ return 2745;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx100xx
- umlall. */
- return 2742;
+ x1000001xx11xxxx0xx000xxxxx101xx
+ sumlall. */
+ return 2746;
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xxxx0xxx00xxxxx101xx
- sumlall. */
- return 2717;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx100xxxxx10xxx
+ bfdot. */
+ return 2438;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx100xxxxx10xxx
+ bfdot. */
+ return 2439;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xxxx0xxx00xxxxx101xx
- sumlall. */
- return 2718;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx100xxxxx10xxx
+ bfdot. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx100xxxxx10xxx
+ bfdot. */
+ return 2441;
+ }
}
}
}
@@ -2777,7 +3129,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2440;
+ return 2446;
}
else
{
@@ -2785,7 +3137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2441;
+ return 2447;
}
}
else
@@ -2796,7 +3148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2442;
+ return 2448;
}
else
{
@@ -2804,7 +3156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2443;
+ return 2449;
}
}
}
@@ -2818,7 +3170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2731;
+ return 2771;
}
else
{
@@ -2826,7 +3178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2732;
+ return 2772;
}
}
else
@@ -2837,7 +3189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2733;
+ return 2773;
}
else
{
@@ -2845,7 +3197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2734;
+ return 2774;
}
}
}
@@ -2897,11 +3249,55 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx10xxx
- umlall. */
- return 2738;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx10xxx
+ umlall. */
+ return 2778;
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx101xxxxx10xxx
+ udot. */
+ return 2755;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx101xxxxx10xxx
+ udot. */
+ return 2756;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx101xxxxx10xxx
+ udot. */
+ return 2757;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx101xxxxx10xxx
+ udot. */
+ return 2758;
+ }
+ }
+ }
}
else
{
@@ -2913,7 +3309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2439;
+ return 2445;
}
else
{
@@ -2921,7 +3317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2730;
+ return 2770;
}
}
else
@@ -2963,7 +3359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2631;
+ return 2655;
}
else
{
@@ -2971,7 +3367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2632;
+ return 2656;
}
}
else
@@ -2982,7 +3378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2633;
+ return 2657;
}
else
{
@@ -2990,7 +3386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2634;
+ return 2658;
}
}
}
@@ -3008,7 +3404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2495;
+ return 2507;
}
else
{
@@ -3016,7 +3412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2496;
+ return 2508;
}
}
else
@@ -3027,7 +3423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2497;
+ return 2509;
}
else
{
@@ -3035,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2498;
+ return 2510;
}
}
}
@@ -3049,7 +3445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2623;
+ return 2647;
}
else
{
@@ -3057,7 +3453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2624;
+ return 2648;
}
}
else
@@ -3068,7 +3464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2625;
+ return 2649;
}
else
{
@@ -3076,7 +3472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2626;
+ return 2650;
}
}
}
@@ -3091,7 +3487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2487;
+ return 2499;
}
else
{
@@ -3099,7 +3495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2488;
+ return 2500;
}
}
else
@@ -3110,7 +3506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2489;
+ return 2501;
}
else
{
@@ -3118,7 +3514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2490;
+ return 2502;
}
}
}
@@ -3128,11 +3524,99 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx01xxx
- smlsll. */
- return 2630;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx01xxx
+ smlsll. */
+ return 2654;
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx101xxxxx01xxx
+ usdot. */
+ return 2805;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx101xxxxx01xxx
+ usdot. */
+ return 2806;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx101xxxxx01xxx
+ usdot. */
+ return 2807;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx101xxxxx01xxx
+ usdot. */
+ return 2808;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx101xxxxx01xxx
+ sdot. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx101xxxxx01xxx
+ sdot. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx101xxxxx01xxx
+ sdot. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx101xxxxx01xxx
+ sdot. */
+ return 2610;
+ }
+ }
+ }
+ }
}
else
{
@@ -3144,7 +3628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2494;
+ return 2506;
}
else
{
@@ -3152,7 +3636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2622;
+ return 2646;
}
}
else
@@ -3163,7 +3647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2499;
+ return 2511;
}
else
{
@@ -3171,7 +3655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2500;
+ return 2512;
}
}
}
@@ -3191,7 +3675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2755;
+ return 2795;
}
else
{
@@ -3199,7 +3683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2756;
+ return 2796;
}
}
else
@@ -3210,7 +3694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2757;
+ return 2797;
}
else
{
@@ -3218,7 +3702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2758;
+ return 2798;
}
}
}
@@ -3236,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2448;
+ return 2454;
}
else
{
@@ -3244,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2449;
+ return 2455;
}
}
else
@@ -3255,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2450;
+ return 2456;
}
else
{
@@ -3263,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2451;
+ return 2457;
}
}
}
@@ -3277,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2747;
+ return 2787;
}
else
{
@@ -3285,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2748;
+ return 2788;
}
}
else
@@ -3296,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2749;
+ return 2789;
}
else
{
@@ -3304,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2750;
+ return 2790;
}
}
}
@@ -3319,7 +3803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2710;
+ return 2734;
}
else
{
@@ -3327,7 +3811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2711;
+ return 2735;
}
}
else
@@ -3338,7 +3822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2712;
+ return 2736;
}
else
{
@@ -3346,7 +3830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2713;
+ return 2737;
}
}
}
@@ -3356,11 +3840,77 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx11xxx
- umlsll. */
- return 2754;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx11xxx
+ umlsll. */
+ return 2794;
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x010xxxx0xx101xxxxx11xxx
+ sudot. */
+ return 2740;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011xxxx0xx101xxxxx11xxx
+ sudot. */
+ return 2741;
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx101xxxxx11xxx
+ udot. */
+ return 2749;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx101xxxxx11xxx
+ udot. */
+ return 2750;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx101xxxxx11xxx
+ udot. */
+ return 2751;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx101xxxxx11xxx
+ udot. */
+ return 2752;
+ }
+ }
+ }
+ }
}
else
{
@@ -3372,7 +3922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2447;
+ return 2453;
}
else
{
@@ -3380,7 +3930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2746;
+ return 2786;
}
}
else
@@ -3391,7 +3941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2708;
+ return 2732;
}
else
{
@@ -3399,7 +3949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2709;
+ return 2733;
}
}
}
@@ -3421,7 +3971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2593;
+ return 2617;
}
else
{
@@ -3429,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2594;
+ return 2618;
}
}
else
@@ -3446,7 +3996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2595;
+ return 2619;
}
else
{
@@ -3454,7 +4004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2597;
+ return 2621;
}
}
else
@@ -3465,7 +4015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2596;
+ return 2620;
}
else
{
@@ -3473,7 +4023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2598;
+ return 2622;
}
}
}
@@ -3487,7 +4037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2635;
+ return 2659;
}
else
{
@@ -3495,7 +4045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2637;
+ return 2661;
}
}
else
@@ -3506,7 +4056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2636;
+ return 2660;
}
else
{
@@ -3514,7 +4064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2638;
+ return 2662;
}
}
}
@@ -3531,7 +4081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2455;
+ return 2467;
}
else
{
@@ -3539,7 +4089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2457;
+ return 2469;
}
}
else
@@ -3550,7 +4100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2456;
+ return 2468;
}
else
{
@@ -3558,7 +4108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2458;
+ return 2470;
}
}
}
@@ -3598,7 +4148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2599;
+ return 2623;
}
else
{
@@ -3606,7 +4156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2601;
+ return 2625;
}
}
else
@@ -3617,7 +4167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2600;
+ return 2624;
}
else
{
@@ -3625,7 +4175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2602;
+ return 2626;
}
}
}
@@ -3639,7 +4189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2639;
+ return 2663;
}
else
{
@@ -3647,7 +4197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2641;
+ return 2665;
}
}
else
@@ -3658,7 +4208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2640;
+ return 2664;
}
else
{
@@ -3666,7 +4216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2642;
+ return 2666;
}
}
}
@@ -3681,7 +4231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2459;
+ return 2471;
}
else
{
@@ -3689,7 +4239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2461;
+ return 2473;
}
}
else
@@ -3700,7 +4250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2460;
+ return 2472;
}
else
{
@@ -3708,7 +4258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2462;
+ return 2474;
}
}
}
@@ -3728,7 +4278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2719;
+ return 2759;
}
else
{
@@ -3736,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2721;
+ return 2761;
}
}
else
@@ -3747,7 +4297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2720;
+ return 2760;
}
else
{
@@ -3755,7 +4305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2722;
+ return 2762;
}
}
}
@@ -3769,7 +4319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2463;
+ return 2475;
}
else
{
@@ -3777,7 +4327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2465;
+ return 2477;
}
}
else
@@ -3788,7 +4338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2464;
+ return 2476;
}
else
{
@@ -3796,7 +4346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2466;
+ return 2478;
}
}
}
@@ -3815,7 +4365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2723;
+ return 2763;
}
else
{
@@ -3823,7 +4373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2725;
+ return 2765;
}
}
else
@@ -3834,7 +4384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2724;
+ return 2764;
}
else
{
@@ -3842,7 +4392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2726;
+ return 2766;
}
}
}
@@ -3856,7 +4406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2759;
+ return 2799;
}
else
{
@@ -3864,7 +4414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2761;
+ return 2801;
}
}
else
@@ -3875,7 +4425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2760;
+ return 2800;
}
else
{
@@ -3883,7 +4433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2762;
+ return 2802;
}
}
}
@@ -3898,7 +4448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2467;
+ return 2479;
}
else
{
@@ -3906,7 +4456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2469;
+ return 2481;
}
}
else
@@ -3917,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2468;
+ return 2480;
}
else
{
@@ -3925,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2470;
+ return 2482;
}
}
}
@@ -3954,7 +4504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2649;
+ return 2673;
}
else
{
@@ -3962,7 +4512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2673;
+ return 2697;
}
}
else
@@ -3973,7 +4523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2665;
+ return 2689;
}
else
{
@@ -3981,7 +4531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2657;
+ return 2681;
}
}
}
@@ -3995,7 +4545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2681;
+ return 2705;
}
else
{
@@ -4003,7 +4553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2705;
+ return 2729;
}
}
else
@@ -4014,7 +4564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2697;
+ return 2721;
}
else
{
@@ -4022,7 +4572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2689;
+ return 2713;
}
}
}
@@ -4050,7 +4600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2650;
+ return 2674;
}
else
{
@@ -4058,7 +4608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2707;
+ return 2731;
}
}
else
@@ -4067,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2674;
+ return 2698;
}
}
else
@@ -4078,7 +4628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2666;
+ return 2690;
}
else
{
@@ -4086,7 +4636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2658;
+ return 2682;
}
}
}
@@ -4100,7 +4650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2682;
+ return 2706;
}
else
{
@@ -4108,7 +4658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2706;
+ return 2730;
}
}
else
@@ -4119,7 +4669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2698;
+ return 2722;
}
else
{
@@ -4127,7 +4677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2690;
+ return 2714;
}
}
}
@@ -4169,7 +4719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2645;
+ return 2669;
}
else
{
@@ -4177,7 +4727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2646;
+ return 2670;
}
}
else
@@ -4188,7 +4738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2669;
+ return 2693;
}
else
{
@@ -4196,7 +4746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2670;
+ return 2694;
}
}
}
@@ -4210,7 +4760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2661;
+ return 2685;
}
else
{
@@ -4218,7 +4768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2662;
+ return 2686;
}
}
else
@@ -4229,7 +4779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2653;
+ return 2677;
}
else
{
@@ -4237,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2654;
+ return 2678;
}
}
}
@@ -4254,7 +4804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2677;
+ return 2701;
}
else
{
@@ -4262,7 +4812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2678;
+ return 2702;
}
}
else
@@ -4273,7 +4823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2701;
+ return 2725;
}
else
{
@@ -4281,7 +4831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2702;
+ return 2726;
}
}
}
@@ -4295,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2693;
+ return 2717;
}
else
{
@@ -4303,7 +4853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2694;
+ return 2718;
}
}
else
@@ -4314,7 +4864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2685;
+ return 2709;
}
else
{
@@ -4322,7 +4872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2686;
+ return 2710;
}
}
}
@@ -6724,7 +7274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2836;
+ return 2886;
}
else
{
@@ -6732,7 +7282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2844;
+ return 2894;
}
}
else
@@ -6743,7 +7293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2840;
+ return 2890;
}
else
{
@@ -6751,7 +7301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2847;
+ return 2897;
}
}
}
@@ -6789,7 +7339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2896;
+ return 2946;
}
else
{
@@ -6797,7 +7347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2902;
+ return 2952;
}
}
else
@@ -6808,7 +7358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2899;
+ return 2949;
}
else
{
@@ -6816,7 +7366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2905;
+ return 2955;
}
}
}
@@ -6830,7 +7380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2920;
+ return 2970;
}
else
{
@@ -6838,7 +7388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2926;
+ return 2976;
}
}
else
@@ -6849,7 +7399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2923;
+ return 2973;
}
else
{
@@ -6857,7 +7407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2929;
+ return 2979;
}
}
}
@@ -6874,7 +7424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2908;
+ return 2958;
}
else
{
@@ -6882,7 +7432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2914;
+ return 2964;
}
}
else
@@ -6893,7 +7443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2911;
+ return 2961;
}
else
{
@@ -6901,7 +7451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2917;
+ return 2967;
}
}
}
@@ -6915,7 +7465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2932;
+ return 2982;
}
else
{
@@ -6923,7 +7473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2938;
+ return 2988;
}
}
else
@@ -6934,7 +7484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2935;
+ return 2985;
}
else
{
@@ -6942,7 +7492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2941;
+ return 2991;
}
}
}
@@ -7007,7 +7557,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2837;
+ return 2887;
}
else
{
@@ -7015,7 +7565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2845;
+ return 2895;
}
}
else
@@ -7026,7 +7576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2841;
+ return 2891;
}
else
{
@@ -7034,7 +7584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2848;
+ return 2898;
}
}
}
@@ -7072,7 +7622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2897;
+ return 2947;
}
else
{
@@ -7080,7 +7630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2903;
+ return 2953;
}
}
else
@@ -7091,7 +7641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2900;
+ return 2950;
}
else
{
@@ -7099,7 +7649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2906;
+ return 2956;
}
}
}
@@ -7113,7 +7663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2921;
+ return 2971;
}
else
{
@@ -7121,7 +7671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2927;
+ return 2977;
}
}
else
@@ -7132,7 +7682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2924;
+ return 2974;
}
else
{
@@ -7140,7 +7690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2930;
+ return 2980;
}
}
}
@@ -7157,7 +7707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2909;
+ return 2959;
}
else
{
@@ -7165,7 +7715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2915;
+ return 2965;
}
}
else
@@ -7176,7 +7726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2912;
+ return 2962;
}
else
{
@@ -7184,7 +7734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2918;
+ return 2968;
}
}
}
@@ -7198,7 +7748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2933;
+ return 2983;
}
else
{
@@ -7206,7 +7756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2939;
+ return 2989;
}
}
else
@@ -7217,7 +7767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2936;
+ return 2986;
}
else
{
@@ -7225,7 +7775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2942;
+ return 2992;
}
}
}
@@ -7293,7 +7843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2839;
+ return 2889;
}
else
{
@@ -7301,7 +7851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2846;
+ return 2896;
}
}
else
@@ -7310,7 +7860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2843;
+ return 2893;
}
}
else
@@ -7321,7 +7871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2838;
+ return 2888;
}
else
{
@@ -7329,7 +7879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2842;
+ return 2892;
}
}
}
@@ -7391,7 +7941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2898;
+ return 2948;
}
else
{
@@ -7399,7 +7949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2992;
+ return 3042;
}
}
else
@@ -7410,7 +7960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2904;
+ return 2954;
}
else
{
@@ -7418,7 +7968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2994;
+ return 3044;
}
}
}
@@ -7432,7 +7982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2901;
+ return 2951;
}
else
{
@@ -7440,7 +7990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2993;
+ return 3043;
}
}
else
@@ -7449,7 +7999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2907;
+ return 2957;
}
}
}
@@ -7465,7 +8015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2922;
+ return 2972;
}
else
{
@@ -7473,7 +8023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2998;
+ return 3048;
}
}
else
@@ -7484,7 +8034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2928;
+ return 2978;
}
else
{
@@ -7492,7 +8042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3000;
+ return 3050;
}
}
}
@@ -7506,7 +8056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2925;
+ return 2975;
}
else
{
@@ -7514,7 +8064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2999;
+ return 3049;
}
}
else
@@ -7523,7 +8073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2931;
+ return 2981;
}
}
}
@@ -7542,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2910;
+ return 2960;
}
else
{
@@ -7550,7 +8100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2995;
+ return 3045;
}
}
else
@@ -7561,7 +8111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2916;
+ return 2966;
}
else
{
@@ -7569,7 +8119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2997;
+ return 3047;
}
}
}
@@ -7583,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2913;
+ return 2963;
}
else
{
@@ -7591,7 +8141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2996;
+ return 3046;
}
}
else
@@ -7600,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2919;
+ return 2969;
}
}
}
@@ -7616,7 +8166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2934;
+ return 2984;
}
else
{
@@ -7624,7 +8174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3001;
+ return 3051;
}
}
else
@@ -7635,7 +8185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2940;
+ return 2990;
}
else
{
@@ -7643,7 +8193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3003;
+ return 3053;
}
}
}
@@ -7657,7 +8207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2937;
+ return 2987;
}
else
{
@@ -7665,7 +8215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3002;
+ return 3052;
}
}
else
@@ -7674,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2943;
+ return 2993;
}
}
}
@@ -8047,7 +8597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3021;
+ return 3071;
}
else
{
@@ -8065,7 +8615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3024;
+ return 3074;
}
}
}
@@ -8145,7 +8695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2834;
+ return 2884;
}
else
{
@@ -8153,7 +8703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2835;
+ return 2885;
}
}
else
@@ -8260,7 +8810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3026;
+ return 3076;
}
}
}
@@ -8276,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3023;
+ return 3073;
}
else
{
@@ -8321,7 +8871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2833;
+ return 2883;
}
else
{
@@ -8415,7 +8965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3025;
+ return 3075;
}
}
}
@@ -8545,7 +9095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3027;
+ return 3077;
}
}
}
@@ -8561,7 +9111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3022;
+ return 3072;
}
else
{
@@ -9403,7 +9953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2853;
+ return 2903;
}
}
}
@@ -9477,7 +10027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2854;
+ return 2904;
}
}
}
@@ -12151,7 +12701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2852;
+ return 2902;
}
}
}
@@ -13855,7 +14405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2881;
+ return 2931;
}
}
else
@@ -14098,7 +14648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2857;
+ return 2907;
}
else
{
@@ -14106,7 +14656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2858;
+ return 2908;
}
}
else
@@ -14338,7 +14888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2878;
+ return 2928;
}
else
{
@@ -14359,7 +14909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2885;
+ return 2935;
}
else
{
@@ -14367,7 +14917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2884;
+ return 2934;
}
}
else
@@ -14422,7 +14972,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2877;
+ return 2927;
}
else
{
@@ -14434,7 +14984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2883;
+ return 2933;
}
else
{
@@ -14442,7 +14992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2882;
+ return 2932;
}
}
else
@@ -14493,7 +15043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2861;
+ return 2911;
}
else
{
@@ -14501,7 +15051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2862;
+ return 2912;
}
}
else
@@ -14860,7 +15410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2855;
+ return 2905;
}
else
{
@@ -14893,7 +15443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2879;
+ return 2929;
}
else
{
@@ -14923,7 +15473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2856;
+ return 2906;
}
else
{
@@ -15052,7 +15602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2865;
+ return 2915;
}
else
{
@@ -15062,7 +15612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2867;
+ return 2917;
}
else
{
@@ -15070,7 +15620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2869;
+ return 2919;
}
}
}
@@ -15082,7 +15632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2866;
+ return 2916;
}
else
{
@@ -15092,7 +15642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2868;
+ return 2918;
}
else
{
@@ -15100,7 +15650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2870;
+ return 2920;
}
}
}
@@ -16159,7 +16709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2849;
+ return 2899;
}
else
{
@@ -16167,7 +16717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2851;
+ return 2901;
}
}
else
@@ -16176,7 +16726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2850;
+ return 2900;
}
}
}
@@ -17672,7 +18222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2859;
+ return 2909;
}
else
{
@@ -17680,7 +18230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2860;
+ return 2910;
}
}
}
@@ -18054,7 +18604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2863;
+ return 2913;
}
else
{
@@ -18062,7 +18612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2864;
+ return 2914;
}
}
}
@@ -18423,7 +18973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2771;
+ return 2817;
}
else
{
@@ -18431,7 +18981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2772;
+ return 2818;
}
}
else
@@ -18461,7 +19011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2590;
+ return 2602;
}
}
}
@@ -18475,7 +19025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2774;
+ return 2820;
}
else
{
@@ -18483,7 +19033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2773;
+ return 2819;
}
}
else
@@ -18513,7 +19063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2592;
+ return 2604;
}
}
}
@@ -18530,7 +19080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2778;
+ return 2824;
}
else
{
@@ -18538,7 +19088,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2775;
+ return 2821;
}
}
else
@@ -18568,7 +19118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2591;
+ return 2603;
}
}
}
@@ -18582,7 +19132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2776;
+ return 2822;
}
else
{
@@ -18590,7 +19140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2777;
+ return 2823;
}
}
else
@@ -19716,7 +20266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2880;
+ return 2930;
}
}
else
@@ -20375,7 +20925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2452;
+ return 2458;
}
}
else
@@ -21077,7 +21627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3016;
+ return 3066;
}
else
{
@@ -21657,7 +22207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2944;
+ return 2994;
}
else
{
@@ -21665,7 +22215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2946;
+ return 2996;
}
}
else
@@ -21676,7 +22226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2950;
+ return 3000;
}
else
{
@@ -21684,7 +22234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2952;
+ return 3002;
}
}
}
@@ -21698,7 +22248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2947;
+ return 2997;
}
else
{
@@ -21706,7 +22256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2949;
+ return 2999;
}
}
else
@@ -21717,7 +22267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2953;
+ return 3003;
}
else
{
@@ -21725,7 +22275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2955;
+ return 3005;
}
}
}
@@ -21742,7 +22292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2968;
+ return 3018;
}
else
{
@@ -21750,7 +22300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2970;
+ return 3020;
}
}
else
@@ -21761,7 +22311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2974;
+ return 3024;
}
else
{
@@ -21769,7 +22319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2976;
+ return 3026;
}
}
}
@@ -21783,7 +22333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2971;
+ return 3021;
}
else
{
@@ -21791,7 +22341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2973;
+ return 3023;
}
}
else
@@ -21802,7 +22352,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2977;
+ return 3027;
}
else
{
@@ -21810,7 +22360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2979;
+ return 3029;
}
}
}
@@ -21830,7 +22380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2956;
+ return 3006;
}
else
{
@@ -21838,7 +22388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2958;
+ return 3008;
}
}
else
@@ -21849,7 +22399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2962;
+ return 3012;
}
else
{
@@ -21857,7 +22407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2964;
+ return 3014;
}
}
}
@@ -21871,7 +22421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2959;
+ return 3009;
}
else
{
@@ -21879,7 +22429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2961;
+ return 3011;
}
}
else
@@ -21890,7 +22440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2965;
+ return 3015;
}
else
{
@@ -21898,7 +22448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2967;
+ return 3017;
}
}
}
@@ -21915,7 +22465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2980;
+ return 3030;
}
else
{
@@ -21923,7 +22473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2982;
+ return 3032;
}
}
else
@@ -21934,7 +22484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2986;
+ return 3036;
}
else
{
@@ -21942,7 +22492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2988;
+ return 3038;
}
}
}
@@ -21956,7 +22506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2983;
+ return 3033;
}
else
{
@@ -21964,7 +22514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2985;
+ return 3035;
}
}
else
@@ -21975,7 +22525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2989;
+ return 3039;
}
else
{
@@ -21983,7 +22533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2991;
+ return 3041;
}
}
}
@@ -22017,7 +22567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2945;
+ return 2995;
}
else
{
@@ -22025,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3004;
+ return 3054;
}
}
else
@@ -22036,7 +22586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2951;
+ return 3001;
}
else
{
@@ -22044,7 +22594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3006;
+ return 3056;
}
}
}
@@ -22058,7 +22608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2948;
+ return 2998;
}
else
{
@@ -22066,7 +22616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3005;
+ return 3055;
}
}
else
@@ -22075,7 +22625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2954;
+ return 3004;
}
}
}
@@ -22091,7 +22641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2969;
+ return 3019;
}
else
{
@@ -22099,7 +22649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3010;
+ return 3060;
}
}
else
@@ -22110,7 +22660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2975;
+ return 3025;
}
else
{
@@ -22118,7 +22668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3012;
+ return 3062;
}
}
}
@@ -22132,7 +22682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2972;
+ return 3022;
}
else
{
@@ -22140,7 +22690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3011;
+ return 3061;
}
}
else
@@ -22149,7 +22699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2978;
+ return 3028;
}
}
}
@@ -22168,7 +22718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2957;
+ return 3007;
}
else
{
@@ -22176,7 +22726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3007;
+ return 3057;
}
}
else
@@ -22187,7 +22737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2963;
+ return 3013;
}
else
{
@@ -22195,7 +22745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3009;
+ return 3059;
}
}
}
@@ -22209,7 +22759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2960;
+ return 3010;
}
else
{
@@ -22217,7 +22767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3008;
+ return 3058;
}
}
else
@@ -22226,7 +22776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2966;
+ return 3016;
}
}
}
@@ -22242,7 +22792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2981;
+ return 3031;
}
else
{
@@ -22250,7 +22800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3013;
+ return 3063;
}
}
else
@@ -22261,7 +22811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2987;
+ return 3037;
}
else
{
@@ -22269,7 +22819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3015;
+ return 3065;
}
}
}
@@ -22283,7 +22833,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2984;
+ return 3034;
}
else
{
@@ -22291,7 +22841,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3014;
+ return 3064;
}
}
else
@@ -22300,7 +22850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2990;
+ return 3040;
}
}
}
@@ -22467,7 +23017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2871;
+ return 2921;
}
}
}
@@ -22500,7 +23050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2797;
+ return 2847;
}
}
else
@@ -22574,7 +23124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2873;
+ return 2923;
}
}
}
@@ -22607,7 +23157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2874;
+ return 2924;
}
}
else
@@ -22654,7 +23204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2804;
+ return 2854;
}
else
{
@@ -22662,7 +23212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2806;
+ return 2856;
}
}
else
@@ -22673,7 +23223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2808;
+ return 2858;
}
else
{
@@ -22687,7 +23237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2809;
+ return 2859;
}
else
{
@@ -22695,7 +23245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2802;
+ return 2852;
}
}
else
@@ -22704,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2811;
+ return 2861;
}
}
else
@@ -22717,7 +23267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2810;
+ return 2860;
}
else
{
@@ -22725,7 +23275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2815;
+ return 2865;
}
}
else
@@ -22734,7 +23284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2812;
+ return 2862;
}
}
}
@@ -22915,7 +23465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2796;
+ return 2846;
}
}
else
@@ -22946,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2872;
+ return 2922;
}
else
{
@@ -22965,7 +23515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2888;
+ return 2938;
}
else
{
@@ -22975,7 +23525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2886;
+ return 2936;
}
else
{
@@ -22985,7 +23535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2893;
+ return 2943;
}
else
{
@@ -22993,7 +23543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2892;
+ return 2942;
}
}
}
@@ -23577,7 +24127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2889;
+ return 2939;
}
else
{
@@ -23585,7 +24135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2890;
+ return 2940;
}
}
}
@@ -23903,7 +24453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2807;
+ return 2857;
}
}
else
@@ -24514,7 +25064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2800;
+ return 2850;
}
}
}
@@ -24566,7 +25116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2813;
+ return 2863;
}
}
}
@@ -24809,7 +25359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2803;
+ return 2853;
}
}
else
@@ -24885,7 +25435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2816;
+ return 2866;
}
}
else
@@ -25711,7 +26261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2801;
+ return 2851;
}
}
else
@@ -25743,7 +26293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2814;
+ return 2864;
}
}
else
@@ -25983,7 +26533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2805;
+ return 2855;
}
}
else
@@ -26015,7 +26565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2819;
+ return 2869;
}
else
{
@@ -26023,7 +26573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2823;
+ return 2873;
}
}
}
@@ -26045,7 +26595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2820;
+ return 2870;
}
else
{
@@ -26053,7 +26603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2824;
+ return 2874;
}
}
}
@@ -26092,7 +26642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2817;
+ return 2867;
}
else
{
@@ -26100,7 +26650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2821;
+ return 2871;
}
}
else
@@ -26122,7 +26672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2818;
+ return 2868;
}
else
{
@@ -26130,7 +26680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2822;
+ return 2872;
}
}
else
@@ -27938,7 +28488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2825;
+ return 2875;
}
else
{
@@ -27946,7 +28496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2829;
+ return 2879;
}
}
else
@@ -27968,7 +28518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2826;
+ return 2876;
}
else
{
@@ -27976,7 +28526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2830;
+ return 2880;
}
}
else
@@ -28482,7 +29032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2827;
+ return 2877;
}
else
{
@@ -28490,7 +29040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2831;
+ return 2881;
}
}
}
@@ -28512,7 +29062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2828;
+ return 2878;
}
else
{
@@ -28520,7 +29070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2832;
+ return 2882;
}
}
}
@@ -28576,7 +29126,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2799;
+ return 2849;
}
else
{
@@ -28584,7 +29134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2798;
+ return 2848;
}
}
}
@@ -28687,7 +29237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2876;
+ return 2926;
}
else
{
@@ -28695,7 +29245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2875;
+ return 2925;
}
}
else
@@ -28706,7 +29256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2887;
+ return 2937;
}
else
{
@@ -28716,7 +29266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2895;
+ return 2945;
}
else
{
@@ -28724,7 +29274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2894;
+ return 2944;
}
}
}
@@ -29215,22 +29765,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2578: value = 2586; break; /* mov --> mova. */
- case 2586: return NULL; /* mova --> NULL. */
- case 2574: value = 2582; break; /* mov --> mova. */
- case 2582: return NULL; /* mova --> NULL. */
- case 2576: value = 2584; break; /* mov --> mova. */
- case 2584: return NULL; /* mova --> NULL. */
- case 2572: value = 2580; break; /* mov --> mova. */
- case 2580: return NULL; /* mova --> NULL. */
- case 2579: value = 2587; break; /* mov --> mova. */
- case 2587: return NULL; /* mova --> NULL. */
- case 2575: value = 2583; break; /* mov --> mova. */
- case 2583: return NULL; /* mova --> NULL. */
- case 2577: value = 2585; break; /* mov --> mova. */
- case 2585: return NULL; /* mova --> NULL. */
- case 2573: value = 2581; break; /* mov --> mova. */
- case 2581: return NULL; /* mova --> NULL. */
+ case 2590: value = 2598; break; /* mov --> mova. */
+ case 2598: return NULL; /* mova --> NULL. */
+ case 2586: value = 2594; break; /* mov --> mova. */
+ case 2594: return NULL; /* mova --> NULL. */
+ case 2588: value = 2596; break; /* mov --> mova. */
+ case 2596: return NULL; /* mova --> NULL. */
+ case 2584: value = 2592; break; /* mov --> mova. */
+ case 2592: return NULL; /* mova --> NULL. */
+ case 2591: value = 2599; break; /* mov --> mova. */
+ case 2599: return NULL; /* mova --> NULL. */
+ case 2587: value = 2595; break; /* mov --> mova. */
+ case 2595: return NULL; /* mova --> NULL. */
+ case 2589: value = 2597; break; /* mov --> mova. */
+ case 2597: return NULL; /* mova --> NULL. */
+ case 2585: value = 2593; break; /* mov --> mova. */
+ case 2593: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -29252,11 +29802,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3017; break; /* addg --> smax. */
- case 3017: value = 3018; break; /* smax --> umax. */
- case 3018: value = 3019; break; /* umax --> smin. */
- case 3019: value = 3020; break; /* smin --> umin. */
- case 3020: return NULL; /* umin --> NULL. */
+ case 19: value = 3067; break; /* addg --> smax. */
+ case 3067: value = 3068; break; /* smax --> umax. */
+ case 3068: value = 3069; break; /* umax --> smin. */
+ case 3069: value = 3070; break; /* smin --> umin. */
+ case 3070: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -29414,8 +29964,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2891; break; /* fcvt --> bfcvt. */
- case 2891: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2941; break; /* fcvt --> bfcvt. */
+ case 2941: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 75d36640da4..2012615e519 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5349,6 +5349,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("bfdot", 0xc1501018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1509018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfdot", 0xc1201010, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1301010, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfdot", 0xc1a01010, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1a11010, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("bfmlal", 0xc1801010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("bfmlal", 0xc1901010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("bfmlal", 0xc1909010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
@@ -5368,6 +5374,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1501008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1509008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1201000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1301000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1a01000, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1a11000, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fmax", 0xc120a100, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fmax", 0xc120a900, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fmax", 0xc120b100, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
@@ -5506,6 +5518,18 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("pext", 0x25207010, 0xff3ffc10, sme_size_22, 0, OP2 (SVE_Pd, SME_PNn3_INDEX2), OP_SVE_VU_BHSD, 0, 0),
SME2_INSN ("pext", 0x25207410, 0xff3ffe10, sme_size_22, 0, OP2 (SME_PdxN, SME_PNn3_INDEX1), OP_SVE_VU_BHSD, F_OD (2), 0),
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
+ SME2_INSN ("sdot", 0xc1501000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1509000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1601408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1701408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1e01408, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1e11408, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1501020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1509020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1201400, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1301400, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1a01400, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1a11400, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("sel", 0xc1208000, 0xff21e021, sme_size_22, 0, OP4 (SME_Zdnx2, SME_PNg3, SME_Znx2, SME_Zmx2), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("sel", 0xc1218000, 0xff23e063, sme_size_22, 0, OP4 (SME_Zdnx4, SME_PNg3, SME_Znx4, SME_Zmx4), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("smax", 0xc120a000, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
@@ -5627,11 +5651,27 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sudot", 0xc1501038, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sudot", 0xc1509038, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sudot", 0xc1201418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sudot", 0xc1301418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1000014, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
SME2_INSN ("sumlall", 0xc1100030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1501010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1509010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1601418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1701418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1e01418, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1e11418, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1501030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1509030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1201410, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1301410, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1a01410, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1a11410, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5676,6 +5716,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("usdot", 0xc1501028, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1509028, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usdot", 0xc1201408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1301408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usdot", 0xc1a01408, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1a11408, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("usmlall", 0xc1000004, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
SME2_INSN ("usmlall", 0xc1100020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("usmlall", 0xc1108020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
@@ -5695,12 +5741,16 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
/* SME2 I16I64 instructions. */
+ SME2_I16I64_INSN ("sdot", 0xc1d00008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("sdot", 0xc1d08008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("smlall", 0xc1800000, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("smlall", 0xc1900000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("smlall", 0xc1908000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("smlsll", 0xc1800008, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("smlsll", 0xc1900008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("smlsll", 0xc1908008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("udot", 0xc1d00018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("udot", 0xc1d08018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("umlall", 0xc1800010, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("umlall", 0xc1900010, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("umlall", 0xc1908010, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
--
2.25.1
next prev parent reply other threads:[~2023-03-30 10:27 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
2023-03-30 10:26 ` [PATCH 01/31] aarch64: Add +sme2 Richard Sandiford
2023-03-30 10:26 ` [PATCH 02/31] aarch64: Add a _10 suffix to FLD_imm3 Richard Sandiford
2023-03-30 10:26 ` [PATCH 03/31] aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array Richard Sandiford
2023-03-30 10:26 ` [PATCH 04/31] aarch64: Add support for vgx2 and vgx4 Richard Sandiford
2023-03-30 10:26 ` [PATCH 05/31] aarch64; Add support for vector offset ranges Richard Sandiford
2023-03-30 10:26 ` [PATCH 06/31] aarch64: Add support for predicate-as-counter registers Richard Sandiford
2023-03-30 10:26 ` [PATCH 07/31] aarch64: Add the SME2 MOVA instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 08/31] aarch64: Add the SME2 multivector LD1 and ST1 instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 09/31] aarch64: Add the SME2 predicate-related instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 10/31] aarch64: Add the SME2 ZT0 instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 11/31] aarch64: Add the SME2 ADD and SUB instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 12/31] aarch64: Add the SME2 maximum/minimum instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 13/31] aarch64: Add the SME2 FMLA and FMLS instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 14/31] aarch64: Add the SME2 MLAL and MLSL instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 15/31] aarch64: Add the SME2 MLALL and MLSLL instructions Richard Sandiford
2023-03-30 10:26 ` Richard Sandiford [this message]
2023-03-30 10:26 ` [PATCH 17/31] aarch64: Add the SME2 vertical dot-product instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 18/31] aarch64: Add the SME2 MOPA and MOPS instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 19/31] aarch64: Add the SME2 CLAMP instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 20/31] aarch64: Add the SME2 FP<->int conversion instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 21/31] aarch64: Add the SME2 FP<->FP " Richard Sandiford
2023-03-30 10:26 ` [PATCH 22/31] aarch64: Add the SME2 saturating " Richard Sandiford
2023-03-30 10:26 ` [PATCH 23/31] aarch64: Add the SME2 shift instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 24/31] aarch64: Add the SME2 UNPK instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 25/31] aarch64: Add the SME2 UZP and ZIP instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 26/31] aarch64: Add the SVE BFMLSL instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 27/31] aarch64: Add new SVE dot-product instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 28/31] aarch64: Add new SVE saturating conversion instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 29/31] aarch64: Add new SVE shift instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 30/31] aarch64: Add the SVE FCLAMP instruction Richard Sandiford
2023-03-30 10:26 ` [PATCH 31/31] aarch64: Add the RPRFM instruction Richard Sandiford
2023-04-02 9:35 ` [PATCH 00/31] aarch64: Add SME2 support Jan Beulich
2023-04-03 8:05 ` Richard Sandiford
2023-04-03 8:14 ` Jan Beulich
2023-04-03 8:27 ` Richard Sandiford
2023-04-03 8:37 ` Jan Beulich
2023-04-03 9:31 ` Richard Sandiford
2023-04-03 7:16 ` Jan Beulich
2023-04-03 8:13 ` Richard Sandiford
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