Re: [PATCH v3 4/9] Support APX GPR32 with extend evex prefix

[Jan Beulich <jbeulich@suse.com>]

On 11.12.2023 07:16, Cui, Lili wrote:
>> On 24.11.2023 08:02, Cui, Lili wrote:
>>> +	 the lower 2 bits of EVEX.aaa must be 0.  */
>>> +      if ((ins->vex.mask_register_specifier & 0x3) != 0
>>> +	  || ins->vex.ll != 0
>>> +	  || ins->vex.zeroing != 0
>>> +	  || ins->vex.b)
>>> +	return &bad_opcode;
>>> +
>>> +      /* Fall through.  */
>>>      case USE_X86_64_TABLE:
>>
>> Instead of falling through here to go through x86_64_table[] (where in all
>> cases the non-64-bit slot is "bad"), can't you avoid that step and go to the
>> next step (uniformly the LEN one) right away, saving all those new table entries
>> (along the lines of what you do below when processing into
>> evex_from_legacy)?
>>
> 
> It's not very clear to me here, do you want to add the vex_len_table to delete all entries in i386-dis-evex-x86-64.h?

Indeed I think that nothing there is really needed / warranted. The case can
be handled with no new table entries at all, I think.

>  but in this way, there are still some instructions that need to go through x86_64_table[], such as X86_64_VEX_0F38E*.

Why would these need special treatment? All EVEX-from-VEX encodings are uniform
in being defined for 64-bit code only.

>>> @@ -9041,12 +9106,24 @@ get_valid_dis386 (const struct dis386 *dp,
>>> instr_info *ins)
>>>
>>>        if (ins->address_mode != mode_64bit)
>>>  	{
>>> +	  if (ins->evex_type != evex_default
>>> +	      || (ins->rex2 & (REX_B | REX_X)))
>>> +	    return &bad_opcode;
>>
>> What's special about X and B?
>>
> 
> For evex_default, the values of these two bits are fixed. Comment added.
> 
>       if (ins->address_mode != mode_64bit)
>         {
>           /* Report bad for !evex_default and when two fixed values of evex
>              change..  */
>           if (ins->evex_type != evex_default
>               || (ins->rex2 & (REX_B | REX_X)))
>             return &bad_opcode;

Maybe you didn't get my point: What's wrong with just checking ins->rex2 here
as a whole, rather than specially treating two of the bits?

>>> @@ -9639,6 +9723,24 @@ print_insn (bfd_vma pc, disassemble_info *info,
>> int intel_syntax)
>>>        if (ins.last_repnz_prefix >= 0)
>>>  	ins.all_prefixes[ins.last_repnz_prefix] = 0xf2;
>>>        break;
>>> +
>>> +    case PREFIX_NP_OR_DATA:
>>> +      if (ins.vex.prefix & ~DATA_PREFIX_OPCODE)
>>
>> ~DATA_PREFIX_OPCODE == 0x99, which likely isn't what you mean here? Do
>> you perhaps mean e.g. "> DATA_PREFIX_OPCODE"? (Using the opcodes in
>> vex.prefix is questionable anyway, but that's a pre-existing oddity.)
>>
> 
> (A || 0) & ~A must be 0. It's hard to read.  
> 
> How about this ? This is more intuitive and easy to understand.
> 
>     case PREFIX_NP_OR_DATA:
>       if (ins.vex.prefix == REPE_PREFIX_OPCODE
>           || ins.vex.prefix == REPNE_PREFIX_OPCODE)
>         {
>           i386_dis_printf (info, dis_style_text, "(bad)");
>           ret = ins.end_codep - priv.the_buffer;
>           goto out;
>         }

That's fine with me as well, sure.

Jan