From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 3/4] x86-64: don't permit LAHF/SAHF with "generic64"
Date: Fri, 10 Feb 2023 09:50:25 +0100 [thread overview]
Message-ID: <3ab09feb-290d-693d-b43f-237022f3f6aa@suse.com> (raw)
In-Reply-To: <306b5fa2-9007-a4a1-bff5-f013e2c2c26a@suse.com>
The feature isn't universally available on 64-bit CPUs.
Note that in i386-gen.c:isa_dependencies[] I'm only adding it to models
where I'm certain the functionality exists. For Nocona and Core I'm
uncertain in particular.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1047,6 +1047,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (lwp, LWP, ANY_LWP, false),
SUBARCH (movbe, MOVBE, MOVBE, false),
SUBARCH (cx16, CX16, CX16, false),
+ SUBARCH (lahf_sahf, LAHF_SAHF, LAHF_SAHF, false),
SUBARCH (ept, EPT, ANY_EPT, false),
SUBARCH (lzcnt, LZCNT, LZCNT, false),
SUBARCH (popcnt, POPCNT, POPCNT, false),
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -151,6 +151,7 @@ accept various extension mnemonics. For
@code{sse4},
@code{avx},
@code{avx2},
+@code{lahf_sahf},
@code{adx},
@code{rdseed},
@code{prfchw},
@@ -1487,7 +1488,7 @@ supported on the CPU specified. The cho
@item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
@item @samp{.lzcnt} @tab @samp{.popcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc}
@item @samp{.hle} @tab @samp{.rtm} @tab @samp{.tsx}
-@item @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
+@item @samp{.lahf_sahf} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
@item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1}
@item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1}
@item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf}
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -934,6 +934,7 @@ if [gas_64_check] then {
run_dump_test "x86-64-arch-2-btver2"
run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al"
run_list_test "x86-64-arch-2-2" "-march=generic64+cx16 -I${srcdir}/$subdir -al"
+ run_list_test "x86-64-arch-2-3" "-march=generic64+lahf_sahf -I${srcdir}/$subdir -aln"
run_dump_test "xmmhi64"
run_dump_test "x86-64-xsave"
run_dump_test "x86-64-xsave-intel"
--- a/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d
@@ -1,5 +1,5 @@
#source: ../x86-64-arch-2.s
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
#objdump: -dw
#name: x86-64 (ILP32) arch 2
#dump: ../x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -1,4 +1,4 @@
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
#objdump: -dw
#name: x86-64 arch 2
@@ -38,4 +38,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+[ ]*[a-f0-9]+: 9f lahf
#pass
--- a/gas/testsuite/gas/i386/x86-64-arch-2.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.s
@@ -62,3 +62,5 @@ xstorerng
blsr %ecx,%ebx
# TBM
blcfill %ecx,%ebx
+# LAHF/SAHF
+lahf
--- a/gas/testsuite/gas/i386/x86-64-arch-2-1.l
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-1.l
@@ -24,6 +24,7 @@
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
+.*:66: Error: .*
GAS LISTING .*
@@ -95,3 +96,5 @@ GAS LISTING .*
[ ]*62[ ]+blsr %ecx,%ebx
[ ]*63[ ]+\# TBM
[ ]*64[ ]+blcfill %ecx,%ebx
+[ ]*65[ ]+\# LAHF/SAHF
+[ ]*66[ ]+lahf
--- a/gas/testsuite/gas/i386/x86-64-arch-2-2.l
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-2.l
@@ -23,6 +23,7 @@
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
+.*:66: Error: .*
GAS LISTING .*
@@ -94,3 +95,5 @@ GAS LISTING .*
[ ]*62[ ]+blsr %ecx,%ebx
[ ]*63[ ]+\# TBM
[ ]*64[ ]+blcfill %ecx,%ebx
+[ ]*65[ ]+\# LAHF/SAHF
+[ ]*66[ ]+lahf
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-3.l
@@ -0,0 +1,93 @@
+.*: Assembler messages:
+.*:16: Error: .*
+.*:18: Error: .*
+.*:20: Error: .*
+.*:22: Error: .*
+.*:24: Error: .*
+.*:26: Error: .*
+.*:28: Error: .*
+.*:30: Error: .*
+.*:32: Error: .*
+.*:34: Error: .*
+.*:36: Error: .*
+.*:38: Error: .*
+.*:40: Error: .*
+.*:42: Error: .*
+.*:44: Error: .*
+.*:46: Error: .*
+.*:48: Error: .*
+.*:50: Error: .*
+.*:52: Error: .*
+.*:54: Error: .*
+.*:56: Error: .*
+.*:58: Error: .*
+.*:60: Error: .*
+.*:62: Error: .*
+.*:64: Error: .*
+[ ]*1[ ]+\.include "x86-64-arch-2\.s"
+[ ]*1[ ]+\# Test -march=
+[ ]*2[ ]+\.text
+[ ]*3[ ]+\# cmov feature *
+[ ]*4[ ]+\?\?\?\? 0F44D8 cmove %eax,%ebx
+[ ]*5[ ]+\# clflush
+[ ]*6[ ]+\?\?\?\? 0FAE38 clflush \(%rax\)
+[ ]*7[ ]+\# SYSCALL
+[ ]*8[ ]+\?\?\?\? 0F05 syscall
+[ ]*9[ ]+\# MMX
+[ ]*10[ ]+\?\?\?\? 0FFCDC paddb %mm4,%mm3
+[ ]*11[ ]+\# SSE
+[ ]*12[ ]+\?\?\?\? F30F58DC addss %xmm4,%xmm3
+[ ]*13[ ]+\# SSE2
+[ ]*14[ ]+\?\?\?\? F20F58DC addsd %xmm4,%xmm3
+[ ]*15[ ]+\# SSE3
+[ ]*16[ ]+addsubpd %xmm4,%xmm3
+[ ]*17[ ]+\# SSSE3
+[ ]*18[ ]+phaddw %xmm4,%xmm3
+[ ]*19[ ]+\# SSE4\.1
+[ ]*20[ ]+phminposuw %xmm1,%xmm3
+[ ]*21[ ]+\# SSE4\.2
+[ ]*22[ ]+crc32 %ecx,%ebx
+[ ]*23[ ]+\# AVX
+[ ]*24[ ]+vzeroall
+[ ]*25[ ]+\# VMX
+[ ]*26[ ]+vmxoff
+[ ]*27[ ]+\# SMX
+[ ]*28[ ]+getsec
+[ ]*29[ ]+\# Xsave
+[ ]*30[ ]+xgetbv
+[ ]*31[ ]+\# Xsaveopt
+[ ]*32[ ]+xsaveopt \(%rcx\)
+[ ]*33[ ]+\# AES
+[ ]*34[ ]+aesenc \(%rcx\),%xmm0
+[ ]*35[ ]+\# PCLMUL
+[ ]*36[ ]+pclmulqdq \$8,%xmm1,%xmm0
+[ ]*37[ ]+\# AES \+ AVX
+[ ]*38[ ]+vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*39[ ]+\# PCLMUL \+ AVX
+[ ]*40[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
+[ ]*41[ ]+\# FMA
+[ ]*42[ ]+vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*43[ ]+\# MOVBE
+[ ]*44[ ]+movbe \(%rcx\),%ebx
+[ ]*45[ ]+\# CX16
+[ ]*46[ ]+cmpxchg16b \(%rsi\)
+[ ]*47[ ]+\# EPT
+[ ]*48[ ]+invept \(%rcx\),%rbx
+[ ]*49[ ]+\# RDTSCP
+[ ]*50[ ]+rdtscp
+[ ]*51[ ]+\# 3DNow or PRFCHW
+[ ]*52[ ]+prefetchw 0x1000\(,%rsi,2\)
+[ ]*53[ ]+\# SSE4a
+[ ]*54[ ]+insertq %xmm2,%xmm1
+[ ]*55[ ]+\# SVME
+[ ]*56[ ]+vmload
+[ ]*57[ ]+\# ABM/LZCNT
+[ ]*58[ ]+lzcnt %ecx,%ebx
+[ ]*59[ ]+\# PadLock
+[ ]*60[ ]+xstorerng
+[ ]*61[ ]+\# BMI
+[ ]*62[ ]+blsr %ecx,%ebx
+[ ]*63[ ]+\# TBM
+[ ]*64[ ]+blcfill %ecx,%ebx
+[ ]*65[ ]+\# LAHF/SAHF
+[ ]*66[ ]+\?\?\?\? 9F lahf
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-3.s
@@ -0,0 +1 @@
+.include "x86-64-arch-2.s"
--- a/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d
@@ -1,5 +1,5 @@
#source: x86-64-arch-2.s
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
#objdump: -dw
#name: x86-64 arch 2 (lzcnt)
#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-prefetchw.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-prefetchw.d
@@ -1,5 +1,5 @@
#source: x86-64-arch-2.s
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
#objdump: -dw
#name: x86-64 arch 2 (prefetchw)
#dump: x86-64-arch-2.d
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -67,7 +67,7 @@ static const dependency isa_dependencies
{ "CORE2",
"NOCONA|SSSE3" },
{ "COREI7",
- "CORE2|SSE4_2|Rdtscp" },
+ "CORE2|SSE4_2|Rdtscp|LAHF_SAHF" },
{ "K6",
"186|286|386|486|586|SYSCALL|387|MMX" },
{ "K6_2",
@@ -79,7 +79,7 @@ static const dependency isa_dependencies
{ "AMDFAM10",
"K8|FISTTP|SSE4A|ABM" },
{ "BDVER1",
- "GENERIC64|FISTTP|Rdtscp|CX16|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
+ "GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
{ "BDVER2",
"BDVER1|FMA|BMI|TBM|F16C" },
{ "BDVER3",
@@ -87,7 +87,7 @@ static const dependency isa_dependencies
{ "BDVER4",
"BDVER3|AVX2|Movbe|BMI2|RdRnd|MWAITX" },
{ "ZNVER1",
- "GENERIC64|FISTTP|Rdtscp|CX16|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
+ "GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
{ "ZNVER2",
"ZNVER1|CLWB|RDPID|RDPRU|MCOMMIT|WBNOINVD" },
{ "ZNVER3",
@@ -95,7 +95,7 @@ static const dependency isa_dependencies
{ "ZNVER4",
"ZNVER3|AVX512F|AVX512DQ|AVX512IFMA|AVX512CD|AVX512BW|AVX512VL|AVX512_BF16|AVX512VBMI|AVX512_VBMI2|AVX512_VNNI|AVX512_BITALG|AVX512_VPOPCNTDQ|GFNI|RMPQUERY" },
{ "BTVER1",
- "GENERIC64|FISTTP|CX16|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|CX16|Clflush|FISTTP|SVME" },
+ "GENERIC64|FISTTP|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
{ "BTVER2",
"BTVER1|AVX|BMI|F16C|AES|PCLMUL|Movbe|Xsaveopt|PRFCHW" },
{ "286",
@@ -313,6 +313,7 @@ static bitfield cpu_flags[] =
BITFIELD (LM),
BITFIELD (Movbe),
BITFIELD (CX16),
+ BITFIELD (LAHF_SAHF),
BITFIELD (EPT),
BITFIELD (Rdtscp),
BITFIELD (FSGSBase),
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -137,6 +137,8 @@ enum
CpuMovbe,
/* CMPXCHG16B instruction support required. */
CpuCX16,
+ /* LAHF/SAHF instruction support required (in 64-bit mode). */
+ CpuLAHF_SAHF,
/* EPT Instructions required */
CpuEPT,
/* RDTSCP Instruction support required */
@@ -372,6 +374,7 @@ typedef union i386_cpu_flags
unsigned int cputbm:1;
unsigned int cpumovbe:1;
unsigned int cpucx16:1;
+ unsigned int cpulahf_sahf:1;
unsigned int cpuept:1;
unsigned int cpurdtscp:1;
unsigned int cpufsgsbase:1;
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -264,8 +264,10 @@ cld, 0xfc, 0, NoSuf, {}
cli, 0xfa, 0, NoSuf, {}
clts, 0xf06, i286, NoSuf, {}
cmc, 0xf5, 0, NoSuf, {}
-lahf, 0x9f, 0, NoSuf, {}
-sahf, 0x9e, 0, NoSuf, {}
+lahf, 0x9f, No64, NoSuf, {}
+lahf, 0x9f, LAHF_SAHF, NoSuf, {}
+sahf, 0x9e, No64, NoSuf, {}
+sahf, 0x9e, LAHF_SAHF, NoSuf, {}
pushf, 0x9c, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
pushf, 0x9c, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
popf, 0x9d, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
next prev parent reply other threads:[~2023-02-10 8:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-10 8:47 [PATCH 0/4] x86: misc CPU type related assembler adjustments Jan Beulich
2023-02-10 8:48 ` [PATCH 1/4] x86-64: LAR and LSL don't need REX.W Jan Beulich
2023-02-10 8:49 ` [PATCH 2/4] x86: have insns acting on segment selector values allow for consistent operands Jan Beulich
2023-02-10 8:50 ` Jan Beulich [this message]
2023-02-10 8:51 ` [PATCH 4/4] x86: MONITOR/MWAIT are not SSE3 insns Jan Beulich
2023-02-10 17:02 ` H.J. Lu
2023-02-13 8:08 ` Jan Beulich
2023-02-13 17:40 ` H.J. Lu
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