* ARMV7a: selected processor does not support requested special purpose register
@ 2022-10-03 14:41 Umesh Kalappa
2022-10-03 15:48 ` Richard Earnshaw
0 siblings, 1 reply; 6+ messages in thread
From: Umesh Kalappa @ 2022-10-03 14:41 UTC (permalink / raw)
To: bug-binutils, Binutils
Hi All,
We have problem to compile the following asm
https://godbolt.org/z/hejMPoW69
and asm error out with the subject message .
Is mrs for float special register not valid on cortex-a9 ?
Thank you
~Umesh
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ARMV7a: selected processor does not support requested special purpose register
2022-10-03 14:41 ARMV7a: selected processor does not support requested special purpose register Umesh Kalappa
@ 2022-10-03 15:48 ` Richard Earnshaw
2022-10-03 15:54 ` Richard Earnshaw
0 siblings, 1 reply; 6+ messages in thread
From: Richard Earnshaw @ 2022-10-03 15:48 UTC (permalink / raw)
To: Umesh Kalappa, bug-binutils, Binutils
On 03/10/2022 15:41, Umesh Kalappa via Binutils wrote:
> Hi All,
>
> We have problem to compile the following asm
> https://godbolt.org/z/hejMPoW69
>
> and asm error out with the subject message .
>
> Is mrs for float special register not valid on cortex-a9 ?
>
> Thank you
> ~Umesh
that's because the instruction you want is
vmrs r4, fpscr
R.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ARMV7a: selected processor does not support requested special purpose register
2022-10-03 15:48 ` Richard Earnshaw
@ 2022-10-03 15:54 ` Richard Earnshaw
2022-10-04 4:26 ` Umesh Kalappa
0 siblings, 1 reply; 6+ messages in thread
From: Richard Earnshaw @ 2022-10-03 15:54 UTC (permalink / raw)
To: Umesh Kalappa, bug-binutils, Binutils
On 03/10/2022 16:48, Richard Earnshaw via Binutils wrote:
>
>
> On 03/10/2022 15:41, Umesh Kalappa via Binutils wrote:
>> Hi All,
>>
>> We have problem to compile the following asm
>> https://godbolt.org/z/hejMPoW69
>>
>> and asm error out with the subject message .
>>
>> Is mrs for float special register not valid on cortex-a9 ?
>>
>> Thank you
>> ~Umesh
>
> that's because the instruction you want is
>
> vmrs r4, fpscr
>
> R.
Also note that the fmrrs mnemonic is not part of the UAL (unified
assembly language) specification - it was deprecated a long time ago.
The correct names these days all start with a V - the disassembler
output shows the modern form.
The legacy name for vmrs was fmrx.
R.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ARMV7a: selected processor does not support requested special purpose register
2022-10-03 15:54 ` Richard Earnshaw
@ 2022-10-04 4:26 ` Umesh Kalappa
2022-10-04 10:03 ` Richard Earnshaw
0 siblings, 1 reply; 6+ messages in thread
From: Umesh Kalappa @ 2022-10-04 4:26 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: bug-binutils, Binutils
Thank you Richard for the information and do you please point us to
the reference ,which states the same ?
Quick grep doesn't helped us ,Thank you again
~Umesh
On Mon, Oct 3, 2022 at 9:24 PM Richard Earnshaw
<Richard.Earnshaw@foss.arm.com> wrote:
>
>
>
> On 03/10/2022 16:48, Richard Earnshaw via Binutils wrote:
> >
> >
> > On 03/10/2022 15:41, Umesh Kalappa via Binutils wrote:
> >> Hi All,
> >>
> >> We have problem to compile the following asm
> >> https://godbolt.org/z/hejMPoW69
> >>
> >> and asm error out with the subject message .
> >>
> >> Is mrs for float special register not valid on cortex-a9 ?
> >>
> >> Thank you
> >> ~Umesh
> >
> > that's because the instruction you want is
> >
> > vmrs r4, fpscr
> >
> > R.
>
> Also note that the fmrrs mnemonic is not part of the UAL (unified
> assembly language) specification - it was deprecated a long time ago.
> The correct names these days all start with a V - the disassembler
> output shows the modern form.
>
> The legacy name for vmrs was fmrx.
>
> R.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ARMV7a: selected processor does not support requested special purpose register
2022-10-04 4:26 ` Umesh Kalappa
@ 2022-10-04 10:03 ` Richard Earnshaw
2022-10-04 15:10 ` Joseph Myers
0 siblings, 1 reply; 6+ messages in thread
From: Richard Earnshaw @ 2022-10-04 10:03 UTC (permalink / raw)
To: Umesh Kalappa; +Cc: bug-binutils, Binutils
On 04/10/2022 05:26, Umesh Kalappa wrote:
> Thank you Richard for the information and do you please point us to
> the reference ,which states the same ?
>
> Quick grep doesn't helped us ,Thank you again
> ~Umesh
>
> On Mon, Oct 3, 2022 at 9:24 PM Richard Earnshaw
> <Richard.Earnshaw@foss.arm.com> wrote:
>>
>>
>>
>> On 03/10/2022 16:48, Richard Earnshaw via Binutils wrote:
>>>
>>>
>>> On 03/10/2022 15:41, Umesh Kalappa via Binutils wrote:
>>>> Hi All,
>>>>
>>>> We have problem to compile the following asm
>>>> https://godbolt.org/z/hejMPoW69
>>>>
>>>> and asm error out with the subject message .
>>>>
>>>> Is mrs for float special register not valid on cortex-a9 ?
>>>>
>>>> Thank you
>>>> ~Umesh
>>>
>>> that's because the instruction you want is
>>>
>>> vmrs r4, fpscr
>>>
>>> R.
>>
>> Also note that the fmrrs mnemonic is not part of the UAL (unified
>> assembly language) specification - it was deprecated a long time ago.
>> The correct names these days all start with a V - the disassembler
>> output shows the modern form.
>>
>> The legacy name for vmrs was fmrx.
>>
>> R.
You won't find (well are extremely unlikely to find) any documentation
for the legacy mnemonics online - the reference I have is from the ARMv5
ARM ARM from nearly 20 years ago, which was in paper form.
The current UAL syntax is documented in the Arm ARM, which you can
download from developer.arm.com - follow the links to the architecture.
There's also a fairly good list of the mapping between the legacy
mnemonics and UAL for VFP here:
https://developer.arm.com/documentation/ddi0406/b/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/F---former-VFP-instruction-mnemonics-
R.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-10-04 15:10 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2022-10-03 14:41 ARMV7a: selected processor does not support requested special purpose register Umesh Kalappa
2022-10-03 15:48 ` Richard Earnshaw
2022-10-03 15:54 ` Richard Earnshaw
2022-10-04 4:26 ` Umesh Kalappa
2022-10-04 10:03 ` Richard Earnshaw
2022-10-04 15:10 ` Joseph Myers
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