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From: jacob navia <jacob@jacob.remcomp.fr>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: jbeulich@suse.com, binutils@sourceware.org
Subject: Re: P.S. Follow up to my last post
Date: Fri, 25 Aug 2023 18:10:47 +0200	[thread overview]
Message-ID: <502E2019-6C30-45ED-9EE4-A5ABAABBB750@jacob.remcomp.fr> (raw)
In-Reply-To: <mhng-651de2ec-f069-407b-bf82-fb9638433b57@palmer-ri-x1c9a>

OK.
1) We agree that the -march=rv64gc_zbb option is completely undocumented and impossible for the user to know.
2) We agree that « gnu gas » is an assembler whose duty is to assemble instructions. But « gas » will refuse to assemble those instructions. 
  Why is that? It is the responsibility of the programmer or the compiler to write the instructions that are present in this or another machine. 
  Why the assembler thinks it is necessary to forbid some instructions???
3) Obviously what is needed is a libc routine that will return the machine id. Then gcc and the user could use it to see which instructions are present, and that was the intent of my post.
4) Speaking of documentation. Since there wasn’t any documentation of the many small letters that are used by the GAS opcodes, I wrote one, and sent it to this group on July 27th. Since then there was ZERO answers to that message.  Why should I write documentation if none in this group cares?

OK, We agree that I should stop complaining, and writing documentation, and pointing out bugs.

Have a nice time


> Le 25 août 2023 à 17:32, Palmer Dabbelt <palmer@dabbelt.com> a écrit :
> 
> On Fri, 25 Aug 2023 07:12:39 PDT (-0700), jacob@jacob.remcomp.fr wrote:
>> OF COURSE « march » is mentioned. But -march=rv64gc_zbb is NOT.
>> 
>> Where please give me a link) that option is mentioned?
>> 
>> It is NOT mentioned in
>> 
>> https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html
> 
> The "-march" argument is documented int the "-march" section of the argument documentation, specifically:
> 
>   -march=ISA-string
> 	Generate code for given RISC-V ISA (e.g. ‘rv64im’). ISA strings 	must be lower-case. Examples include ‘rv64i’, ‘rv32g’, ‘rv32e’, 	and ‘rv32imaf’.
>              When -march= is not specified, use the setting from -mcpu.
>       	If both -march and -mcpu= are not specified, the default for 	this argument is system dependent, users who want a specific 	architecture extensions should specify one explicitly.
> 
> Pretty much every port has a "-march" argument to control the subtarget to generate code for.  It's true that the GCC docs for RISC-V's -march should be improved (there's even an unfinished patch out to do it, you're more than welcome to finish it), but the argument itself is definately documented.
> 
> Those are all GCC problems, though.  I suppose we could improve the binutils -march documentation as well, it'd essentially just be a duplicate of the GCC docs (aside from some quirks like Zihintpause).
> 
>> The idea that the compiler could figure out the processor it is running on it is completely far fetched isn’t it?
>> 
>> Jacob
>> 
>> 
>> 
>>> Le 25 août 2023 à 15:07, jacob navia <jacob@jacob.remcomp.fr> a écrit :
>>> OK, there is no bug, I didn’t expect anything else.
>>> SO:
>>> To use all the instruction of the processor he/she is running on, the user should:
>>> 1)Be aware that gcc doesn’t see crucial instructions of the processor by verifying its assembler output.
>>> 2) Be aware that there is an (undocumented) option -march… that will enable the assembler and the compiler to generate all the instructions of the current processor.
>>> Well, there is NO BUG!
>>> This is by design then.
>>> Thank you very much.
>>> Jacob
>>>> Le 25 août 2023 à 14:00, Jan Beulich <jbeulich@suse.com> a écrit :
>>>> On 25.08.2023 13:52, jacob navia wrote:
>>>>> The lack of the Ebb instructions is CRUCIAL for performance when accessing tables / arrays!
>>>>> This instructions allow to combine an addition and a shift by 1, 2 or 3, to access tables of shorts, ints or doubles.
>>>>> This speeds up the access to tables enormously and would allow gcc to generate much better code.
>>>> Since you're writing to binutils@, you may want to also mention what gas
>>>> bug you think you see. So far (also in the other mail) you've talked of
>>>> only gcc. If you meant to say that like in gcc you need to enable use of
>>>> the instructions in gas, then yes, that's the way the RISC-V assembler
>>>> works (like e.g. also the PPC one, but unlike e.g. the x86 one).
>>>> Jan


  reply	other threads:[~2023-08-25 16:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <AEF14E89-14CF-4474-8822-B0139F3F740B@jacob.remcomp.fr>
2023-08-25 15:32 ` Palmer Dabbelt
2023-08-25 16:10   ` jacob navia [this message]
2023-08-25 17:03     ` Paul Koning
2023-08-25 19:44       ` jacob navia
2023-08-28  6:17         ` Jan Beulich
2023-08-28  7:04           ` jacob navia
2023-08-25 11:52 jacob navia
2023-08-25 12:00 ` Jan Beulich
2023-08-25 13:07   ` jacob navia
2023-08-25 13:30     ` Jan Beulich
2023-08-25 13:40       ` Paul Koning

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