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From: Jan Beulich <jbeulich@suse.com>
To: Nelson Chu <nelson@rivosinc.com>
Cc: Binutils <binutils@sourceware.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Andrew Waterman <andrew@sifive.com>,
	Jim Wilson <jim.wilson.gcc@gmail.com>
Subject: Re: [PATCH 2/2] RISC-V: adjust logic to avoid register name symbols
Date: Wed, 15 Mar 2023 12:49:20 +0100	[thread overview]
Message-ID: <748c1875-4bd7-da82-3012-ae742204e58c@suse.com> (raw)
In-Reply-To: <CAPpQWtA3xQtOZS6n9dMAWMhCzuFh_2gZ5q8gLkZoh31dxD5qvw@mail.gmail.com>

On 15.03.2023 11:07, Nelson Chu wrote:
> My regression schedule was a bit full lately, so I just finished
> running for this patch now.  Everything looks good when running the
> gcc/binutils regression with this patch in riscv-gnu-toolchain, the
> errors mentioned last time should be all resolved perfectly, so LGTM.

Thanks for double checking. The two patches meanwhile have become part
of a larger series, though (submitted on the 10th). I could pull this
pair ahead and commit them, but I'm not sure that's going to be best.

Jan

  reply	other threads:[~2023-03-15 11:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-13  8:01 [PATCH 0/2] RISC-V/gas: re-work register named symbols avoidance logic Jan Beulich
2023-02-13  8:02 ` [PATCH 1/2] RISC-V: test for expected / no unexpected symbols Jan Beulich
2023-02-13  8:02 ` [PATCH 2/2] RISC-V: adjust logic to avoid register name symbols Jan Beulich
2023-02-15  3:09   ` Nelson Chu
2023-02-15  8:03     ` Jan Beulich
2023-02-15  8:48       ` Nelson Chu
2023-02-15  9:21         ` Jan Beulich
2023-02-16  9:36           ` Nelson Chu
2023-02-16 16:49             ` Jan Beulich
2023-02-16 16:54               ` Palmer Dabbelt
2023-03-03 13:52             ` Jan Beulich
2023-03-15 10:07               ` Nelson Chu
2023-03-15 11:49                 ` Jan Beulich [this message]
2023-03-16  0:30                   ` Nelson Chu
2023-04-19  9:37                     ` Jan Beulich

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