* [PATCH 0/2] x86/APX: disassembler adjustments
@ 2024-01-19 11:24 Jan Beulich
2024-01-19 11:25 ` [PATCH 1/2] x86/APX: no need to have decode go through x86_64_table[] Jan Beulich
2024-01-19 11:25 ` [PATCH 2/2] x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings Jan Beulich
0 siblings, 2 replies; 3+ messages in thread
From: Jan Beulich @ 2024-01-19 11:24 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu, Lili Cui
Patch 1 carries out what I had asked for during review. Patch 2 addresses
a bug noticed in the course of doing patch 1.
1: no need to have decode go through x86_64_table[]
2: TILE{RELEASE,ZERO} have no EVEX encodings
Jan
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] x86/APX: no need to have decode go through x86_64_table[]
2024-01-19 11:24 [PATCH 0/2] x86/APX: disassembler adjustments Jan Beulich
@ 2024-01-19 11:25 ` Jan Beulich
2024-01-19 11:25 ` [PATCH 2/2] x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings Jan Beulich
1 sibling, 0 replies; 3+ messages in thread
From: Jan Beulich @ 2024-01-19 11:25 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu, Lili Cui
As suggested during review already, all such entries have their first
slot as Bad_Opcode, so by adding two more enumerators we can avoid doing
that decode step altogether.
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -821,6 +821,8 @@ enum
USE_PREFIX_TABLE,
USE_X86_64_TABLE,
USE_X86_64_EVEX_FROM_VEX_TABLE,
+ USE_X86_64_EVEX_PFX_TABLE,
+ USE_X86_64_EVEX_W_TABLE,
USE_3BYTE_TABLE,
USE_XOP_8F_TABLE,
USE_VEX_C4_TABLE,
@@ -841,6 +843,8 @@ enum
#define X86_64_TABLE(I) DIS386 (USE_X86_64_TABLE, (I))
#define X86_64_EVEX_FROM_VEX_TABLE(I) \
DIS386 (USE_X86_64_EVEX_FROM_VEX_TABLE, (I))
+#define X86_64_EVEX_PFX_TABLE(I) DIS386 (USE_X86_64_EVEX_PFX_TABLE, (I))
+#define X86_64_EVEX_W_TABLE(I) DIS386 (USE_X86_64_EVEX_W_TABLE, (I))
#define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I))
#define XOP_8F_TABLE() DIS386 (USE_XOP_8F_TABLE, 0)
#define VEX_C4_TABLE() DIS386 (USE_VEX_C4_TABLE, 0)
@@ -1317,17 +1321,6 @@ enum
X86_64_VEX_0F38EF,
X86_64_VEX_MAP7_F8_L_0_W_0_R_0,
-
- X86_64_EVEX_0F90,
- X86_64_EVEX_0F91,
- X86_64_EVEX_0F92,
- X86_64_EVEX_0F93,
- X86_64_EVEX_0F38F2,
- X86_64_EVEX_0F38F3,
- X86_64_EVEX_0F38F5,
- X86_64_EVEX_0F38F6,
- X86_64_EVEX_0F38F7,
- X86_64_EVEX_0F3AF0,
};
enum
@@ -4600,8 +4593,6 @@ static const struct dis386 x86_64_table[
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64) },
},
-
-#include "i386-dis-evex-x86-64.h"
};
static const struct dis386 three_byte_table[][256] = {
@@ -8738,6 +8729,7 @@ get_valid_dis386 (const struct dis386 *d
break;
case USE_PREFIX_TABLE:
+ use_prefix_table:
if (ins->need_vex)
{
/* The prefix in VEX is implicit. */
@@ -8808,15 +8800,23 @@ get_valid_dis386 (const struct dis386 *d
break;
case USE_X86_64_EVEX_FROM_VEX_TABLE:
+ case USE_X86_64_EVEX_PFX_TABLE:
+ case USE_X86_64_EVEX_W_TABLE:
ins->evex_type = evex_from_vex;
- /* EVEX from VEX instrucions require that EVEX.z, EVEX.L’L, EVEX.b and
- the lower 2 bits of EVEX.aaa must be 0. */
- if ((ins->vex.mask_register_specifier & 0x3) != 0
+ /* EVEX from VEX instructions are 64-bit only and require that EVEX.z,
+ EVEX.L'L, EVEX.b, and the lower 2 bits of EVEX.aaa must be 0. */
+ if (ins->address_mode != mode_64bit
+ || (ins->vex.mask_register_specifier & 0x3) != 0
|| ins->vex.ll != 0
|| ins->vex.zeroing != 0
|| ins->vex.b)
return &bad_opcode;
+ if (dp->op[0].bytemode == USE_X86_64_EVEX_PFX_TABLE)
+ goto use_prefix_table;
+ if (dp->op[0].bytemode == USE_X86_64_EVEX_W_TABLE)
+ goto use_vex_w_table;
+
/* Fall through. */
case USE_X86_64_TABLE:
vindex = ins->address_mode == mode_64bit ? 1 : 0;
@@ -9050,6 +9050,7 @@ get_valid_dis386 (const struct dis386 *d
break;
case USE_VEX_W_TABLE:
+ use_vex_w_table:
if (!ins->need_vex)
abort ();
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -164,10 +164,10 @@ static const struct dis386 evex_table[][
{ Bad_Opcode },
{ Bad_Opcode },
/* 90 */
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F90) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F91) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F92) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F93) },
+ { X86_64_EVEX_W_TABLE (VEX_W_0F90_L_0) },
+ { X86_64_EVEX_W_TABLE (VEX_W_0F91_L_0) },
+ { X86_64_EVEX_W_TABLE (VEX_W_0F92_L_0) },
+ { X86_64_EVEX_W_TABLE (VEX_W_0F93_L_0) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -565,12 +565,12 @@ static const struct dis386 evex_table[][
/* F0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F2) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F3) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F2_L_0) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F3_L_0) },
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F5) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F6) },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F7) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F5_L_0) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F6_L_0) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F7_L_0) },
/* F8 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -854,7 +854,7 @@ static const struct dis386 evex_table[][
{ Bad_Opcode },
{ Bad_Opcode },
/* F0 */
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F3AF0) },
+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F3AF0_L_0) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
--- a/opcodes/i386-dis-evex-x86-64.h
+++ /dev/null
@@ -1,50 +0,0 @@
- /* X86_64_EVEX_0F90 */
- {
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F90_L_0) },
- },
- /* X86_64_EVEX_0F91 */
- {
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F91_L_0) },
- },
- /* X86_64_EVEX_0F92 */
- {
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F92_L_0) },
- },
- /* X86_64_EVEX_0F93 */
- {
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F93_L_0) },
- },
- /* X86_64_EVEX_0F38F2 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F2_L_0) },
- },
- /* X86_64_EVEX_0F38F3 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_L_0) },
- },
- /* X86_64_EVEX_0F38F5 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F5_L_0) },
- },
- /* X86_64_EVEX_0F38F6 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE(PREFIX_VEX_0F38F6_L_0) },
- },
- /* X86_64_EVEX_0F38F7 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE(PREFIX_VEX_0F38F7_L_0) },
- },
- /* X86_64_EVEX_0F3AF0 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3AF0_L_0) },
- },
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 2/2] x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings
2024-01-19 11:24 [PATCH 0/2] x86/APX: disassembler adjustments Jan Beulich
2024-01-19 11:25 ` [PATCH 1/2] x86/APX: no need to have decode go through x86_64_table[] Jan Beulich
@ 2024-01-19 11:25 ` Jan Beulich
1 sibling, 0 replies; 3+ messages in thread
From: Jan Beulich @ 2024-01-19 11:25 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu, Lili Cui
Re-using the entire VEX decode hierarchy for the respective major opcode
has led to those two also being decoded as-if valid. Follow the earlier
USE_X86_64_EVEX_{PFX,W}_TABLE approach to avoid this happening.
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -375,9 +375,9 @@ static const struct dis386 evex_table[][
{ "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
/* 48 */
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F3849) },
+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F3849_X86_64_L_0) },
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F384B) },
+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F384B_X86_64_L_0) },
{ "vrcp14p%XW", { XM, EXx }, PREFIX_DATA },
{ "vrcp14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vrsqrt14p%XW", { XM, EXx }, 0 },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -823,6 +823,7 @@ enum
USE_X86_64_EVEX_FROM_VEX_TABLE,
USE_X86_64_EVEX_PFX_TABLE,
USE_X86_64_EVEX_W_TABLE,
+ USE_X86_64_EVEX_MEM_W_TABLE,
USE_3BYTE_TABLE,
USE_XOP_8F_TABLE,
USE_VEX_C4_TABLE,
@@ -845,6 +846,7 @@ enum
DIS386 (USE_X86_64_EVEX_FROM_VEX_TABLE, (I))
#define X86_64_EVEX_PFX_TABLE(I) DIS386 (USE_X86_64_EVEX_PFX_TABLE, (I))
#define X86_64_EVEX_W_TABLE(I) DIS386 (USE_X86_64_EVEX_W_TABLE, (I))
+#define X86_64_EVEX_MEM_W_TABLE(I) DIS386 (USE_X86_64_EVEX_MEM_W_TABLE, (I))
#define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I))
#define XOP_8F_TABLE() DIS386 (USE_XOP_8F_TABLE, 0)
#define VEX_C4_TABLE() DIS386 (USE_VEX_C4_TABLE, 0)
@@ -8802,6 +8804,7 @@ get_valid_dis386 (const struct dis386 *d
case USE_X86_64_EVEX_FROM_VEX_TABLE:
case USE_X86_64_EVEX_PFX_TABLE:
case USE_X86_64_EVEX_W_TABLE:
+ case USE_X86_64_EVEX_MEM_W_TABLE:
ins->evex_type = evex_from_vex;
/* EVEX from VEX instructions are 64-bit only and require that EVEX.z,
EVEX.L'L, EVEX.b, and the lower 2 bits of EVEX.aaa must be 0. */
@@ -8816,6 +8819,12 @@ get_valid_dis386 (const struct dis386 *d
goto use_prefix_table;
if (dp->op[0].bytemode == USE_X86_64_EVEX_W_TABLE)
goto use_vex_w_table;
+ if (dp->op[0].bytemode == USE_X86_64_EVEX_MEM_W_TABLE)
+ {
+ if (ins->modrm.mod == 3)
+ return &bad_opcode;
+ goto use_vex_w_table;
+ }
/* Fall through. */
case USE_X86_64_TABLE:
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2024-01-19 11:25 UTC | newest]
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2024-01-19 11:24 [PATCH 0/2] x86/APX: disassembler adjustments Jan Beulich
2024-01-19 11:25 ` [PATCH 1/2] x86/APX: no need to have decode go through x86_64_table[] Jan Beulich
2024-01-19 11:25 ` [PATCH 2/2] x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings Jan Beulich
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