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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH v3 2/7] x86: introduce Pass2 insn attribute
Date: Wed, 5 Oct 2022 09:22:19 +0200	[thread overview]
Message-ID: <925cb740-4e1b-abc4-8526-aaab6faae5e1@suse.com> (raw)
In-Reply-To: <20e2773a-2e47-869b-1900-709f8ad4cd6b@suse.com>

Subsequently we will want to mark templates for mnemonics which, due to
their last character also possibly being a suffix, are "shadowing" other
templates (and hence may require a second parsing pass). Introduce this
attribute in a standalone patch, largely to ease looking at the actual
later change. To simplify logic the later change is going to look for
the new attribute only on the first template of a group. Make i386-gen
warn about misplaced Pass2 (redundant ones are okay).

While there convert "active_isstring" to bool, matching the new static
variable.
---
As to redundant attributes: An open question is whether - to avoid
surprises when e.g. templates are re-ordered - it wouldn't be desirable
to add Pass2 on all templates of a group.
---
v3: New.

--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -18,6 +18,7 @@
    MA 02110-1301, USA.  */
 
 #include "sysdep.h"
+#include <stdbool.h>
 #include <stdio.h>
 #include <errno.h>
 #include "getopt.h"
@@ -702,6 +703,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (FWait),
   BITFIELD (IsString),
   BITFIELD (RegMem),
+  BITFIELD (Pass2),
   BITFIELD (BNDPrefixOk),
   BITFIELD (RegKludge),
   BITFIELD (Implicit1stXmm0),
@@ -801,7 +803,7 @@ static bitfield operand_types[] =
 
 static const char *filename;
 static i386_cpu_flags active_cpu_flags;
-static int active_isstring;
+static bool active_isstring, active_pass2;
 
 struct template_arg {
   const struct template_arg *next;
@@ -1169,7 +1171,8 @@ process_i386_opcode_modifier (FILE *tabl
   char *str, *next, *last;
   bitfield modifiers [ARRAY_SIZE (opcode_modifiers)];
 
-  active_isstring = 0;
+  active_isstring = false;
+  active_pass2 = false;
 
   /* Copy the default opcode modifier.  */
   memcpy (modifiers, opcode_modifiers, sizeof (modifiers));
@@ -1192,8 +1195,11 @@ process_i386_opcode_modifier (FILE *tabl
 
 	      set_bitfield (str, modifiers, val, ARRAY_SIZE (modifiers),
 			    lineno);
+
 	      if (strcasecmp(str, "IsString") == 0)
-		active_isstring = 1;
+		active_isstring = true;
+	      if (strcasecmp(str, "Pass2") == 0)
+		active_pass2 = true;
 
 	      if (strcasecmp(str, "W") == 0)
 		have_w = 1;
@@ -1868,6 +1874,7 @@ process_i386_opcodes (FILE *table)
   for (j = 0; j < i; j++)
     {
       struct opcode_hash_entry *next;
+      bool first_pass2 = false;
 
       for (next = opcode_array[j]; next; next = next->next)
 	{
@@ -1876,6 +1883,14 @@ process_i386_opcodes (FILE *table)
 	  lineno = next->lineno;
 	  last = str + strlen (str);
 	  output_i386_opcode (table, name, str, last, lineno);
+
+	  if (next == opcode_array[j])
+	    first_pass2 = active_pass2;
+	  else if (!first_pass2 && active_pass2)
+	    fprintf (stderr,
+		     "Warning: %s:%d: %s: "
+		     "'Pass2' is recognized only on the first template in a group\n",
+		     filename, lineno, name);
 	}
     }
 
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -504,6 +504,9 @@ enum
      Normally, it will be encoded in the reg field. We add a RegMem
      flag to indicate that it should be encoded in the regmem field.  */
   RegMem,
+  /* The (unsuffixed) mnemonic represents itself the suffixed form of another
+     mnemonic, potentially requiring a second parsing pass.  */
+  Pass2,
   /* quick test if branch instruction is MPX supported */
   BNDPrefixOk,
   /* fake an extra reg operand for clr, imul and special register
@@ -732,6 +735,7 @@ typedef struct i386_opcode_modifier
   unsigned int fwait:1;
   unsigned int isstring:2;
   unsigned int regmem:1;
+  unsigned int pass2:1;
   unsigned int bndprefixok:1;
   unsigned int regkludge:1;
   unsigned int implicit1stxmm0:1;


  parent reply	other threads:[~2022-10-05  7:22 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-05  7:19 [PATCH v3 0/7] x86: suffix handling changes Jan Beulich
2022-10-05  7:20 ` [PATCH v3 1/7] x86: constify parse_insn()'s input Jan Beulich
2022-10-05  7:22 ` Jan Beulich [this message]
2022-10-05  7:23 ` [PATCH v3 3/7] x86: re-work insn/suffix recognition Jan Beulich
2022-10-05 23:52   ` H.J. Lu
2022-10-06  6:15     ` Jan Beulich
2022-10-06  6:58       ` Jan Beulich
2022-10-06 15:28         ` H.J. Lu
2022-10-06 16:12           ` Jan Beulich
2022-10-06 18:41             ` H.J. Lu
2022-10-07 13:03               ` Jan Beulich
2022-10-05  7:24 ` [PATCH v3 4/7] x86-64: further re-work insn/suffix recognition to also cover MOVSL Jan Beulich
2022-10-11 17:44   ` H.J. Lu
2022-10-12  7:08     ` Jan Beulich
2022-10-12 17:10       ` H.J. Lu
2022-10-13  6:08         ` Jan Beulich
2022-10-13 17:00           ` H.J. Lu
2022-10-14  7:03             ` Jan Beulich
2022-10-14 17:07               ` H.J. Lu
2022-10-17  7:02                 ` Jan Beulich
2022-10-17 22:36                   ` H.J. Lu
2022-10-18  6:31                     ` Jan Beulich
2022-10-18 21:48                       ` H.J. Lu
2022-10-19  6:08                         ` Jan Beulich
2022-10-19 21:46                           ` H.J. Lu
2022-10-20 10:12                             ` Jan Beulich
2022-10-05  7:24 ` [PATCH v3 5/7] ix86: don't recognize/derive Q suffix in the common case Jan Beulich
2022-10-11 17:49   ` H.J. Lu
2022-10-05  7:25 ` [PATCH v3 6/7] x86-64: allow HLE store of accumulator to absolute 32-bit address Jan Beulich
2022-10-11 17:50   ` H.J. Lu
2022-10-05  7:25 ` [PATCH v3 7/7] x86: move bad-use-of-TLS-reloc check Jan Beulich
2022-10-11 17:57   ` H.J. Lu
2022-10-12  7:13     ` Jan Beulich
2022-10-12 17:02       ` H.J. Lu

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