From: "Cui, Lili" <lili.cui@intel.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "binutils@sourceware.org" <binutils@sourceware.org>,
"H. J. Lu" <hjl.tools@gmail.com>
Subject: RE: Enable support to Intel Key locker instructions.
Date: Tue, 22 Sep 2020 08:53:17 +0000 [thread overview]
Message-ID: <BYAPR11MB30312CC7801058E852283D369E3B0@BYAPR11MB3031.namprd11.prod.outlook.com> (raw)
In-Reply-To: <bd62d507-d8eb-df18-bf87-dfe2bc100877@suse.com>
[-- Attachment #1: Type: text/plain, Size: 4832 bytes --]
> On 21.09.2020 05:25, Cui, Lili wrote:
> > --- a/opcodes/i386-dis.c
> > +++ b/opcodes/i386-dis.c
> > @@ -691,6 +691,7 @@ enum
> > REG_0F18,
> > REG_0F1C_P_0_MOD_0,
> > REG_0F1E_P_1_MOD_3,
> > + REG_0F38D8_PREFIX_1,
> > REG_0F71,
> > REG_0F72,
> > REG_0F73,
>
> This addition wants to go further down. While not immediately visible here, ...
>
> > @@ -797,12 +798,18 @@ enum
> > MOD_VEX_0F385E_X86_64_P_1_W_0,
> > MOD_VEX_0F385E_X86_64_P_2_W_0,
> > MOD_VEX_0F385E_X86_64_P_3_W_0,
> > + MOD_0F38DC_PREFIX_1,
> > + MOD_0F38DD_PREFIX_1,
> > + MOD_0F38DE_PREFIX_1,
> > + MOD_0F38DF_PREFIX_1,
> > MOD_0F38F5,
> > MOD_0F38F6_PREFIX_0,
> > MOD_0F38F8_PREFIX_1,
> > MOD_0F38F8_PREFIX_2,
> > MOD_0F38F8_PREFIX_3,
> > MOD_0F38F9,
> > + MOD_0F38FA_PREFIX_1,
> > + MOD_0F38FB_PREFIX_1,
> > MOD_62_32BIT,
> > MOD_C4_32BIT,
> > MOD_C5_32BIT,
>
> ... in this table you'll notice that MOD_0F38* all go together, and _later_
> there's a MOD_VEX_0F38* group. I notice that recent additions (of yours?) also
> already violate this sorting model - please may I ask for this to corrected as well?
> The more outliers we have there, the more difficult will it be to maintain this
> code.
>
Hi Jan,
Thank you reviewing my patch. I put MOD_VEX_0F38* together.
Sorry, I didn't notice that there is already a MOD_VEX_0F38* group in the table,
and introduced this outlier in AMX patch.
> > @@ -2890,6 +2904,13 @@ static const struct dis386 reg_table[][8] = {
> > { "nopQ", { Ev }, 0 },
> > { RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) },
> > },
> > + /* REG_0F38D8_PREFIX_1 */
> > + {
> > + { "aesencwide128kl", { M }, 0 },
> > + { "aesdecwide128kl", { M }, 0 },
> > + { "aesencwide256kl", { M }, 0 },
> > + { "aesdecwide256kl", { M }, 0 },
> > + },
>
> As you properly omit PREFIX_OPCODE here, ...
>
> > @@ -3543,6 +3564,40 @@ static const struct dis386 prefix_table[][4] = {
> > { "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
> > },
> >
> > + /* PREFIX_0F38D8 */
> > + {
> > + { Bad_Opcode },
> > + { REG_TABLE (REG_0F38D8_PREFIX_1) }, },
> > +
> > + /* PREFIX_0F38DC */
> > + {
> > + { Bad_Opcode },
> > + { MOD_TABLE (MOD_0F38DC_PREFIX_1) },
> > + { "aesenc", { XM, EXx }, PREFIX_OPCODE },
>
> ... I wonder why you add it here (and several more times below).
> It's generally pointless to have this attribute when in prefix_table[] or already
> having gone through it. There are many pointless uses left, yes, but they're
> slowly being eliminated.
>
Done.
> > @@ -8236,6 +8319,16 @@ static const struct dis386 mod_table[][2] = {
> > /* MOD_0F38F9 */
> > { "movdiri", { Edq, Gdq }, PREFIX_OPCODE },
> > },
> > + {
> > + /* MOD_0F38FA_PREFIX_1 */
> > + { Bad_Opcode },
> > + { "encodekey128", { Gd, Ed }, PREFIX_OPCODE }, }, {
> > + /* MOD_0F38FB_PREFIX_1 */
> > + { Bad_Opcode },
> > + { "encodekey256", { Gd, Ed }, PREFIX_OPCODE }, },
>
> The use of Gd and Ed will, afaict, lead to REX.W decoding as 64-bit register
> operands, which according to doc and gas implementation looks wrong.
>
I didn't find the code we use REX.W to determine the size of register with Gd and Ed.
Could you help elaborate on it? It seems that Gd and Ed are correct.
OP_G (int bytemode, int sizeflag)
{
...
case d_mode:
case db_mode:
case dw_mode:
oappend (names32[modrm.reg + add]);
break;
$ cat y.s
.text
.byte 0xf3, 0x0f, 0x38, 0xfb, 0xd0
$ gcc -m64 -c y.s
$ binary/bin/objdump -dw y.o
Disassembly of section .text:
0000000000000000 <.text>:
0: f3 0f 38 fb d0 encodekey256 %eax,%edx
> > --- a/opcodes/i386-opc.h
> > +++ b/opcodes/i386-opc.h
> > @@ -259,6 +259,10 @@ enum
> > CpuSEV_ES,
> > /* TSXLDTRK instruction required */
> > CpuTSXLDTRK,
> > + /* KL instruction support required */ CpuKL,
> > + /* WIDEKL instruction support required */ CpuWIDEKL,
>
> May I suggest CpuWideKL? I see no need for the excess capitalization.
Yes, changed it.
>
> > +Unspecified|BaseIndex } aesdecwide256kl, 1, 0xf30f38d8, 0x3, 3,
> > +CpuWIDEKL,
> > +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
> {
> > +Unspecified|BaseIndex }
>
> ... these four need special treatment in output_insn()'s setting of
> GNU_PROPERTY_X86_FEATURE_2_XMM, due to the lack of explicit RegXMM
> operands.
>
Added it.
> I'm also not seeing why you add IgnoreSize in a number of cases. Could you
> remind me what would break without it? We're trying to eliminate stray uses,
> after all, so new ones would better not appear.
>
> Jan
IgnoreSize is redundant here, I deleted them, thanks.
Lili.
[-- Attachment #2: 0001-Enable-support-to-Intel-Keylocker-instructions.patch --]
[-- Type: application/octet-stream, Size: 28243 bytes --]
From 75f478b735753fd1562f8ff4354e28b435cb6684 Mon Sep 17 00:00:00 2001
From: Terry Guo <xuepeng.guo@intel.com>
Date: Mon, 5 Nov 2018 13:28:48 +0800
Subject: [PATCH] Enable support to Intel Keylocker instructions
gas/
* NEWS: Add Key Locker.
* config/tc-i386.c (cpu_arch): Add .kl and .wide_kl.
(cpu_noarch): Likewise.
* doc/c-i386.texi: Document kl and wide_kl.
* testsuite/gas/i386/i386.exp: Run keylocker tests.
* testsuite/gas/i386/keylocker-intel.d: New test.
* testsuite/gas/i386/keylocker.d: Likewise.
* testsuite/gas/i386/keylocker.s: Likewise.
* testsuite/gas/i386/x86-64-keylocker-intel.d: Likewise.
* testsuite/gas/i386/x86-64-keylocker.d: Likewise.
* testsuite/gas/i386/x86-64-keylocker.s: Likewise.
opcodes/
* i386-dis.c (enum): Add REG_0F38D8_PREFIX_1,
MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1,
MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1,
MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1,
PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB.
(reg_table): New instructions (see prefixes above).
(prefix_table): Likewise.
(three_byte_table): Likewise.
(mod_table): Likewise
* i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS,
CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS.
(cpu_flags): Likewise.
(operand_type_init): Likewise.
* i386-opc.h (enum): Add CpuKL and CpuWide_KL.
(i386_cpu_flags): Add cpukl and cpuwide_kl.
* i386-opc.tbl: Add KL and WIDE_KL insns.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
---
gas/NEWS | 2 +
gas/config/tc-i386.c | 10 +-
gas/doc/c-i386.texi | 5 +
gas/testsuite/gas/i386/i386.exp | 4 +
gas/testsuite/gas/i386/keylocker-intel.d | 34 +++
gas/testsuite/gas/i386/keylocker.d | 34 +++
gas/testsuite/gas/i386/keylocker.s | 33 +++
.../gas/i386/x86-64-keylocker-intel.d | 34 +++
gas/testsuite/gas/i386/x86-64-keylocker.d | 34 +++
gas/testsuite/gas/i386/x86-64-keylocker.s | 33 +++
opcodes/i386-dis.c | 215 +++++++++++++-----
opcodes/i386-gen.c | 10 +
opcodes/i386-opc.h | 6 +
opcodes/i386-opc.tbl | 16 ++
14 files changed, 408 insertions(+), 62 deletions(-)
create mode 100644 gas/testsuite/gas/i386/keylocker-intel.d
create mode 100644 gas/testsuite/gas/i386/keylocker.d
create mode 100644 gas/testsuite/gas/i386/keylocker.s
create mode 100644 gas/testsuite/gas/i386/x86-64-keylocker-intel.d
create mode 100644 gas/testsuite/gas/i386/x86-64-keylocker.d
create mode 100644 gas/testsuite/gas/i386/x86-64-keylocker.s
diff --git a/gas/NEWS b/gas/NEWS
index d709edf9b5..c1fffc618a 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for Intel Key Locker instructions.
+
* Added a .nop directive to generate a single no-op instruction in a target
neutral manner. This instruction does have an effect on DWARF line number
generation, if that is active.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index d237352fbe..60b2fea326 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1232,6 +1232,10 @@ static const arch_entry cpu_arch[] =
CPU_SEV_ES_FLAGS, 0 },
{ STRING_COMMA_LEN (".tsxldtrk"), PROCESSOR_UNKNOWN,
CPU_TSXLDTRK_FLAGS, 0 },
+ { STRING_COMMA_LEN (".kl"), PROCESSOR_UNKNOWN,
+ CPU_KL_FLAGS, 0 },
+ { STRING_COMMA_LEN (".widekl"), PROCESSOR_UNKNOWN,
+ CPU_WIDEKL_FLAGS, 0 },
};
static const noarch_entry cpu_noarch[] =
@@ -1281,6 +1285,8 @@ static const noarch_entry cpu_noarch[] =
{ STRING_COMMA_LEN ("noenqcmd"), CPU_ANY_ENQCMD_FLAGS },
{ STRING_COMMA_LEN ("noserialize"), CPU_ANY_SERIALIZE_FLAGS },
{ STRING_COMMA_LEN ("notsxldtrk"), CPU_ANY_TSXLDTRK_FLAGS },
+ { STRING_COMMA_LEN ("nokl"), CPU_ANY_KL_FLAGS },
+ { STRING_COMMA_LEN ("nowidekl"), CPU_ANY_WIDEKL_FLAGS },
};
#ifdef I386COFF
@@ -9199,7 +9205,9 @@ output_insn (void)
|| i.tm.base_opcode == 0xf77 /* emms */
|| i.tm.base_opcode == 0xf0e /* femms */)
x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_MMX;
- if ((i.xstate & xstate_xmm))
+ if ((i.xstate & xstate_xmm)
+ || i.tm.cpu_flags.bitfield.cpuwidekl
+ || i.tm.cpu_flags.bitfield.cpukl)
x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_XMM;
if ((i.xstate & xstate_ymm) == xstate_ymm)
x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_YMM;
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 64a563aacb..2bb0955b45 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -189,6 +189,10 @@ accept various extension mnemonics. For example,
@code{enqcmd},
@code{serialize},
@code{tsxldtrk},
+@code{kl},
+@code{nokl},
+@code{widekl},
+@code{nowidekl},
@code{avx512f},
@code{avx512cd},
@code{avx512er},
@@ -1504,6 +1508,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
@item @samp{.amx_int8} @tab @samp{.amx_bf16} @tab @samp{.amx_tile}
+@item @samp{.kl} @tab @samp{.widekl}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 132e5d7834..96c03a04f4 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -493,6 +493,8 @@ if [gas_32_check] then {
run_dump_test "vp2intersect"
run_dump_test "vp2intersect-intel"
run_list_test "vp2intersect-inval-bcast"
+ run_dump_test "keylocker"
+ run_dump_test "keylocker-intel"
run_list_test "avx512vl-1" "-al"
run_list_test "avx512vl-2" "-al"
run_list_test "avx512vl-ambig"
@@ -1098,6 +1100,8 @@ if [gas_64_check] then {
run_dump_test "x86-64-vp2intersect"
run_dump_test "x86-64-vp2intersect-intel"
run_list_test "x86-64-vp2intersect-inval-bcast"
+ run_dump_test "x86-64-keylocker"
+ run_dump_test "x86-64-keylocker-intel"
run_dump_test "x86-64-fence-as-lock-add-yes"
run_dump_test "x86-64-fence-as-lock-add-no"
run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/keylocker-intel.d b/gas/testsuite/gas/i386/keylocker-intel.d
new file mode 100644
index 0000000000..50061c239a
--- /dev/null
+++ b/gas/testsuite/gas/i386/keylocker-intel.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 KEYLOCKER insns (Intel disassembly)
+#source: keylocker.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey xmm6,xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey xmm6,xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl xmm2,\[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl \[edx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl \[edx\+0x7e\]
+#pass
diff --git a/gas/testsuite/gas/i386/keylocker.d b/gas/testsuite/gas/i386/keylocker.d
new file mode 100644
index 0000000000..f372a81716
--- /dev/null
+++ b/gas/testsuite/gas/i386/keylocker.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw
+#name: i386 KEYLOCKER insns
+#source: keylocker.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey %xmm2,%xmm6
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey %xmm2,%xmm6
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl 0x7e\(%edx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl 0x7e\(%edx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl 0x7e\(%edx\)
+#pass
diff --git a/gas/testsuite/gas/i386/keylocker.s b/gas/testsuite/gas/i386/keylocker.s
new file mode 100644
index 0000000000..3b8532c2bb
--- /dev/null
+++ b/gas/testsuite/gas/i386/keylocker.s
@@ -0,0 +1,33 @@
+# Check 32bit KEYLOCKER instructions
+
+ .text
+_start:
+ loadiwkey %xmm2, %xmm6
+ encodekey128 %eax, %edx
+ encodekey256 %eax, %edx
+
+ aesenc128kl 126(%edx), %xmm2
+ aesenc256kl 126(%edx), %xmm2
+ aesdec128kl 126(%edx), %xmm2
+ aesdec256kl 126(%edx), %xmm2
+
+ aesencwide128kl 126(%edx)
+ aesencwide256kl 126(%edx)
+ aesdecwide128kl 126(%edx)
+ aesdecwide256kl 126(%edx)
+
+ .intel_syntax noprefix
+
+ loadiwkey xmm6, xmm2
+ encodekey128 edx, eax
+ encodekey256 edx, eax
+
+ aesenc128kl xmm2, [edx+126]
+ aesenc256kl xmm2, [edx+126]
+ aesdec128kl xmm2, [edx+126]
+ aesdec256kl xmm2, [edx+126]
+
+ aesencwide128kl [edx+126]
+ aesencwide256kl [edx+126]
+ aesdecwide128kl [edx+126]
+ aesdecwide256kl [edx+126]
diff --git a/gas/testsuite/gas/i386/x86-64-keylocker-intel.d b/gas/testsuite/gas/i386/x86-64-keylocker-intel.d
new file mode 100644
index 0000000000..eb463eac7b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-keylocker-intel.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 KEYLOCKER insns (Intel disassembly)
+#source: x86-64-keylocker.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey xmm6,xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey xmm6,xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 edx,eax
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl xmm2,\[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl \[rdx\+0x7e\]
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl \[rdx\+0x7e\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-keylocker.d b/gas/testsuite/gas/i386/x86-64-keylocker.d
new file mode 100644
index 0000000000..a52714e3e3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-keylocker.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw
+#name: x86_64 KEYLOCKER insns
+#source: x86-64-keylocker.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey %xmm2,%xmm6
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc f2[ ]*loadiwkey %xmm2,%xmm6
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fa d0[ ]*encodekey128 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 fb d0[ ]*encodekey256 %eax,%edx
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dc 52 7e[ ]*aesenc128kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 de 52 7e[ ]*aesenc256kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 dd 52 7e[ ]*aesdec128kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 df 52 7e[ ]*aesdec256kl 0x7e\(%rdx\),%xmm2
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 42 7e[ ]*aesencwide128kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 52 7e[ ]*aesencwide256kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 4a 7e[ ]*aesdecwide128kl 0x7e\(%rdx\)
+[ ]*[a-f0-9]+:[ ]*f3 0f 38 d8 5a 7e[ ]*aesdecwide256kl 0x7e\(%rdx\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-keylocker.s b/gas/testsuite/gas/i386/x86-64-keylocker.s
new file mode 100644
index 0000000000..d55fe03197
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-keylocker.s
@@ -0,0 +1,33 @@
+# Check 64bit AVX512VBMI2 instructions
+
+ .text
+_start:
+ loadiwkey %xmm2, %xmm6
+ encodekey128 %eax, %edx
+ encodekey256 %eax, %edx
+
+ aesenc128kl 126(%rdx), %xmm2
+ aesenc256kl 126(%rdx), %xmm2
+ aesdec128kl 126(%rdx), %xmm2
+ aesdec256kl 126(%rdx), %xmm2
+
+ aesencwide128kl 126(%rdx)
+ aesencwide256kl 126(%rdx)
+ aesdecwide128kl 126(%rdx)
+ aesdecwide256kl 126(%rdx)
+
+ .intel_syntax noprefix
+
+ loadiwkey xmm6, xmm2
+ encodekey128 edx, eax
+ encodekey256 edx, eax
+
+ aesenc128kl xmm2, [rdx+126]
+ aesenc256kl xmm2, [rdx+126]
+ aesdec128kl xmm2, [rdx+126]
+ aesdec256kl xmm2, [rdx+126]
+
+ aesencwide128kl [rdx+126]
+ aesencwide256kl [rdx+126]
+ aesdecwide128kl [rdx+126]
+ aesdecwide256kl [rdx+126]
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6d803258ef..c0709a0b97 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -691,6 +691,7 @@ enum
REG_0F18,
REG_0F1C_P_0_MOD_0,
REG_0F1E_P_1_MOD_3,
+ REG_0F38D8_PREFIX_1,
REG_0F71,
REG_0F72,
REG_0F73,
@@ -786,23 +787,18 @@ enum
MOD_0FE7_PREFIX_2,
MOD_0FF0_PREFIX_3,
MOD_0F382A,
- MOD_VEX_0F3849_X86_64_P_0_W_0,
- MOD_VEX_0F3849_X86_64_P_2_W_0,
- MOD_VEX_0F3849_X86_64_P_3_W_0,
- MOD_VEX_0F384B_X86_64_P_1_W_0,
- MOD_VEX_0F384B_X86_64_P_2_W_0,
- MOD_VEX_0F384B_X86_64_P_3_W_0,
- MOD_VEX_0F385C_X86_64_P_1_W_0,
- MOD_VEX_0F385E_X86_64_P_0_W_0,
- MOD_VEX_0F385E_X86_64_P_1_W_0,
- MOD_VEX_0F385E_X86_64_P_2_W_0,
- MOD_VEX_0F385E_X86_64_P_3_W_0,
+ MOD_0F38DC_PREFIX_1,
+ MOD_0F38DD_PREFIX_1,
+ MOD_0F38DE_PREFIX_1,
+ MOD_0F38DF_PREFIX_1,
MOD_0F38F5,
MOD_0F38F6_PREFIX_0,
MOD_0F38F8_PREFIX_1,
MOD_0F38F8_PREFIX_2,
MOD_0F38F8_PREFIX_3,
MOD_0F38F9,
+ MOD_0F38FA_PREFIX_1,
+ MOD_0F38FB_PREFIX_1,
MOD_62_32BIT,
MOD_C4_32BIT,
MOD_C5_32BIT,
@@ -884,7 +880,18 @@ enum
MOD_VEX_0F382D,
MOD_VEX_0F382E,
MOD_VEX_0F382F,
+ MOD_VEX_0F3849_X86_64_P_0_W_0,
+ MOD_VEX_0F3849_X86_64_P_2_W_0,
+ MOD_VEX_0F3849_X86_64_P_3_W_0,
+ MOD_VEX_0F384B_X86_64_P_1_W_0,
+ MOD_VEX_0F384B_X86_64_P_2_W_0,
+ MOD_VEX_0F384B_X86_64_P_3_W_0,
MOD_VEX_0F385A,
+ MOD_VEX_0F385C_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_0_W_0,
+ MOD_VEX_0F385E_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_2_W_0,
+ MOD_VEX_0F385E_X86_64_P_3_W_0,
MOD_VEX_0F388C,
MOD_VEX_0F388E,
MOD_VEX_0F3A30_L_0,
@@ -1011,10 +1018,17 @@ enum
PREFIX_0FE7,
PREFIX_0FF0,
PREFIX_0FF7,
+ PREFIX_0F38D8,
+ PREFIX_0F38DC,
+ PREFIX_0F38DD,
+ PREFIX_0F38DE,
+ PREFIX_0F38DF,
PREFIX_0F38F0,
PREFIX_0F38F1,
PREFIX_0F38F6,
PREFIX_0F38F8,
+ PREFIX_0F38FA,
+ PREFIX_0F38FB,
PREFIX_VEX_0F10,
PREFIX_VEX_0F11,
PREFIX_VEX_0F12,
@@ -2890,6 +2904,13 @@ static const struct dis386 reg_table[][8] = {
{ "nopQ", { Ev }, 0 },
{ RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) },
},
+ /* REG_0F38D8_PREFIX_1 */
+ {
+ { "aesencwide128kl", { M }, 0 },
+ { "aesdecwide128kl", { M }, 0 },
+ { "aesencwide256kl", { M }, 0 },
+ { "aesdecwide256kl", { M }, 0 },
+ },
/* REG_0F71 */
{
{ Bad_Opcode },
@@ -3543,6 +3564,40 @@ static const struct dis386 prefix_table[][4] = {
{ "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
},
+ /* PREFIX_0F38D8 */
+ {
+ { Bad_Opcode },
+ { REG_TABLE (REG_0F38D8_PREFIX_1) },
+ },
+
+ /* PREFIX_0F38DC */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DC_PREFIX_1) },
+ { "aesenc", { XM, EXx }, 0 },
+ },
+
+ /* PREFIX_0F38DD */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DD_PREFIX_1) },
+ { "aesenclast", { XM, EXx }, 0 },
+ },
+
+ /* PREFIX_0F38DE */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DE_PREFIX_1) },
+ { "aesdec", { XM, EXx }, 0 },
+ },
+
+ /* PREFIX_0F38DF */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DF_PREFIX_1) },
+ { "aesdeclast", { XM, EXx }, 0 },
+ },
+
/* PREFIX_0F38F0 */
{
{ "movbeS", { Gv, Mv }, PREFIX_OPCODE },
@@ -3574,6 +3629,17 @@ static const struct dis386 prefix_table[][4] = {
{ MOD_TABLE (MOD_0F38F8_PREFIX_2) },
{ MOD_TABLE (MOD_0F38F8_PREFIX_3) },
},
+ /* PREFIX_0F38FA */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38FA_PREFIX_1) },
+ },
+
+ /* PREFIX_0F38FB */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38FB_PREFIX_1) },
+ },
/* PREFIX_VEX_0F10 */
{
@@ -4434,14 +4500,14 @@ static const struct dis386 three_byte_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* d8 */
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_0F38D8) },
{ Bad_Opcode },
{ Bad_Opcode },
{ "aesimc", { XM, EXx }, PREFIX_DATA },
- { "aesenc", { XM, EXx }, PREFIX_DATA },
- { "aesenclast", { XM, EXx }, PREFIX_DATA },
- { "aesdec", { XM, EXx }, PREFIX_DATA },
- { "aesdeclast", { XM, EXx }, PREFIX_DATA },
+ { PREFIX_TABLE (PREFIX_0F38DC) },
+ { PREFIX_TABLE (PREFIX_0F38DD) },
+ { PREFIX_TABLE (PREFIX_0F38DE) },
+ { PREFIX_TABLE (PREFIX_0F38DF) },
/* e0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -4472,8 +4538,8 @@ static const struct dis386 three_byte_table[][256] = {
/* f8 */
{ PREFIX_TABLE (PREFIX_0F38F8) },
{ MOD_TABLE (MOD_0F38F9) },
- { Bad_Opcode },
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_0F38FA) },
+ { PREFIX_TABLE (PREFIX_0F38FB) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -8162,55 +8228,21 @@ static const struct dis386 mod_table[][2] = {
{ "movntdqa", { XM, Mx }, PREFIX_DATA },
},
{
- /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
- { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
- },
- {
- /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
+ /* MOD_0F38DC_PREFIX_1 */
+ { "aesenc128kl", { XM, M }, 0 },
+ { "loadiwkey", { XM, EXx }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
+ /* MOD_0F38DD_PREFIX_1 */
+ { "aesdec128kl", { XM, M }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
+ /* MOD_0F38DE_PREFIX_1 */
+ { "aesenc256kl", { XM, M }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
+ /* MOD_0F38DF_PREFIX_1 */
+ { "aesdec256kl", { XM, M }, 0 },
},
{
/* MOD_0F38F5 */
@@ -8236,6 +8268,16 @@ static const struct dis386 mod_table[][2] = {
/* MOD_0F38F9 */
{ "movdiri", { Edq, Gdq }, PREFIX_OPCODE },
},
+ {
+ /* MOD_0F38FA_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey128", { Gd, Ed }, 0 },
+ },
+ {
+ /* MOD_0F38FB_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey256", { Gd, Ed }, 0 },
+ },
{
/* MOD_62_32BIT */
{ "bound{S|}", { Gv, Ma }, 0 },
@@ -8626,10 +8668,61 @@ static const struct dis386 mod_table[][2] = {
/* MOD_VEX_0F382F */
{ VEX_W_TABLE (VEX_W_0F382F_M_0) },
},
+ {
+ /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
+ { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
+ },
+ {
+ /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
+ },
{
/* MOD_VEX_0F385A */
{ VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
},
+ {
+ /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
+ },
{
/* MOD_VEX_0F388C */
{ "vpmaskmov%DQ", { XM, Vex, Mx }, PREFIX_DATA },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 3334155071..3cee219df2 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -321,6 +321,10 @@ static initializer cpu_flag_init[] =
"CpuSEV_ES" },
{ "CPU_TSXLDTRK_FLAGS",
"CpuTSXLDTRK"},
+ { "CPU_KL_FLAGS",
+ "CpuKL" },
+ { "CPU_WIDEKL_FLAGS",
+ "CpuWideKL" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
@@ -407,6 +411,10 @@ static initializer cpu_flag_init[] =
"CpuAVX512_VP2INTERSECT" },
{ "CPU_ANY_TSXLDTRK_FLAGS",
"CpuTSXLDTRK" },
+ { "CPU_ANY_KL_FLAGS",
+ "CpuKL|CpuWideKL" },
+ { "CPU_ANY_WIDEKL_FLAGS",
+ "CpuWideKL" },
};
static initializer operand_type_init[] =
@@ -636,6 +644,8 @@ static bitfield cpu_flags[] =
BITFIELD (CpuMCOMMIT),
BITFIELD (CpuSEV_ES),
BITFIELD (CpuTSXLDTRK),
+ BITFIELD (CpuKL),
+ BITFIELD (CpuWideKL),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 09ee615db1..4c68cb746c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -259,6 +259,10 @@ enum
CpuSEV_ES,
/* TSXLDTRK instruction required */
CpuTSXLDTRK,
+ /* KL instruction support required */
+ CpuKL,
+ /* WideKL instruction support required */
+ CpuWideKL,
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
@@ -396,6 +400,8 @@ typedef union i386_cpu_flags
unsigned int cpumcommit:1;
unsigned int cpusev_es:1;
unsigned int cputsxldtrk:1;
+ unsigned int cpukl:1;
+ unsigned int cpuwidekl:1;
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 181d0df1ce..001459cb1b 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -4117,3 +4117,19 @@ tilerelease, 0, 0x49c0, None, 2, CpuAMX_TILE|Cpu64, Vex128|VexOpcode=1|VexW0|No_
tilezero, 1, 0xf249, None, 1, CpuAMX_TILE|Cpu64, Modrm|Vex128|VexOpcode=1|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM }
// AMX instructions end.
+
+// KEYLOCKER instructions.
+
+loadiwkey, 2, 0xf30f38dc, None, 3, CpuKL, Load|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, RegXMM }
+encodekey128, 2, 0xf30f38fa, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg32, Reg32 }
+encodekey256, 2, 0xf30f38fb, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg32, Reg32 }
+aesenc128kl, 2, 0xf30f38dc, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex, RegXMM }
+aesdec128kl, 2, 0xf30f38dd, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex, RegXMM }
+aesenc256kl, 2, 0xf30f38de, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex, RegXMM }
+aesdec256kl, 2, 0xf30f38df, None, 3, CpuKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex, RegXMM }
+aesencwide128kl, 1, 0xf30f38d8, 0x0, 3, CpuWideKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+aesdecwide128kl, 1, 0xf30f38d8, 0x1, 3, CpuWideKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+aesencwide256kl, 1, 0xf30f38d8, 0x2, 3, CpuWideKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+aesdecwide256kl, 1, 0xf30f38d8, 0x3, 3, CpuWideKL, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
+
+// KEYLOCKER instructions end.
--
2.17.1
next prev parent reply other threads:[~2020-09-22 8:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-21 3:25 Cui, Lili
2020-09-21 3:42 ` H.J. Lu
2020-09-21 8:40 ` Cui, Lili
2020-09-21 9:18 ` Jan Beulich
2020-09-22 8:53 ` Cui, Lili [this message]
2020-09-22 16:08 ` Jan Beulich
2020-09-22 16:14 ` H.J. Lu
2020-09-23 2:09 ` Cui, Lili
2020-09-23 2:23 ` H.J. Lu
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