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* [PATCH v1] binutils/doc: Document the RISC-V -M options
@ 2022-02-24 18:30 Palmer Dabbelt
  2022-02-25  0:59 ` Nelson Chu
  0 siblings, 1 reply; 2+ messages in thread
From: Palmer Dabbelt @ 2022-02-24 18:30 UTC (permalink / raw)
  To: binutils

These have been around for quite a while now, but we forgot to actually
document them.

	* doc/binutils.texi (-M): New section on RISC-V options.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 binutils/doc/binutils.texi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index 288974be386..bfb5a6199ca 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -2693,6 +2693,19 @@ rather than names, for the selected types of registers.
 You can list the available values of @var{ABI} and @var{ARCH} using
 the @option{--help} option.
 
+For RISC-V, this option controls how instructions are disassembled.  This
+option can be provided multiple times, each time with a comma separated list
+containing one or more of the following entries:
+
+@table @code
+@item no-aliases
+Avoid printing pseudo instruction mnemonics.
+
+@item numeric
+Use numeric register names (ie, x1) instead of ABI register names (ie, ra) when
+printing instructions.
+@end table
+
 For VAX, you can specify function entry addresses with @option{-M
 entry:0xf00ba}.  You can use this multiple times to properly
 disassemble VAX binary files that don't contain symbol tables (like
-- 
2.34.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH v1] binutils/doc: Document the RISC-V -M options
  2022-02-24 18:30 [PATCH v1] binutils/doc: Document the RISC-V -M options Palmer Dabbelt
@ 2022-02-25  0:59 ` Nelson Chu
  0 siblings, 0 replies; 2+ messages in thread
From: Nelson Chu @ 2022-02-25  0:59 UTC (permalink / raw)
  To: Palmer Dabbelt; +Cc: Binutils

On Fri, Feb 25, 2022 at 2:32 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> These have been around for quite a while now, but we forgot to actually
> document them.

LGTM, thanks!

Nelson

>         * doc/binutils.texi (-M): New section on RISC-V options.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  binutils/doc/binutils.texi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
> index 288974be386..bfb5a6199ca 100644
> --- a/binutils/doc/binutils.texi
> +++ b/binutils/doc/binutils.texi
> @@ -2693,6 +2693,19 @@ rather than names, for the selected types of registers.
>  You can list the available values of @var{ABI} and @var{ARCH} using
>  the @option{--help} option.
>
> +For RISC-V, this option controls how instructions are disassembled.  This
> +option can be provided multiple times, each time with a comma separated list
> +containing one or more of the following entries:
> +
> +@table @code
> +@item no-aliases
> +Avoid printing pseudo instruction mnemonics.
> +
> +@item numeric
> +Use numeric register names (ie, x1) instead of ABI register names (ie, ra) when
> +printing instructions.
> +@end table
> +
>  For VAX, you can specify function entry addresses with @option{-M
>  entry:0xf00ba}.  You can use this multiple times to properly
>  disassemble VAX binary files that don't contain symbol tables (like
> --
> 2.34.1
>

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2022-02-24 18:30 [PATCH v1] binutils/doc: Document the RISC-V -M options Palmer Dabbelt
2022-02-25  0:59 ` Nelson Chu

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