* [PATCH v1 1/1] opcodes: microblaze: Add hibernate and suspend instructions
@ 2023-09-28 4:19 Neal Frager
2023-10-03 13:55 ` Frager, Neal
0 siblings, 1 reply; 2+ messages in thread
From: Neal Frager @ 2023-09-28 4:19 UTC (permalink / raw)
To: binutils
Cc: ibai.erkiaga-elorza, nagaraju.mekala, mark.hatle,
sadanand.mutyala, appa.rao.nali, vidhumouli.hunsigida,
luca.ceresoli, Neal Frager
This patch adds the MicroBlaze hibernate and suspend instructions.
Further documentation of these instructions can be found here:
https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref
This patch also re-adds the clz, mbar, sleep, swapb and swaph
instructions which were missing from the MicroBlaze instruction
list for some reason.
Signed-off-by: Neal Frager <neal.frager@amd.com>
---
opcodes/microblaze-opc.h | 2 ++
opcodes/microblaze-opcm.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
index 7c70c80a27b..6b9701bb67c 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -405,6 +405,8 @@ const struct op_code_struct
{"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst },
{"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst },
{"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */
+ {"hibernate", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 8. */
+ {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */
{"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst },
{"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
{"", 0, 0, 0, 0, 0, 0, 0, 0},
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
index 92c245dc0fd..95c64fd7b00 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -59,6 +59,7 @@ enum microblaze_instr
aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
+ clz, mbar, sleep, hibernate, suspend, swapb, swaph,
invalid_inst
};
--
2.25.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* RE: [PATCH v1 1/1] opcodes: microblaze: Add hibernate and suspend instructions
2023-09-28 4:19 [PATCH v1 1/1] opcodes: microblaze: Add hibernate and suspend instructions Neal Frager
@ 2023-10-03 13:55 ` Frager, Neal
0 siblings, 0 replies; 2+ messages in thread
From: Frager, Neal @ 2023-10-03 13:55 UTC (permalink / raw)
To: binutils, Nick Clifton
Cc: Erkiaga Elorza, Ibai, Mekala, Nagaraju, Hatle, Mark, Mutyala,
Sadanand, Nali, Appa Rao, Hunsigida, Vidhumouli, luca.ceresoli,
Frager, Neal
> This patch adds the MicroBlaze hibernate and suspend instructions.
> Further documentation of these instructions can be found here:
> https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref
> This patch also re-adds the clz, mbar, sleep, swapb and swaph instructions which were missing from the MicroBlaze instruction list for some reason.
> Signed-off-by: Neal Frager <neal.frager@amd.com>
> ---
> opcodes/microblaze-opc.h | 2 ++
> opcodes/microblaze-opcm.h | 1 +
> 2 files changed, 3 insertions(+)
> diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h index 7c70c80a27b..6b9701bb67c 100644
> --- a/opcodes/microblaze-opc.h
> +++ b/opcodes/microblaze-opc.h
> @@ -405,6 +405,8 @@ const struct op_code_struct
> {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst },
> {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst },
> {"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */
> + {"hibernate", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 8. */
> + {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */
> {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst },
> {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
> {"", 0, 0, 0, 0, 0, 0, 0, 0},
> diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h index 92c245dc0fd..95c64fd7b00 100644
> --- a/opcodes/microblaze-opcm.h
> +++ b/opcodes/microblaze-opcm.h
> @@ -59,6 +59,7 @@ enum microblaze_instr
> aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
> eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
> eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
> + clz, mbar, sleep, hibernate, suspend, swapb, swaph,
> invalid_inst
> };
Hi Nick,
Have you had a chance to review this patch?
Thank you for your support!
Best regards,
Neal Frager
AMD
^ permalink raw reply [flat|nested] 2+ messages in thread
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