* RE: Constraints between operands
@ 2005-09-09 9:08 Will Newton
2005-09-21 15:39 ` Doug Evans
0 siblings, 1 reply; 5+ messages in thread
From: Will Newton @ 2005-09-09 9:08 UTC (permalink / raw)
To: Frank Ch. Eigler; +Cc: cgen
> > [...]
> > I'm using cgen to write a binutils port for a processor. I've come
> > across a problem I haven't been able to solve yet with expressing a
> > constraint between a number of fields in an instruction.
> > [...]
> > ADD D0.1,D0.2 ; Data unit 0 for both regs, OK ADD D0.1,D1.2 ; Data
> > unit mismatch, error!
> > [...]
>
> One way may be to write a custom operand parser for the
> second D slot, which would enforce this constraint. It would
> signal a parse error.
I could not see an easy way to reference a previous field. The prototype
of parse handlers is like:
static const char *
parse_hi16 (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd; /* CPU description */
const char **strp; /* Current position in input
text */
int opindex; /* ??? */
unsigned long *valuep; /* Result */
In order to find what the previous operand's data unit was the only way
I can see is to rewind strp and parse the input text, which may or may
not work and seems quite nasty. Or is there an easier way?
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: Constraints between operands
2005-09-09 9:08 Constraints between operands Will Newton
@ 2005-09-21 15:39 ` Doug Evans
0 siblings, 0 replies; 5+ messages in thread
From: Doug Evans @ 2005-09-21 15:39 UTC (permalink / raw)
To: Will Newton; +Cc: Frank Ch. Eigler, cgen
Will Newton writes:
>
> > > [...]
> > > I'm using cgen to write a binutils port for a processor. I've come
> > > across a problem I haven't been able to solve yet with expressing a
> > > constraint between a number of fields in an instruction.
> > > [...]
> > > ADD D0.1,D0.2 ; Data unit 0 for both regs, OK ADD D0.1,D1.2 ; Data
> > > unit mismatch, error!
> > > [...]
> >
> > One way may be to write a custom operand parser for the
> > second D slot, which would enforce this constraint. It would
> > signal a parse error.
Another alternative I've seen is to specify a special operand at the
end whose sole purpose is to validate the insn. It's at the end so it
has a view of the entire insn.
> I could not see an easy way to reference a previous field. The prototype
> of parse handlers is like:
>
> static const char *
> parse_hi16 (cd, strp, opindex, valuep)
> CGEN_CPU_DESC cd; /* CPU description */
> const char **strp; /* Current position in input
> text */
> int opindex; /* ??? */
> unsigned long *valuep; /* Result */
>
> In order to find what the previous operand's data unit was the only way
> I can see is to rewind strp and parse the input text, which may or may
> not work and seems quite nasty. Or is there an easier way?
I was going to say have either a special "parse" or "insert" handler.
I seem to recall other instances where I needed to validate two
operands against each other, but I can't find one at the moment.
At any rate, you're right, the parse handler isn't passed sufficient info.
If I can't find an existing example I think we need to extend cgen.
e.g. pass the fields struct to either or both of the parse and insert
handlers.
Comments folks?
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: Constraints between operands
@ 2005-09-21 16:03 Will Newton
0 siblings, 0 replies; 5+ messages in thread
From: Will Newton @ 2005-09-21 16:03 UTC (permalink / raw)
To: Doug Evans; +Cc: Frank Ch. Eigler, cgen
> I was going to say have either a special "parse" or "insert" handler.
> I seem to recall other instances where I needed to validate
> two operands against each other, but I can't find one at the moment.
> At any rate, you're right, the parse handler isn't passed
> sufficient info.
>
> If I can't find an existing example I think we need to extend cgen.
> e.g. pass the fields struct to either or both of the parse
> and insert handlers.
>
> Comments folks?
One thing that would seem useful is to be able to parse things easily
extending the existing infrastructure. I have come across two minor
instances where it could be useful to do this.
1. One of our addressing modes looks like this:
GETD Reg1, [Reg2+#0x20++] ; Reg2+offset, post-increment Reg2
It is not possible to parse this using the builtin integer parser, it
barfs on the trailing ++. I implemented a parse handler for the integer
value and ended up using strtol, it would be nice if I could perhaps
pass an end pointer or length argument to cgen_parse_unsigned_integer to
tell it where to stop parsing and use that instead. Maybe this isn't
possible, it's not that big an issue.
2. To parse a register in a custom handler I ended up doing this:
CGEN_OPERAND oper = meta_cgen_operand_table[opindex];
int i;
CGEN_KEYWORD *reg_names = NULL;
for (i = 0; i < HW_MAX; i++)
{
if (meta_cgen_hw_table[i].type == oper.hw_type)
{
reg_names = (CGEN_KEYWORD *)meta_cgen_hw_table[i].asm_data;
}
}
if (reg_names == NULL)
return "internal error";
errmsg = cgen_parse_keyword (cd, strp, reg_names, valuep);
Which is a little bit of a roundabout way to get something that perhaps
I should already have.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Constraints between operands
2005-09-08 13:56 Will Newton
@ 2005-09-08 20:28 ` Frank Ch. Eigler
0 siblings, 0 replies; 5+ messages in thread
From: Frank Ch. Eigler @ 2005-09-08 20:28 UTC (permalink / raw)
To: Will Newton; +Cc: cgen
Hi -
On Thu, Sep 08, 2005 at 02:55:16PM +0100, Will Newton wrote:
> [...]
> I'm using cgen to write a binutils port for a processor. I've come
> across a problem I haven't been able to solve yet with expressing a
> constraint between a number of fields in an instruction.
> [...]
> ADD D0.1,D0.2 ; Data unit 0 for both regs, OK
> ADD D0.1,D1.2 ; Data unit mismatch, error!
> [...]
One way may be to write a custom operand parser for the second D slot,
which would enforce this constraint. It would signal a parse error.
- FChE
^ permalink raw reply [flat|nested] 5+ messages in thread
* Constraints between operands
@ 2005-09-08 13:56 Will Newton
2005-09-08 20:28 ` Frank Ch. Eigler
0 siblings, 1 reply; 5+ messages in thread
From: Will Newton @ 2005-09-08 13:56 UTC (permalink / raw)
To: cgen
I'm using cgen to write a binutils port for a processor. I've come
across a problem I haven't been able to solve yet with expressing a
constraint between a number of fields in an instruction.
The instruction is encoded like this:
Bit 24: Data Unit Specifier
Bits 23-19: Destination Register
Bites 18-14: Source Register
(other bits omitted for simplicity)
The data unit bit specifies with set of registers this instruction
operates on. I have modelled this as a multi field for each register.
However I need to ensure that the assembler only allows destination and
source registers from the same unit to be specified and gives an error
otherwise, e.g.:
ADD D0.1,D0.2 ; Data unit 0 for both regs, OK
ADD D0.1,D1.2 ; Data unit mismatch, error!
Is there a way to express this with cgen? I have tried using (error) to
notify the user about this but cgen_rtx_error is not defined by opcodes
and I don't really know if it's possible to define it appropriately.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2005-09-09 9:08 Constraints between operands Will Newton
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2005-09-08 20:28 ` Frank Ch. Eigler
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