Next Step

Next Step

[Shehryar Humayun]

Hi,

I am trying to run cgen to mimic the opcodes file
generation process, for m32r, from scratch. I have
installed guile-1.4.1 and ran it from the cgen source
directory. Following steps completed successfully:

1. load dev.scm
2. load-opc
3. cload #:arch "m32r"

At the end of step 3, I get a message "Done analysis"
and I get the prompt "guile>". 
Porting guide for CGEN says that next step  is to 
"run generators until output looks reasonable, e.g.
(cgen-opc.c)"

My questions:
- What is meant by "generator". Is it .scm files in
cgen source directory we are talking about?
- How exactly do I implement this phrase "until output
looks reasonable" in the statement? What should I
write at guile prompt? What is the criteria for
reasonable output?
- Where are the output files located e.g.
cgen-opc.[ch], cgen-desc.[ch]?

I know these are basic level questions but, "It is
always good to ask", they say.
Hoping for an early response, beed it badly!

Regards

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Re: Next Step

[Ben Elliston]

Hi.

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> At the end of step 3, I get a message "Done analysis"
  Shehryar> and I get the prompt "guile>". 
  Shehryar> Porting guide for CGEN says that next step  is to 
  Shehryar> "run generators until output looks reasonable, e.g.
  Shehryar> (cgen-opc.c)"

  Shehryar> - What is meant by "generator". Is it .scm files in
  Shehryar> cgen source directory we are talking about?

Yes.

  Shehryar> - How exactly do I implement this phrase "until output
  Shehryar> looks reasonable" in the statement? What should I
  Shehryar> write at guile prompt? What is the criteria for
  Shehryar> reasonable output?

You should not bother running cgen in this tedious way.  If you are
doing an opcodes port, use the infrastructure in place in the
src/opcodes/Makefile.{am,in} to run CGEN for you.  I think this point
has been discussed before.

  Shehryar> - Where are the output files located e.g.
  Shehryar> cgen-opc.[ch], cgen-desc.[ch]?

I believe there is an application-switch to specify where the
generated files should go.  Again, this is handled for you by the
opcodes Makefile.

  Shehryar> Hoping for an early response, beed it badly!

Sorry it took so long -- it was a three-day weekend.

Ben

Re: Next Step

[Shehryar Humayun]

Hi, 
Thanks for the response. It worked out quite well. I
have been able to generate 8 opcodes support files for
m32r as well as fr30. Just one thing, When I invoke
the make process, in the end it prints:

Generating m32r-opc.h
Generating m32r-opc.c
...

When the make process terminates, the files generated
are named tmp-opc.c, tmp-opc.h, tmp-*.*, rather than
m32r-*.c. Is this okay? Moreover, the files do not
contain the name of the architecture e.g. m32r, rather
<arch> is written every where in the file. Is this thw
way it is supposed to be?
Regards

--- Ben Elliston <bje@redhat.com> wrote:
> Hi.
> 
> >>>>> "Shehryar" == Shehryar Humayun
> <shehryarhumayunkhan@yahoo.com> writes:
> 
>   Shehryar> At the end of step 3, I get a message
> "Done analysis"
>   Shehryar> and I get the prompt "guile>". 
>   Shehryar> Porting guide for CGEN says that next
> step  is to 
>   Shehryar> "run generators until output looks
> reasonable, e.g.
>   Shehryar> (cgen-opc.c)"
> 
>   Shehryar> - What is meant by "generator". Is it
> .scm files in
>   Shehryar> cgen source directory we are talking
> about?
> 
> Yes.
> 
>   Shehryar> - How exactly do I implement this phrase
> "until output
>   Shehryar> looks reasonable" in the statement? What
> should I
>   Shehryar> write at guile prompt? What is the
> criteria for
>   Shehryar> reasonable output?
> 
> You should not bother running cgen in this tedious
> way.  If you are
> doing an opcodes port, use the infrastructure in
> place in the
> src/opcodes/Makefile.{am,in} to run CGEN for you.  I
> think this point
> has been discussed before.
> 
>   Shehryar> - Where are the output files located
> e.g.
>   Shehryar> cgen-opc.[ch], cgen-desc.[ch]?
> 
> I believe there is an application-switch to specify
> where the
> generated files should go.  Again, this is handled
> for you by the
> opcodes Makefile.
> 
>   Shehryar> Hoping for an early response, beed it
> badly!
> 
> Sorry it took so long -- it was a three-day weekend.
> 
> Ben


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Re: Next Step

[Shehryar Humayun]

Hi, 
Thanks for the response. It worked out quite well. I
have been able to generate 8 opcodes support files for
m32r as well as fr30. Just one thing, When I invoke
the make process, in the end it prints:

Generating m32r-opc.h
Generating m32r-opc.c
...

When the make process terminates, the files generated
are named tmp-opc.c, tmp-opc.h, tmp-*.*, rather than
m32r-*.c. Is this okay? Moreover, the files do not
contain the name of the architecture e.g. m32r, rather
<arch> is written every where in the file. Is this thw
way it is supposed to be?
Regards

--- Ben Elliston <bje@redhat.com> wrote:
> Hi.
> 
> >>>>> "Shehryar" == Shehryar Humayun
> <shehryarhumayunkhan@yahoo.com> writes:
> 
>   Shehryar> At the end of step 3, I get a message
> "Done analysis"
>   Shehryar> and I get the prompt "guile>". 
>   Shehryar> Porting guide for CGEN says that next
> step  is to 
>   Shehryar> "run generators until output looks
> reasonable, e.g.
>   Shehryar> (cgen-opc.c)"
> 
>   Shehryar> - What is meant by "generator". Is it
> .scm files in
>   Shehryar> cgen source directory we are talking
> about?
> 
> Yes.
> 
>   Shehryar> - How exactly do I implement this phrase
> "until output
>   Shehryar> looks reasonable" in the statement? What
> should I
>   Shehryar> write at guile prompt? What is the
> criteria for
>   Shehryar> reasonable output?
> 
> You should not bother running cgen in this tedious
> way.  If you are
> doing an opcodes port, use the infrastructure in
> place in the
> src/opcodes/Makefile.{am,in} to run CGEN for you.  I
> think this point
> has been discussed before.
> 
>   Shehryar> - Where are the output files located
> e.g.
>   Shehryar> cgen-opc.[ch], cgen-desc.[ch]?
> 
> I believe there is an application-switch to specify
> where the
> generated files should go.  Again, this is handled
> for you by the
> opcodes Makefile.
> 
>   Shehryar> Hoping for an early response, beed it
> badly!
> 
> Sorry it took so long -- it was a three-day weekend.
> 
> Ben


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Re: Next Step

[Ben Elliston]

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> When the make process terminates, the files generated
  Shehryar> are named tmp-opc.c, tmp-opc.h, tmp-*.*, rather than
  Shehryar> m32r-*.c. Is this okay? Moreover, the files do not
  Shehryar> contain the name of the architecture e.g. m32r, rather
  Shehryar> <arch> is written every where in the file. Is this thw
  Shehryar> way it is supposed to be?

No, that doesn't sound right.  It sounds like you've not specified the
file prefixes and symbol prefixes correctly.  Can you post the
commands you used to generate the 8 files?

Ben

Re: Next Step

[Shehryar Humayun]

Here are the steps I followed:

1. I created a temporary build directory and cd to it.
2. In it, I wrote
"/root/src/cgen-1.0/configure --target=m32r
srcdir=/root/src/cgen-1.0/cgen/"

3. After the configuration process, I wrote
"make opcodes ARCH=m32r"

Thats all I did. Please correct where I am wrong.
Thanks in advance.
Regards

p.s., I am now starting to write down the CPU
description files for the DSP chip I am working on.
Where can I find complete reference for RTL to be used
in .cpu files? Is the CGEN manual enough?

''''''''''''''''''''''''''''''''''''''''''''''''''''
--- Ben Elliston <bje@redhat.com> wrote:
> No, that doesn't sound right.  It sounds like you've
> not specified the
> file prefixes and symbol prefixes correctly.  Can
> you post the
> commands you used to generate the 8 files?
> 
> Ben


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Re: Next Step

[Ben Elliston]

Hi.

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> 1. I created a temporary build directory and cd to it.
  Shehryar> 2. In it, I wrote
  Shehryar> "/root/src/cgen-1.0/configure --target=m32r
  Shehryar> srcdir=/root/src/cgen-1.0/cgen/"
  Shehryar> 3. After the configuration process, I wrote
  Shehryar> "make opcodes ARCH=m32r"

  Shehryar> Thats all I did. Please correct where I am wrong.

Try this instead:

	# cd to build directory
	~/root/src/opcodes/configure --target=m32r
	make stamp-m32r

(stamp-m32r is a special target that runs CGEN for you).

  Shehryar> p.s., I am now starting to write down the CPU
  Shehryar> description files for the DSP chip I am working on.
  Shehryar> Where can I find complete reference for RTL to be used
  Shehryar> in .cpu files? Is the CGEN manual enough?

The CGEN manual should describe everything you need about the RTL.
There is an entire chapter devoted to it.  If you find any
documentation bugs, feel free to submit bug reports (or patches).

Ben

Re: Next Step

[Shehryar Humayun]

Hi,
I have tried make stamp-m32r after running configure
with target=m32r and here is the output:

root/src/tmp> make stamp-m32r
Making all in doc
make[1]:Entering directory '/root/src/tmp/doc'
make[1]:Nothing to be done for 'all'
make[1]:Leaving directory '/root/src/tmp/doc'
make[1]:Entering directory '/root/src/tmp'
rm -f stamp-cgen
echo timestamp > stamp-cgen
make[1]:Leaving directory '/root/src/tmp'

BTW, the Makefile generated by configure does not
contain 'stamp-m32r' as a target. Nor does this target
exist in the cgen source directory makefile. In fact,
this target is present in binutils/opcodes/Makefile.in
What is it that I am doing wrong?
Regards

+++++++++++++++++++++++++++++++++++++++++++++++++++++++
--- Ben Elliston <bje@redhat.com> wrote:
> Try this instead:
> 
> 	# cd to build directory
> 	~/root/src/opcodes/configure --target=m32r
> 	make stamp-m32r
> 
> (stamp-m32r is a special target that runs CGEN for
> you).
 

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Re: Next Step

[Ben Elliston]

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> root/src/tmp> make stamp-m32r
  Shehryar> Making all in doc
  Shehryar> make[1]:Entering directory '/root/src/tmp/doc'
  Shehryar> make[1]:Nothing to be done for 'all'
  Shehryar> make[1]:Leaving directory '/root/src/tmp/doc'
  Shehryar> make[1]:Entering directory '/root/src/tmp'
  Shehryar> rm -f stamp-cgen
  Shehryar> echo timestamp > stamp-cgen
  Shehryar> make[1]:Leaving directory '/root/src/tmp'

  Shehryar> BTW, the Makefile generated by configure does not
  Shehryar> contain 'stamp-m32r' as a target. Nor does this target

You're right.  The CGEN Makefile does not contain a `stamp-m32r'
target.  src/opcodes/Makefile.am, does though.  Check out the GNU
binutils source code, configure it for m32r-elf and then:

	make -C <build>/opcodes stamp-m32r

  Shehryar> exist in the cgen source directory makefile. In fact,
  Shehryar> this target is present in binutils/opcodes/Makefile.in

Precisely!

Regards, Ben

Problem in opcodes for ARM

[Shehryar Humayun]

Hi,

Thanks for the tip. I am going to try that. Meanwhile,
I have tried to generate the 8 opcode files for ARM
using the same procedure I have used for m32r and
fr30. Here is what I get:

make opcodes ARCH=arm
...
Loading arm.cpu
Including simplify.inc
Including arm7.cpu
Including thumb.cpu
Analyzing Instruction Set
Done Analysis
Generating arm-opc.h
Generating arm-opc.c
Generating arm-opcinst.c
Generating arm-ibld.h
Generating arm-ibld.in
ERROR: missing operands: "(sra () WI (sub WI value
2))"
No backtrace available
make: *** [opcodes] Error 1

I have invoked CGEN using GUILE as well by writing
...
(cload #:arch "cpu/arm")
I get a "Done analysis" message, no errors in the
files it seems. Any idea what might be causing the
problem in file generation process.

Regards
Shehryar


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Problem in opcodes for ARM

[Doug Evans]

Shehryar Humayun writes:
 > Hi,
 > 
 > Thanks for the tip. I am going to try that. Meanwhile,
 > I have tried to generate the 8 opcode files for ARM
 > using the same procedure I have used for m32r and
 > fr30. Here is what I get:
 > 
 > make opcodes ARCH=arm
 > ...
 > Loading arm.cpu
 > Including simplify.inc
 > Including arm7.cpu
 > Including thumb.cpu
 > Analyzing Instruction Set
 > Done Analysis
 > Generating arm-opc.h
 > Generating arm-opc.c
 > Generating arm-opcinst.c
 > Generating arm-ibld.h
 > Generating arm-ibld.in
 > ERROR: missing operands: "(sra () WI (sub WI value
 > 2))"
 > No backtrace available
 > make: *** [opcodes] Error 1
 > 
 > I have invoked CGEN using GUILE as well by writing
 > ...
 > (cload #:arch "cpu/arm")
 > I get a "Done analysis" message, no errors in the
 > files it seems. Any idea what might be causing the
 > problem in file generation process.

fwiw. don't edit your sessions and only send what appears to be
the highlights.  Send the _entire_ session.  Seriously.

Re: Next Step

[Shehryar Humayun]

Hi,

After configuring build directory for m32r-elf, this
is what I get:

>make -C root/build/opcodes/ stamp-m32r
make: Entering directory 'root/build/opcodes/'
make: no rule to make target '../cgen/stamp-cgen',
needed by 'stamp-m32r'. Stop
make: Leaving directory 'root/build/opcodes/'

If we have a look at stamp-m32r in
src/opcodes/Makefile.in and build/opcodes/Makefile,

stamp-m32r: $(CGENDEPS) $(CPUDIR)/m32r.cpu
$(CPUDIR)/m32r.opc
	$(MAKE) run-cgen arch=m32r prefix=m32r options=opinst
extrafiles=opinst

CGENDEPS = ../cgen/stamp-cgen \
	$(CGENDIR)/desc.scm $(CGENDIR)/desc-cpu.scm \ ...

remain the same for both source and build Makefiles. 
I think this is what might be causing the problem in
build/opcodes/Makefile:

cgendir = $(srcdir)/../cgen
CGENDIR = $(srcdir)/../cgen

Please correct me where I am wrong, doesn't
"cgendir=$(srcdir)/../cgen" mean that cgen source
directory (containing .scm/.cpu files) has to be
present in binutils-2.12 source tree at the same level
as is opcodes directory? I mean to say that as
"binutils-2.12/opcodes" exist, so should
"binutils-2.12/cgen", no? Is this the cause of having
message "No rule to make target ..."?

Regards

Shehryar

--- Ben Elliston <bje@redhat.com> wrote:
> Check out the GNU
> binutils source code, configure it for m32r-elf and
> then:
> 
> 	make -C <build>/opcodes stamp-m32r
> 


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Re: Next Step

[Ben Elliston]

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> make: Entering directory 'root/build/opcodes/'
  Shehryar> make: no rule to make target '../cgen/stamp-cgen',
  Shehryar> needed by 'stamp-m32r'. Stop
  Shehryar> make: Leaving directory 'root/build/opcodes/'

How old are your GNU binutils sources?  The current version does not
have this dependency on `stamp-cgen'.  I would advise using the
latest.  Alternatively, cd to your build/cgen directory and run `touch
stamp-cgen'.

Ben

Re: Next Step

[Shehryar Humayun]

I am using binutils-2.12. Isn't it the latest
available? BTW, my build directory does not contain
cgen directory after I run configure. Am I missing
something here?
Regards
Shehryar


--- Ben Elliston <bje@redhat.com> wrote:
> How old are your GNU binutils sources?  The current
> version does not
> have this dependency on `stamp-cgen'.  I would
> advise using the
> latest.  Alternatively, cd to your build/cgen
> directory and run `touch
> stamp-cgen'.
> 
> Ben


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Re: Problem in opcodes for ARM

[Shehryar Humayun]

Hi,
Here is the complete output I get when I run
       make opcodes ARCH=arm 
in my build directory, after configuring it for arm
+++++++++++++++++++++++++++++++++++++++++++++++++++++
>make opcodes ARCH=arm
rm -f tmp-opc.h tmp-itab.c
	rm -f tmp-asm.in tmp-dis.in tmp-ibld.h tmp-ibld.in
`if test -f ../guile/libguile/guile ; then echo
../guile/libguile/guile; else echo guile ; fi' -s
/root/src/cgen-1.0/cgen/cgen-opc.scm \ 
	-s /root/src/cgen-1.0/cgen \
	-v \
	-f " opinst" \
	-m all -a arm \
	-O tmp-opc.h -P tmp-opc.c -Q tmp-opinst.c \
	-B tmp-ibld.h -L tmp-ibld.in \
	-A tmp-asm.in -D tmp-dis.in
Skipping slib/sort, already loaded.
Skipping slib/random, already loaded.
cgen -s /root/src/cgen-1.0/cgen/cgen-opc.scm -s
/root/src/cgen-1.0/cgen -v -f " opinst" -m all -a arm
-O tmp-opc.h -P tmp-opc.c -Q tmp-opinst.c -B
tmp-ibld.h -L tmp-ibld.in -A tmp-asm.in -D tmp-dis.in
Setting option 'opinst' to "".
Loading cpu discription
/root/src/cgen-1.0/cgen/cpu/arm.cpu
Including simplify.inc
Including arm7.cpu
Including thumb.cpu
Analyzing Instruction Set
Done Analysis
Generating arm-opc.h
Generating arm-opc.c
Generating arm-opcinst.c
Generating arm-ibld.h
Generating arm-ibld.in
ERROR: missing operands: "(sra () WI (sub WI
value 2))"
No backtrace available
make: *** [opcodes] Error 1
+++++++++++++++++++++++++++++++++++++++++++++++++++++++

BTW, (sra () WI (sub WI value 2)) exists on line 87 in
arm7.cpu file in the cgen/cpu directory. 

--- Doug Evans <dje@transmeta.com> wrote:
> fwiw. don't edit your sessions and only send what
> appears to be
> the highlights.  Send the _entire_ session. 
>Seriously.

I just try to keep the mail size to the minimum. 

Regards

Shehryar

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Re: Next Step

[Ben Elliston]

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> I am using binutils-2.12. Isn't it the latest
  Shehryar> available? BTW, my build directory does not contain
  Shehryar> cgen directory after I run configure. Am I missing
  Shehryar> something here?

You should use binutils 2.13 or the version in CVS.

Ben

Re: Next Step

[Shehryar Humayun]

Hi, 
I have tried to generate files by removing
"../cgen/stamp-cgen" from my <build>/opcodes/Makefile
and writing 
"make -C <build>/opcodes stamp-m32r"
and it works. It generates the 8 files and puts them
back into the source tree.

CGENDIR=@cgendir@ variable still needs a workaround
though. Either you change it manually to your CGEN
source directory or create binutils/cgen and copy all
the source files (*.scm,cpu) into it.
This is due to the fact the value of @cgendir@ is set
to "@srcdir@/../cgen" in <build>/opcodes/Makefile
where srcdir=/root/src/binutils/opcodes/
Am I right?
Regards

Shehryar

p.s. How about writing down a step by step how-to for
those who are starting using CGEN?

--- Ben Elliston <bje@redhat.com> wrote:
> You should use binutils 2.13 or the version in CVS.
> 
> Ben


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Re: Next Step

[Ben Elliston]

>>>>> "Shehryar" == Shehryar Humayun <shehryarhumayunkhan@yahoo.com> writes:

  Shehryar> CGENDIR=@cgendir@ variable still needs a workaround
  Shehryar> though. Either you change it manually to your CGEN
  Shehryar> source directory or create binutils/cgen and copy all
  Shehryar> the source files (*.scm,cpu) into it.
  Shehryar> This is due to the fact the value of @cgendir@ is set
  Shehryar> to "@srcdir@/../cgen" in <build>/opcodes/Makefile
  Shehryar> where srcdir=/root/src/binutils/opcodes/
  Shehryar> Am I right?

This is because most people use CGEN in the same source tree as
binutils:

	src
	 \- opcodes
	 \- bfd
	 \- libiberty
	 \- cgen
	 \- gas
	 \- etc

Thus, opcodes/Makefile can find the CGEN sources by referring to
../cgen from its own source directory.  The directory layout I have
shown above is the one used when checking out `cgen' from the
sources.redhat.com:/cvs/src repository, which is where you should be
getting your sources from (not from the 1.0 release tar file).

Hmm .. I guess it's time for another release?

Ben