From: "Frank Ch. Eigler" <fche@redhat.com>
To: Doug Evans <dje@transmeta.com>
Cc: Manuel Kessler <mlkessle@cip.physik.uni-wuerzburg.de>,
cgen@sources.redhat.com
Subject: Re: make CGEN a less moving target?
Date: Wed, 11 Dec 2002 13:57:00 -0000 [thread overview]
Message-ID: <20021211165711.D16403@redhat.com> (raw)
In-Reply-To: <15863.45845.671543.75854@xris-athlon.transmeta.com>; from dje@transmeta.com on Wed, Dec 11, 2002 at 01:50:13PM -0800
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Hi -
dje wrote:
> So how about rephrase it as:
> This is what the h/w first fetches to decode an insn.
Dunno about that.
> For non-liw architectures this is the size of the smallest instruction.
If by "non-liw" you mean "RISC", then all instructions have the same size
and this is trivial.
For variable-length instruction sets, things just seem to work best when
base-insn-size includes all the non-operand bits of the longest instruction.
- FChE
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next prev parent reply other threads:[~2002-12-11 21:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-12-10 8:48 Johan Rydberg
2002-12-10 9:33 ` Doug Evans
2002-12-10 17:06 ` Johan Rydberg
2002-12-11 2:39 ` Manuel Kessler
2002-12-11 4:18 ` Frank Ch. Eigler
2002-12-11 13:36 ` Doug Evans
2002-12-11 13:42 ` Frank Ch. Eigler
2002-12-11 13:50 ` Doug Evans
2002-12-11 13:57 ` Frank Ch. Eigler [this message]
2002-12-11 14:25 ` Doug Evans
2002-12-11 10:08 ` Doug Evans
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