opcode bits beyond base-insn-bitsize

opcode bits beyond base-insn-bitsize

[Doug Evans]

I found this fixme in xstormy16.cpu.

(define-isa
  (name xstormy16)
  (comment "Xstormy16 instruction set")
  (default-insn-word-bitsize 32)
  (default-insn-bitsize 32)
  ; FIXME base-insn-bitsize should be 16 too, but at present CGEN has
  ; no support for instruction sets with opcode bits past
  ; base-insn-bitsize, so we must set it to at least 20.
  (base-insn-bitsize 32)
)

Can anyone remember what the details are?
i.e. what didn't work?  assembler? disassembler? simulator?

Re: opcode bits beyond base-insn-bitsize

[DJ Delorie]

> Can anyone remember what the details are?
> i.e. what didn't work?  assembler? disassembler? simulator?

xstormy16 has both 16bit and 32bit opcodes, and some of the 32bit
opcodes have decodable bits in the second half.  The base-insn-bitsize
is used to set up the masks and such, so it needs to be at least as
big as the largest decodable bits.

The tricky bit is when the 32-bit opcodes are mixed endian (i.e.  the
first 16 bits are swapped independently of the second 16 bits,
resulting in ABCD or BADC endian, but not DCBA).

Re: opcode bits beyond base-insn-bitsize

[Doug Evans]

   Date: Tue, 24 Dec 2002 12:52:59 -0500
   From: DJ Delorie <dj@redhat.com>

   > Can anyone remember what the details are?
   > i.e. what didn't work?  assembler? disassembler? simulator?

   xstormy16 has both 16bit and 32bit opcodes, and some of the 32bit
   opcodes have decodable bits in the second half.  The base-insn-bitsize
   is used to set up the masks and such, so it needs to be at least as
   big as the largest decodable bits.

s/needs/needed/
There is no intent that this is how things should work.

IIRC the simulator fetches and decodes additional bits as necessary.
In the case of opcodes support, there should be additional masks
as appropriate.

   The tricky bit is when the 32-bit opcodes are mixed endian (i.e.  the
   first 16 bits are swapped independently of the second 16 bits,
   resulting in ABCD or BADC endian, but not DCBA).

Yes, that adds extra trickyness, especially
if base-insn-bitsize is 32 and not 16.

Re: opcode bits beyond base-insn-bitsize

[DJ Delorie]

> There is no intent that this is how things should work.

If things have changed since the last mixed-size port I did, well,
then I can't tell you what it's supposed to do now.

Re: opcode bits beyond base-insn-bitsize

[Doug Evans]

   Date: Tue, 24 Dec 2002 13:11:09 -0500
   From: DJ Delorie <dj@redhat.com>

   > There is no intent that this is how things should work.

   If things have changed since the last mixed-size port I did, well,
   then I can't tell you what it's supposed to do now.

No claim is made that all the necessary support is currently there.
We'll certainly add it as appropriate.