From: "Frank Ch. Eigler" <fche@redhat.com>
To: Dave Brolley <brolley@redhat.com>
Cc: Hans-Peter Nilsson <hans-peter.nilsson@axis.com>, cgen@sourceware.org
Subject: Re: [RFA:] Fix breakage of manually building SID CPU
Date: Tue, 14 Mar 2006 22:48:00 -0000 [thread overview]
Message-ID: <20060314224843.GK6930@redhat.com> (raw)
In-Reply-To: <44173DEA.6080906@redhat.com>
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Hi -
> [...]
> (delay 1 (set pc something))
> was already implemented and working for SIM (fr30 uses it). [...]
I'm curious how exactly that works. fr30 isn't in src/sim/ at the
moment, is it?
> (set (delay 1 pc) something)
> was only implemtned for SID.
I recall now that when we built support for a nasty open-pipelined
machine, this notational change made sense, since it was only register
sets that were "delayable", not general RTL expressions.
> Furthermore, SIM now only accepts the former and SID only accepts
> the latter, making it difficult (impossible?) to share a .cpu file
> for both back ends.
That's true.
- FChE
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next prev parent reply other threads:[~2006-03-14 22:48 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-01-23 3:31 Hans-Peter Nilsson
2006-01-30 17:21 ` Dave Brolley
2006-03-14 13:34 ` Hans-Peter Nilsson
2006-03-14 16:46 ` Dave Brolley
2006-03-14 17:03 ` Hans-Peter Nilsson
2006-03-14 17:17 ` Frank Ch. Eigler
2006-03-14 21:24 ` Hans-Peter Nilsson
2006-03-14 22:04 ` Dave Brolley
2006-03-14 22:48 ` Frank Ch. Eigler [this message]
2006-03-14 23:05 ` Dave Brolley
2006-03-15 0:20 ` Hans-Peter Nilsson
2006-03-15 1:24 ` Hans-Peter Nilsson
2006-03-15 17:08 ` Dave Brolley
2006-03-15 17:14 ` Doug Evans
2006-03-15 18:18 ` Dave Brolley
2006-03-15 19:23 ` Hans-Peter Nilsson
2006-03-15 19:49 ` Dave Brolley
2006-03-15 20:11 ` Frank Ch. Eigler
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