From: Joern Rennecke <joernr@arc.com>
To: Dave Brolley <brolley@redhat.com>
Cc: "Frank Ch. Eigler" <fche@redhat.com>, cgen@sources.redhat.com
Subject: Re: delayed branches and zero overhead loops
Date: Thu, 15 Feb 2007 16:54:00 -0000 [thread overview]
Message-ID: <20070215165338.GA5683@elsdt-razorfish.arc.com> (raw)
In-Reply-To: <45D36856.8010208@redhat.com>
On Wed, Feb 14, 2007 at 02:51:50PM -0500, Dave Brolley wrote:
> Joern Rennecke wrote:
> >Speaking of which, is there a better way? I've tried deleting individual
> >generated files or stamps, and some clean targets, but make always
> >floundered.
> >
> >
> Usualy deleting the stamp-* files does the trick for me.
P.S.: When I do:
find sim opcodes -name '*stamp*'|xargs rm
make all-sim CFLAGS=-g
this is how the rebuild attempt ends:
make[2]: Entering directory `/scratch/srcw/bld-arc/sim/arc'
CONFIG_FILES= CONFIG_HEADERS=config.h:config.in /bin/sh ./config.status
config.status: creating config.h
config.status: config.h is unchanged
config.status: linking ../../../src/sim/arc/tconfig.in to tconfig.h
config.status: linking ../../../src/sim/arc/../common/nltvals.def to targ-vals.def
config.status: executing Makefile commands
Merging Makefile.sim+Make-common.sim into Makefile ...
./config.status: line 1261: Make-common.sim: No such file or directory
./config.status: line 1262: Make-common.sim: No such file or directory
./config.status: line 1263: Makefile.sim: No such file or directory
config.status: executing stamp-h commands
rm -f tmp-tvals.h tmp-tmap.c
./gentmap -h >tmp-tvals.h
/bin/sh ../../../src/sim/arc/../../move-if-change tmp-tvals.h targ-vals.h
./gentmap -c >tmp-tmap.c
/bin/sh ../../../src/sim/arc/../../move-if-change tmp-tmap.c targ-map.c
touch stamp-tvals
make cgen-arch CGEN='"`if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi` -l ../../../src/sim/arc/../../cgen/guile.scm -s"' CGENFLAGS="-v" mach=all \
archfile=../../../src/sim/arc/../../cgen/cpu/arc.cpu \
FLAGS="with-scache with-profile=fn"
make[3]: Entering directory `/scratch/srcw/bld-arc/sim/arc'
make[3]: *** No rule to make target `cgen-arch'. Stop.
make[3]: Leaving directory `/scratch/srcw/bld-arc/sim/arc'
make[2]: *** [stamp-arch] Error 2
make[2]: Leaving directory `/scratch/srcw/bld-arc/sim/arc'
make[1]: *** [all] Error 1
make[1]: Leaving directory `/scratch/srcw/bld-arc/sim'
make: *** [all-sim] Error 2
next prev parent reply other threads:[~2007-02-15 16:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-02-13 15:37 Joern Rennecke
2007-02-13 18:51 ` Frank Ch. Eigler
2007-02-13 21:00 ` Joern Rennecke
2007-02-13 21:12 ` Frank Ch. Eigler
2007-02-13 22:21 ` Joern Rennecke
2007-02-14 17:09 ` Dave Brolley
2007-02-14 18:30 ` Joern Rennecke
2007-02-14 19:52 ` Dave Brolley
2007-02-14 20:15 ` Joern Rennecke
2007-02-16 20:54 ` Dave Brolley
2007-02-19 3:39 ` Joern Rennecke
[not found] ` <45D9C06A.4030903@redhat.com>
2007-02-19 15:56 ` Joern Rennecke
2007-02-19 16:07 ` Frank Ch. Eigler
2007-02-19 18:14 ` Joern Rennecke
2007-02-19 18:19 ` Dave Brolley
2007-02-22 15:50 ` Joern Rennecke
2007-02-22 16:08 ` insert evaluation for multi-ifields broken Joern Rennecke
2007-02-22 16:56 ` Dave Brolley
2007-02-22 18:14 ` Joern Rennecke
2007-02-23 17:45 ` Dave Brolley
2007-02-15 16:54 ` Joern Rennecke [this message]
2007-02-14 18:58 ` decode-bitsize (Was: Re: delayed branches and zero overhead loops) Joern Rennecke
2007-02-13 19:25 ` delayed branches and zero overhead loops Doug Evans
2007-02-13 20:38 ` Joern Rennecke
2007-02-14 18:30 ` Doug Evans
2007-02-14 19:22 ` Joern Rennecke
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