From: Dave Brolley <brolley@redhat.com>
To: Joern Rennecke <joernr@arc.com>
Cc: "Frank Ch. Eigler" <fche@redhat.com>, cgen@sources.redhat.com
Subject: Re: delayed branches and zero overhead loops
Date: Fri, 16 Feb 2007 20:54:00 -0000 [thread overview]
Message-ID: <45D619DD.7010602@redhat.com> (raw)
In-Reply-To: <20070214201406.GD18550@elsdt-razorfish.arc.com>
Joern Rennecke wrote:
> On Wed, Feb 14, 2007 at 02:51:50PM -0500, Dave Brolley wrote:
>
>> Joern Rennecke wrote:
>>
>>> That is indeed the case. The only format differences are in the
>>> RC-ilink / RC-noilink operand and in the F0 / F1F operand.
>>>
>>>
>>>
>> If so, then there must be more bits which are constant in each of the
>> two forms of the insn, otherwise, how does the hardware decode them?
>>
>
> ilink1 is core register 29, ilink2 is core register 30 .
> Thus, you could describe the upper four bits of RC-ilink as 7,
> but that would still not disambiguate it from RC-noilink for core registers
> 28 and 31.
>
I would merge the two insns into one and handle the difference in the
semantic code by checking (index-of <operand>)
>
>>> It's the same situation with long immediates. They are indicated by a
>>> special value in any one of three operand fields.
>>>
This could be handled in the same way by checking the values of the
immediate operands.
Dave
next prev parent reply other threads:[~2007-02-16 20:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-02-13 15:37 Joern Rennecke
2007-02-13 18:51 ` Frank Ch. Eigler
2007-02-13 21:00 ` Joern Rennecke
2007-02-13 21:12 ` Frank Ch. Eigler
2007-02-13 22:21 ` Joern Rennecke
2007-02-14 17:09 ` Dave Brolley
2007-02-14 18:30 ` Joern Rennecke
2007-02-14 19:52 ` Dave Brolley
2007-02-14 20:15 ` Joern Rennecke
2007-02-16 20:54 ` Dave Brolley [this message]
2007-02-19 3:39 ` Joern Rennecke
[not found] ` <45D9C06A.4030903@redhat.com>
2007-02-19 15:56 ` Joern Rennecke
2007-02-19 16:07 ` Frank Ch. Eigler
2007-02-19 18:14 ` Joern Rennecke
2007-02-19 18:19 ` Dave Brolley
2007-02-22 15:50 ` Joern Rennecke
2007-02-22 16:08 ` insert evaluation for multi-ifields broken Joern Rennecke
2007-02-22 16:56 ` Dave Brolley
2007-02-22 18:14 ` Joern Rennecke
2007-02-23 17:45 ` Dave Brolley
2007-02-15 16:54 ` delayed branches and zero overhead loops Joern Rennecke
2007-02-14 18:58 ` decode-bitsize (Was: Re: delayed branches and zero overhead loops) Joern Rennecke
2007-02-13 19:25 ` delayed branches and zero overhead loops Doug Evans
2007-02-13 20:38 ` Joern Rennecke
2007-02-14 18:30 ` Doug Evans
2007-02-14 19:22 ` Joern Rennecke
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